realmode.c 50 KB

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  1. #ifndef USE_SERIAL
  2. #define USE_SERIAL
  3. #endif
  4. asm(".code16gcc");
  5. typedef unsigned char u8;
  6. typedef unsigned short u16;
  7. typedef unsigned u32;
  8. typedef unsigned long long u64;
  9. void test_function(void);
  10. asm(
  11. "test_function: \n\t"
  12. "mov $0x1234, %eax \n\t"
  13. "ret"
  14. );
  15. static int strlen(const char *str)
  16. {
  17. int n;
  18. for (n = 0; *str; ++str)
  19. ++n;
  20. return n;
  21. }
  22. static void outb(u8 data, u16 port)
  23. {
  24. asm volatile("out %0, %1" : : "a"(data), "d"(port));
  25. }
  26. #ifdef USE_SERIAL
  27. static int serial_iobase = 0x3f8;
  28. static int serial_inited = 0;
  29. static u8 inb(u16 port)
  30. {
  31. u8 data;
  32. asm volatile("in %1, %0" : "=a"(data) : "d"(port));
  33. return data;
  34. }
  35. static void serial_outb(char ch)
  36. {
  37. u8 lsr;
  38. do {
  39. lsr = inb(serial_iobase + 0x05);
  40. } while (!(lsr & 0x20));
  41. outb(ch, serial_iobase + 0x00);
  42. }
  43. static void serial_init(void)
  44. {
  45. u8 lcr;
  46. /* set DLAB */
  47. lcr = inb(serial_iobase + 0x03);
  48. lcr |= 0x80;
  49. outb(lcr, serial_iobase + 0x03);
  50. /* set baud rate to 115200 */
  51. outb(0x01, serial_iobase + 0x00);
  52. outb(0x00, serial_iobase + 0x01);
  53. /* clear DLAB */
  54. lcr = inb(serial_iobase + 0x03);
  55. lcr &= ~0x80;
  56. outb(lcr, serial_iobase + 0x03);
  57. }
  58. #endif
  59. static void print_serial(const char *buf)
  60. {
  61. unsigned long len = strlen(buf);
  62. #ifdef USE_SERIAL
  63. unsigned long i;
  64. if (!serial_inited) {
  65. serial_init();
  66. serial_inited = 1;
  67. }
  68. for (i = 0; i < len; i++) {
  69. serial_outb(buf[i]);
  70. }
  71. #else
  72. asm volatile ("addr32/rep/outsb" : "+S"(buf), "+c"(len) : "d"(0xf1));
  73. #endif
  74. }
  75. static void print_serial_u32(u32 value)
  76. {
  77. char n[12], *p;
  78. p = &n[11];
  79. *p = 0;
  80. do {
  81. *--p = '0' + (value % 10);
  82. value /= 10;
  83. } while (value > 0);
  84. print_serial(p);
  85. }
  86. static int failed;
  87. static void exit(int code)
  88. {
  89. outb(code, 0xf4);
  90. }
  91. struct regs {
  92. u32 eax, ebx, ecx, edx;
  93. u32 esi, edi, esp, ebp;
  94. u32 eip, eflags;
  95. };
  96. struct table_descr {
  97. u16 limit;
  98. void *base;
  99. } __attribute__((packed));
  100. static u64 gdt[] = {
  101. 0,
  102. 0x00cf9b000000ffffull, // flat 32-bit code segment
  103. 0x00cf93000000ffffull, // flat 32-bit data segment
  104. };
  105. static struct table_descr gdt_descr = {
  106. sizeof(gdt) - 1,
  107. gdt,
  108. };
  109. struct insn_desc {
  110. u16 ptr;
  111. u16 len;
  112. };
  113. static struct regs inregs, outregs;
  114. static void exec_in_big_real_mode(struct insn_desc *insn)
  115. {
  116. unsigned long tmp;
  117. static struct regs save;
  118. int i;
  119. extern u8 test_insn[], test_insn_end[];
  120. for (i = 0; i < insn->len; ++i)
  121. test_insn[i] = ((u8 *)(unsigned long)insn->ptr)[i];
  122. for (; i < test_insn_end - test_insn; ++i)
  123. test_insn[i] = 0x90; // nop
  124. save = inregs;
  125. asm volatile(
  126. "lgdtl %[gdt_descr] \n\t"
  127. "mov %%cr0, %[tmp] \n\t"
  128. "or $1, %[tmp] \n\t"
  129. "mov %[tmp], %%cr0 \n\t"
  130. "mov %[bigseg], %%gs \n\t"
  131. "and $-2, %[tmp] \n\t"
  132. "mov %[tmp], %%cr0 \n\t"
  133. "pushw %[save]+36; popfw \n\t"
  134. "xchg %%eax, %[save]+0 \n\t"
  135. "xchg %%ebx, %[save]+4 \n\t"
  136. "xchg %%ecx, %[save]+8 \n\t"
  137. "xchg %%edx, %[save]+12 \n\t"
  138. "xchg %%esi, %[save]+16 \n\t"
  139. "xchg %%edi, %[save]+20 \n\t"
  140. "xchg %%esp, %[save]+24 \n\t"
  141. "xchg %%ebp, %[save]+28 \n\t"
  142. "test_insn: . = . + 32\n\t"
  143. "test_insn_end: \n\t"
  144. "xchg %%eax, %[save]+0 \n\t"
  145. "xchg %%ebx, %[save]+4 \n\t"
  146. "xchg %%ecx, %[save]+8 \n\t"
  147. "xchg %%edx, %[save]+12 \n\t"
  148. "xchg %%esi, %[save]+16 \n\t"
  149. "xchg %%edi, %[save]+20 \n\t"
  150. "xchg %%esp, %[save]+24 \n\t"
  151. "xchg %%ebp, %[save]+28 \n\t"
  152. /* Save EFLAGS in outregs*/
  153. "pushfl \n\t"
  154. "popl %[save]+36 \n\t"
  155. /* Restore DF for the harness code */
  156. "cld\n\t"
  157. "xor %[tmp], %[tmp] \n\t"
  158. "mov %[tmp], %%gs \n\t"
  159. : [tmp]"=&r"(tmp), [save]"+m"(save)
  160. : [gdt_descr]"m"(gdt_descr), [bigseg]"r"((short)16)
  161. : "cc", "memory"
  162. );
  163. outregs = save;
  164. }
  165. #define R_AX 1
  166. #define R_BX 2
  167. #define R_CX 4
  168. #define R_DX 8
  169. #define R_SI 16
  170. #define R_DI 32
  171. #define R_SP 64
  172. #define R_BP 128
  173. int regs_equal(int ignore)
  174. {
  175. const u32 *p1 = &inregs.eax, *p2 = &outregs.eax; // yuck
  176. int i;
  177. for (i = 0; i < 8; ++i)
  178. if (!(ignore & (1 << i)) && p1[i] != p2[i])
  179. return 0;
  180. return 1;
  181. }
  182. static void report(const char *name, u16 regs_ignore, _Bool ok)
  183. {
  184. if (!regs_equal(regs_ignore)) {
  185. ok = 0;
  186. }
  187. print_serial(ok ? "PASS: " : "FAIL: ");
  188. print_serial(name);
  189. print_serial("\n");
  190. if (!ok)
  191. failed = 1;
  192. }
  193. #define MK_INSN(name, str) \
  194. asm ( \
  195. ".pushsection .data.insn \n\t" \
  196. "insn_" #name ": \n\t" \
  197. ".word 1001f, 1002f - 1001f \n\t" \
  198. ".popsection \n\t" \
  199. ".pushsection .text.insn, \"ax\" \n\t" \
  200. "1001: \n\t" \
  201. "insn_code_" #name ": " str " \n\t" \
  202. "1002: \n\t" \
  203. ".popsection" \
  204. ); \
  205. extern struct insn_desc insn_##name;
  206. void test_xchg(void)
  207. {
  208. MK_INSN(xchg_test1, "xchg %eax,%eax\n\t");
  209. MK_INSN(xchg_test2, "xchg %eax,%ebx\n\t");
  210. MK_INSN(xchg_test3, "xchg %eax,%ecx\n\t");
  211. MK_INSN(xchg_test4, "xchg %eax,%edx\n\t");
  212. MK_INSN(xchg_test5, "xchg %eax,%esi\n\t");
  213. MK_INSN(xchg_test6, "xchg %eax,%edi\n\t");
  214. MK_INSN(xchg_test7, "xchg %eax,%ebp\n\t");
  215. MK_INSN(xchg_test8, "xchg %eax,%esp\n\t");
  216. inregs = (struct regs){ .eax = 0, .ebx = 1, .ecx = 2, .edx = 3, .esi = 4, .edi = 5, .ebp = 6, .esp = 7};
  217. exec_in_big_real_mode(&insn_xchg_test1);
  218. report("xchg 1", 0, 1);
  219. exec_in_big_real_mode(&insn_xchg_test2);
  220. report("xchg 2", R_AX | R_BX,
  221. outregs.eax == inregs.ebx && outregs.ebx == inregs.eax);
  222. exec_in_big_real_mode(&insn_xchg_test3);
  223. report("xchg 3", R_AX | R_CX,
  224. outregs.eax == inregs.ecx && outregs.ecx == inregs.eax);
  225. exec_in_big_real_mode(&insn_xchg_test4);
  226. report("xchg 4", R_AX | R_DX,
  227. outregs.eax == inregs.edx && outregs.edx == inregs.eax);
  228. exec_in_big_real_mode(&insn_xchg_test5);
  229. report("xchg 5", R_AX | R_SI,
  230. outregs.eax == inregs.esi && outregs.esi == inregs.eax);
  231. exec_in_big_real_mode(&insn_xchg_test6);
  232. report("xchg 6", R_AX | R_DI,
  233. outregs.eax == inregs.edi && outregs.edi == inregs.eax);
  234. exec_in_big_real_mode(&insn_xchg_test7);
  235. report("xchg 7", R_AX | R_BP,
  236. outregs.eax == inregs.ebp && outregs.ebp == inregs.eax);
  237. exec_in_big_real_mode(&insn_xchg_test8);
  238. report("xchg 8", R_AX | R_SP,
  239. outregs.eax == inregs.esp && outregs.esp == inregs.eax);
  240. }
  241. void test_shld(void)
  242. {
  243. MK_INSN(shld_test, "shld $8,%edx,%eax\n\t");
  244. inregs = (struct regs){ .eax = 0xbe, .edx = 0xef000000 };
  245. exec_in_big_real_mode(&insn_shld_test);
  246. report("shld", ~0, outregs.eax == 0xbeef);
  247. }
  248. void test_mov_imm(void)
  249. {
  250. MK_INSN(mov_r32_imm_1, "mov $1234567890, %eax");
  251. MK_INSN(mov_r16_imm_1, "mov $1234, %ax");
  252. MK_INSN(mov_r8_imm_1, "mov $0x12, %ah");
  253. MK_INSN(mov_r8_imm_2, "mov $0x34, %al");
  254. MK_INSN(mov_r8_imm_3, "mov $0x12, %ah\n\t" "mov $0x34, %al\n\t");
  255. inregs = (struct regs){ 0 };
  256. exec_in_big_real_mode(&insn_mov_r16_imm_1);
  257. report("mov 1", R_AX, outregs.eax == 1234);
  258. /* test mov $imm, %eax */
  259. exec_in_big_real_mode(&insn_mov_r32_imm_1);
  260. report("mov 2", R_AX, outregs.eax == 1234567890);
  261. /* test mov $imm, %al/%ah */
  262. exec_in_big_real_mode(&insn_mov_r8_imm_1);
  263. report("mov 3", R_AX, outregs.eax == 0x1200);
  264. exec_in_big_real_mode(&insn_mov_r8_imm_2);
  265. report("mov 4", R_AX, outregs.eax == 0x34);
  266. exec_in_big_real_mode(&insn_mov_r8_imm_3);
  267. report("mov 5", R_AX, outregs.eax == 0x1234);
  268. }
  269. void test_sub_imm(void)
  270. {
  271. MK_INSN(sub_r32_imm_1, "mov $1234567890, %eax\n\t" "sub $10, %eax\n\t");
  272. MK_INSN(sub_r16_imm_1, "mov $1234, %ax\n\t" "sub $10, %ax\n\t");
  273. MK_INSN(sub_r8_imm_1, "mov $0x12, %ah\n\t" "sub $0x10, %ah\n\t");
  274. MK_INSN(sub_r8_imm_2, "mov $0x34, %al\n\t" "sub $0x10, %al\n\t");
  275. inregs = (struct regs){ 0 };
  276. exec_in_big_real_mode(&insn_sub_r16_imm_1);
  277. report("sub 1", R_AX, outregs.eax == 1224);
  278. /* test mov $imm, %eax */
  279. exec_in_big_real_mode(&insn_sub_r32_imm_1);
  280. report("sub 2", R_AX, outregs.eax == 1234567880);
  281. /* test mov $imm, %al/%ah */
  282. exec_in_big_real_mode(&insn_sub_r8_imm_1);
  283. report("sub 3", R_AX, outregs.eax == 0x0200);
  284. exec_in_big_real_mode(&insn_sub_r8_imm_2);
  285. report("sub 4", R_AX, outregs.eax == 0x24);
  286. }
  287. void test_xor_imm(void)
  288. {
  289. MK_INSN(xor_r32_imm_1, "mov $1234567890, %eax\n\t" "xor $1234567890, %eax\n\t");
  290. MK_INSN(xor_r16_imm_1, "mov $1234, %ax\n\t" "xor $1234, %ax\n\t");
  291. MK_INSN(xor_r8_imm_1, "mov $0x12, %ah\n\t" "xor $0x12, %ah\n\t");
  292. MK_INSN(xor_r8_imm_2, "mov $0x34, %al\n\t" "xor $0x34, %al\n\t");
  293. inregs = (struct regs){ 0 };
  294. exec_in_big_real_mode(&insn_xor_r16_imm_1);
  295. report("xor 1", R_AX, outregs.eax == 0);
  296. /* test mov $imm, %eax */
  297. exec_in_big_real_mode(&insn_xor_r32_imm_1);
  298. report("xor 2", R_AX, outregs.eax == 0);
  299. /* test mov $imm, %al/%ah */
  300. exec_in_big_real_mode(&insn_xor_r8_imm_1);
  301. report("xor 3", R_AX, outregs.eax == 0);
  302. exec_in_big_real_mode(&insn_xor_r8_imm_2);
  303. report("xor 4", R_AX, outregs.eax == 0);
  304. }
  305. void test_cmp_imm(void)
  306. {
  307. MK_INSN(cmp_test1, "mov $0x34, %al\n\t"
  308. "cmp $0x34, %al\n\t");
  309. MK_INSN(cmp_test2, "mov $0x34, %al\n\t"
  310. "cmp $0x39, %al\n\t");
  311. MK_INSN(cmp_test3, "mov $0x34, %al\n\t"
  312. "cmp $0x24, %al\n\t");
  313. inregs = (struct regs){ 0 };
  314. /* test cmp imm8 with AL */
  315. /* ZF: (bit 6) Zero Flag becomes 1 if an operation results
  316. * in a 0 writeback, or 0 register
  317. */
  318. exec_in_big_real_mode(&insn_cmp_test1);
  319. report("cmp 1", ~0, (outregs.eflags & (1<<6)) == (1<<6));
  320. exec_in_big_real_mode(&insn_cmp_test2);
  321. report("cmp 2", ~0, (outregs.eflags & (1<<6)) == 0);
  322. exec_in_big_real_mode(&insn_cmp_test3);
  323. report("cmp 3", ~0, (outregs.eflags & (1<<6)) == 0);
  324. }
  325. void test_add_imm(void)
  326. {
  327. MK_INSN(add_test1, "mov $0x43211234, %eax \n\t"
  328. "add $0x12344321, %eax \n\t");
  329. MK_INSN(add_test2, "mov $0x12, %eax \n\t"
  330. "add $0x21, %al\n\t");
  331. inregs = (struct regs){ 0 };
  332. exec_in_big_real_mode(&insn_add_test1);
  333. report("add 1", ~0, outregs.eax == 0x55555555);
  334. exec_in_big_real_mode(&insn_add_test2);
  335. report("add 2", ~0, outregs.eax == 0x33);
  336. }
  337. void test_eflags_insn(void)
  338. {
  339. MK_INSN(clc, "clc");
  340. MK_INSN(stc, "stc");
  341. MK_INSN(cli, "cli");
  342. MK_INSN(sti, "sti");
  343. MK_INSN(cld, "cld");
  344. MK_INSN(std, "std");
  345. inregs = (struct regs){ 0 };
  346. exec_in_big_real_mode(&insn_clc);
  347. report("clc", ~0, (outregs.eflags & 1) == 0);
  348. exec_in_big_real_mode(&insn_stc);
  349. report("stc", ~0, (outregs.eflags & 1) == 1);
  350. exec_in_big_real_mode(&insn_cli);
  351. report("cli", ~0, !(outregs.eflags & (1 << 9)));
  352. exec_in_big_real_mode(&insn_sti);
  353. report("sti", ~0, outregs.eflags & (1 << 9));
  354. exec_in_big_real_mode(&insn_cld);
  355. report("cld", ~0, !(outregs.eflags & (1 << 10)));
  356. exec_in_big_real_mode(&insn_std);
  357. report("std", ~0, (outregs.eflags & (1 << 10)));
  358. }
  359. void test_io(void)
  360. {
  361. MK_INSN(io_test1, "mov $0xff, %al \n\t"
  362. "out %al, $0xe0 \n\t"
  363. "mov $0x00, %al \n\t"
  364. "in $0xe0, %al \n\t");
  365. MK_INSN(io_test2, "mov $0xffff, %ax \n\t"
  366. "out %ax, $0xe0 \n\t"
  367. "mov $0x0000, %ax \n\t"
  368. "in $0xe0, %ax \n\t");
  369. MK_INSN(io_test3, "mov $0xffffffff, %eax \n\t"
  370. "out %eax, $0xe0 \n\t"
  371. "mov $0x000000, %eax \n\t"
  372. "in $0xe0, %eax \n\t");
  373. MK_INSN(io_test4, "mov $0xe0, %dx \n\t"
  374. "mov $0xff, %al \n\t"
  375. "out %al, %dx \n\t"
  376. "mov $0x00, %al \n\t"
  377. "in %dx, %al \n\t");
  378. MK_INSN(io_test5, "mov $0xe0, %dx \n\t"
  379. "mov $0xffff, %ax \n\t"
  380. "out %ax, %dx \n\t"
  381. "mov $0x0000, %ax \n\t"
  382. "in %dx, %ax \n\t");
  383. MK_INSN(io_test6, "mov $0xe0, %dx \n\t"
  384. "mov $0xffffffff, %eax \n\t"
  385. "out %eax, %dx \n\t"
  386. "mov $0x00000000, %eax \n\t"
  387. "in %dx, %eax \n\t");
  388. inregs = (struct regs){ 0 };
  389. exec_in_big_real_mode(&insn_io_test1);
  390. report("pio 1", R_AX, outregs.eax == 0xff);
  391. exec_in_big_real_mode(&insn_io_test2);
  392. report("pio 2", R_AX, outregs.eax == 0xffff);
  393. exec_in_big_real_mode(&insn_io_test3);
  394. report("pio 3", R_AX, outregs.eax == 0xffffffff);
  395. exec_in_big_real_mode(&insn_io_test4);
  396. report("pio 4", R_AX|R_DX, outregs.eax == 0xff);
  397. exec_in_big_real_mode(&insn_io_test5);
  398. report("pio 5", R_AX|R_DX, outregs.eax == 0xffff);
  399. exec_in_big_real_mode(&insn_io_test6);
  400. report("pio 6", R_AX|R_DX, outregs.eax == 0xffffffff);
  401. }
  402. asm ("retf: lretw");
  403. extern void retf();
  404. asm ("retf_imm: lretw $10");
  405. extern void retf_imm();
  406. void test_call(void)
  407. {
  408. u32 esp[16];
  409. u32 addr;
  410. inregs = (struct regs){ 0 };
  411. inregs.esp = (u32)esp;
  412. MK_INSN(call1, "mov $test_function, %eax \n\t"
  413. "call *%eax\n\t");
  414. MK_INSN(call_near1, "jmp 2f\n\t"
  415. "1: mov $0x1234, %eax\n\t"
  416. "ret\n\t"
  417. "2: call 1b\t");
  418. MK_INSN(call_near2, "call 1f\n\t"
  419. "jmp 2f\n\t"
  420. "1: mov $0x1234, %eax\n\t"
  421. "ret\n\t"
  422. "2:\t");
  423. MK_INSN(call_far1, "lcallw *(%ebx)\n\t");
  424. MK_INSN(call_far2, "lcallw $0, $retf\n\t");
  425. MK_INSN(ret_imm, "sub $10, %sp; jmp 2f; 1: retw $10; 2: callw 1b");
  426. MK_INSN(retf_imm, "sub $10, %sp; lcallw $0, $retf_imm");
  427. exec_in_big_real_mode(&insn_call1);
  428. report("call 1", R_AX, outregs.eax == 0x1234);
  429. exec_in_big_real_mode(&insn_call_near1);
  430. report("call near 1", R_AX, outregs.eax == 0x1234);
  431. exec_in_big_real_mode(&insn_call_near2);
  432. report("call near 2", R_AX, outregs.eax == 0x1234);
  433. addr = (((unsigned)retf >> 4) << 16) | ((unsigned)retf & 0x0f);
  434. inregs.ebx = (unsigned)&addr;
  435. exec_in_big_real_mode(&insn_call_far1);
  436. report("call far 1", 0, 1);
  437. exec_in_big_real_mode(&insn_call_far2);
  438. report("call far 2", 0, 1);
  439. exec_in_big_real_mode(&insn_ret_imm);
  440. report("ret imm 1", 0, 1);
  441. exec_in_big_real_mode(&insn_retf_imm);
  442. report("retf imm 1", 0, 1);
  443. }
  444. void test_jcc_short(void)
  445. {
  446. MK_INSN(jnz_short1, "jnz 1f\n\t"
  447. "mov $0x1234, %eax\n\t"
  448. "1:\n\t");
  449. MK_INSN(jnz_short2, "1:\n\t"
  450. "cmp $0x1234, %eax\n\t"
  451. "mov $0x1234, %eax\n\t"
  452. "jnz 1b\n\t");
  453. MK_INSN(jmp_short1, "jmp 1f\n\t"
  454. "mov $0x1234, %eax\n\t"
  455. "1:\n\t");
  456. inregs = (struct regs){ 0 };
  457. exec_in_big_real_mode(&insn_jnz_short1);
  458. report("jnz short 1", ~0, 1);
  459. exec_in_big_real_mode(&insn_jnz_short2);
  460. report("jnz short 2", R_AX, (outregs.eflags & (1 << 6)));
  461. exec_in_big_real_mode(&insn_jmp_short1);
  462. report("jmp short 1", ~0, 1);
  463. }
  464. void test_jcc_near(void)
  465. {
  466. /* encode near jmp manually. gas will not do it if offsets < 127 byte */
  467. MK_INSN(jnz_near1, ".byte 0x0f, 0x85, 0x06, 0x00\n\t"
  468. "mov $0x1234, %eax\n\t");
  469. MK_INSN(jnz_near2, "cmp $0x1234, %eax\n\t"
  470. "mov $0x1234, %eax\n\t"
  471. ".byte 0x0f, 0x85, 0xf0, 0xff\n\t");
  472. MK_INSN(jmp_near1, ".byte 0xE9, 0x06, 0x00\n\t"
  473. "mov $0x1234, %eax\n\t");
  474. inregs = (struct regs){ 0 };
  475. exec_in_big_real_mode(&insn_jnz_near1);
  476. report("jnz near 1", 0, 1);
  477. exec_in_big_real_mode(&insn_jnz_near2);
  478. report("jnz near 2", R_AX, outregs.eflags & (1 << 6));
  479. exec_in_big_real_mode(&insn_jmp_near1);
  480. report("jmp near 1", 0, 1);
  481. }
  482. void test_long_jmp()
  483. {
  484. u32 esp[16];
  485. inregs = (struct regs){ 0 };
  486. inregs.esp = (u32)(esp+16);
  487. MK_INSN(long_jmp, "call 1f\n\t"
  488. "jmp 2f\n\t"
  489. "1: jmp $0, $test_function\n\t"
  490. "2:\n\t");
  491. exec_in_big_real_mode(&insn_long_jmp);
  492. report("jmp far 1", R_AX, outregs.eax == 0x1234);
  493. }
  494. void test_push_pop()
  495. {
  496. MK_INSN(push32, "mov $0x12345678, %eax\n\t"
  497. "push %eax\n\t"
  498. "pop %ebx\n\t");
  499. MK_INSN(push16, "mov $0x1234, %ax\n\t"
  500. "push %ax\n\t"
  501. "pop %bx\n\t");
  502. MK_INSN(push_es, "mov $0x231, %bx\n\t" //Just write a dummy value to see if it gets overwritten
  503. "mov $0x123, %ax\n\t"
  504. "mov %ax, %es\n\t"
  505. "push %es\n\t"
  506. "pop %bx \n\t"
  507. );
  508. MK_INSN(pop_es, "push %ax\n\t"
  509. "pop %es\n\t"
  510. "mov %es, %bx\n\t"
  511. );
  512. MK_INSN(push_pop_ss, "push %ss\n\t"
  513. "pushw %ax\n\t"
  514. "popw %ss\n\t"
  515. "mov %ss, %bx\n\t"
  516. "pop %ss\n\t"
  517. );
  518. MK_INSN(push_pop_fs, "push %fs\n\t"
  519. "pushl %eax\n\t"
  520. "popl %fs\n\t"
  521. "mov %fs, %ebx\n\t"
  522. "pop %fs\n\t"
  523. );
  524. MK_INSN(push_pop_high_esp_bits,
  525. "xor $0x12340000, %esp \n\t"
  526. "push %ax; \n\t"
  527. "xor $0x12340000, %esp \n\t"
  528. "pop %bx");
  529. inregs = (struct regs){ 0 };
  530. exec_in_big_real_mode(&insn_push32);
  531. report("push/pop 1", R_AX|R_BX,
  532. outregs.eax == outregs.ebx && outregs.eax == 0x12345678);
  533. exec_in_big_real_mode(&insn_push16);
  534. report("push/pop 2", R_AX|R_BX,
  535. outregs.eax == outregs.ebx && outregs.eax == 0x1234);
  536. exec_in_big_real_mode(&insn_push_es);
  537. report("push/pop 3", R_AX|R_BX,
  538. outregs.ebx == outregs.eax && outregs.eax == 0x123);
  539. exec_in_big_real_mode(&insn_pop_es);
  540. report("push/pop 4", R_AX|R_BX, outregs.ebx == outregs.eax);
  541. exec_in_big_real_mode(&insn_push_pop_ss);
  542. report("push/pop 5", R_AX|R_BX, outregs.ebx == outregs.eax);
  543. exec_in_big_real_mode(&insn_push_pop_fs);
  544. report("push/pop 6", R_AX|R_BX, outregs.ebx == outregs.eax);
  545. inregs.eax = 0x9977;
  546. inregs.ebx = 0x7799;
  547. exec_in_big_real_mode(&insn_push_pop_high_esp_bits);
  548. report("push/pop with high bits set in %esp", R_BX, outregs.ebx == 0x9977);
  549. }
  550. void test_null(void)
  551. {
  552. MK_INSN(null, "");
  553. inregs = (struct regs){ 0 };
  554. exec_in_big_real_mode(&insn_null);
  555. report("null", 0, 1);
  556. }
  557. struct {
  558. char stack[500];
  559. char top[];
  560. } tmp_stack;
  561. void test_pusha_popa()
  562. {
  563. MK_INSN(pusha, "pusha\n\t"
  564. "pop %edi\n\t"
  565. "pop %esi\n\t"
  566. "pop %ebp\n\t"
  567. "add $4, %esp\n\t"
  568. "pop %ebx\n\t"
  569. "pop %edx\n\t"
  570. "pop %ecx\n\t"
  571. "pop %eax\n\t"
  572. );
  573. MK_INSN(popa, "push %eax\n\t"
  574. "push %ecx\n\t"
  575. "push %edx\n\t"
  576. "push %ebx\n\t"
  577. "push %esp\n\t"
  578. "push %ebp\n\t"
  579. "push %esi\n\t"
  580. "push %edi\n\t"
  581. "popa\n\t"
  582. );
  583. inregs = (struct regs){ .eax = 0, .ebx = 1, .ecx = 2, .edx = 3, .esi = 4, .edi = 5, .ebp = 6, .esp = (unsigned long)&tmp_stack.top };
  584. exec_in_big_real_mode(&insn_pusha);
  585. report("pusha/popa 1", 0, 1);
  586. exec_in_big_real_mode(&insn_popa);
  587. report("pusha/popa 1", 0, 1);
  588. }
  589. void test_iret()
  590. {
  591. MK_INSN(iret32, "pushf\n\t"
  592. "pushl %cs\n\t"
  593. "call 1f\n\t" /* a near call will push eip onto the stack */
  594. "jmp 2f\n\t"
  595. "1: iret\n\t"
  596. "2:\n\t"
  597. );
  598. MK_INSN(iret16, "pushfw\n\t"
  599. "pushw %cs\n\t"
  600. "callw 1f\n\t"
  601. "jmp 2f\n\t"
  602. "1: iretw\n\t"
  603. "2:\n\t");
  604. MK_INSN(iret_flags32, "pushfl\n\t"
  605. "popl %eax\n\t"
  606. "andl $~0x2, %eax\n\t"
  607. "orl $0xffc18028, %eax\n\t"
  608. "pushl %eax\n\t"
  609. "pushl %cs\n\t"
  610. "call 1f\n\t"
  611. "jmp 2f\n\t"
  612. "1: iret\n\t"
  613. "2:\n\t");
  614. MK_INSN(iret_flags16, "pushfw\n\t"
  615. "popw %ax\n\t"
  616. "and $~0x2, %ax\n\t"
  617. "or $0x8028, %ax\n\t"
  618. "pushw %ax\n\t"
  619. "pushw %cs\n\t"
  620. "callw 1f\n\t"
  621. "jmp 2f\n\t"
  622. "1: iretw\n\t"
  623. "2:\n\t");
  624. inregs = (struct regs){ 0 };
  625. exec_in_big_real_mode(&insn_iret32);
  626. report("iret 1", 0, 1);
  627. exec_in_big_real_mode(&insn_iret16);
  628. report("iret 2", 0, 1);
  629. exec_in_big_real_mode(&insn_iret_flags32);
  630. report("iret 3", R_AX, 1);
  631. report("rflags.rf", ~0, !(outregs.eflags & (1 << 16)));
  632. exec_in_big_real_mode(&insn_iret_flags16);
  633. report("iret 4", R_AX, 1);
  634. }
  635. void test_int()
  636. {
  637. inregs = (struct regs){ 0 };
  638. *(u32 *)(0x11 * 4) = 0x1000; /* Store a pointer to address 0x1000 in IDT entry 0x11 */
  639. *(u8 *)(0x1000) = 0xcf; /* 0x1000 contains an IRET instruction */
  640. MK_INSN(int11, "int $0x11\n\t");
  641. exec_in_big_real_mode(&insn_int11);
  642. report("int 1", 0, 1);
  643. }
  644. void test_imul()
  645. {
  646. MK_INSN(imul8_1, "mov $2, %al\n\t"
  647. "mov $-4, %cx\n\t"
  648. "imul %cl\n\t");
  649. MK_INSN(imul16_1, "mov $2, %ax\n\t"
  650. "mov $-4, %cx\n\t"
  651. "imul %cx\n\t");
  652. MK_INSN(imul32_1, "mov $2, %eax\n\t"
  653. "mov $-4, %ecx\n\t"
  654. "imul %ecx\n\t");
  655. MK_INSN(imul8_2, "mov $0x12340002, %eax\n\t"
  656. "mov $4, %cx\n\t"
  657. "imul %cl\n\t");
  658. MK_INSN(imul16_2, "mov $2, %ax\n\t"
  659. "mov $4, %cx\n\t"
  660. "imul %cx\n\t");
  661. MK_INSN(imul32_2, "mov $2, %eax\n\t"
  662. "mov $4, %ecx\n\t"
  663. "imul %ecx\n\t");
  664. inregs = (struct regs){ 0 };
  665. exec_in_big_real_mode(&insn_imul8_1);
  666. report("imul 1", R_AX | R_CX | R_DX, (outregs.eax & 0xff) == (u8)-8);
  667. exec_in_big_real_mode(&insn_imul16_1);
  668. report("imul 2", R_AX | R_CX | R_DX, outregs.eax == (u16)-8);
  669. exec_in_big_real_mode(&insn_imul32_1);
  670. report("imul 3", R_AX | R_CX | R_DX, outregs.eax == (u32)-8);
  671. exec_in_big_real_mode(&insn_imul8_2);
  672. report("imul 4", R_AX | R_CX | R_DX,
  673. (outregs.eax & 0xffff) == 8
  674. && (outregs.eax & 0xffff0000) == 0x12340000);
  675. exec_in_big_real_mode(&insn_imul16_2);
  676. report("imul 5", R_AX | R_CX | R_DX, outregs.eax == 8);
  677. exec_in_big_real_mode(&insn_imul32_2);
  678. report("imul 6", R_AX | R_CX | R_DX, outregs.eax == 8);
  679. }
  680. void test_mul()
  681. {
  682. MK_INSN(mul8, "mov $2, %al\n\t"
  683. "mov $4, %cx\n\t"
  684. "imul %cl\n\t");
  685. MK_INSN(mul16, "mov $2, %ax\n\t"
  686. "mov $4, %cx\n\t"
  687. "imul %cx\n\t");
  688. MK_INSN(mul32, "mov $2, %eax\n\t"
  689. "mov $4, %ecx\n\t"
  690. "imul %ecx\n\t");
  691. inregs = (struct regs){ 0 };
  692. exec_in_big_real_mode(&insn_mul8);
  693. report("mul 1", R_AX | R_CX | R_DX, (outregs.eax & 0xff) == 8);
  694. exec_in_big_real_mode(&insn_mul16);
  695. report("mul 2", R_AX | R_CX | R_DX, outregs.eax == 8);
  696. exec_in_big_real_mode(&insn_mul32);
  697. report("mul 3", R_AX | R_CX | R_DX, outregs.eax == 8);
  698. }
  699. void test_div()
  700. {
  701. MK_INSN(div8, "mov $257, %ax\n\t"
  702. "mov $2, %cl\n\t"
  703. "div %cl\n\t");
  704. MK_INSN(div16, "mov $512, %ax\n\t"
  705. "mov $5, %cx\n\t"
  706. "div %cx\n\t");
  707. MK_INSN(div32, "mov $512, %eax\n\t"
  708. "mov $5, %ecx\n\t"
  709. "div %ecx\n\t");
  710. inregs = (struct regs){ 0 };
  711. exec_in_big_real_mode(&insn_div8);
  712. report("div 1", R_AX | R_CX | R_DX, outregs.eax == 384);
  713. exec_in_big_real_mode(&insn_div16);
  714. report("div 2", R_AX | R_CX | R_DX,
  715. outregs.eax == 102 && outregs.edx == 2);
  716. exec_in_big_real_mode(&insn_div32);
  717. report("div 3", R_AX | R_CX | R_DX,
  718. outregs.eax == 102 && outregs.edx == 2);
  719. }
  720. void test_idiv()
  721. {
  722. MK_INSN(idiv8, "mov $256, %ax\n\t"
  723. "mov $-2, %cl\n\t"
  724. "idiv %cl\n\t");
  725. MK_INSN(idiv16, "mov $512, %ax\n\t"
  726. "mov $-2, %cx\n\t"
  727. "idiv %cx\n\t");
  728. MK_INSN(idiv32, "mov $512, %eax\n\t"
  729. "mov $-2, %ecx\n\t"
  730. "idiv %ecx\n\t");
  731. inregs = (struct regs){ 0 };
  732. exec_in_big_real_mode(&insn_idiv8);
  733. report("idiv 1", R_AX | R_CX | R_DX, outregs.eax == (u8)-128);
  734. exec_in_big_real_mode(&insn_idiv16);
  735. report("idiv 2", R_AX | R_CX | R_DX, outregs.eax == (u16)-256);
  736. exec_in_big_real_mode(&insn_idiv32);
  737. report("idiv 3", R_AX | R_CX | R_DX, outregs.eax == (u32)-256);
  738. }
  739. void test_cbw(void)
  740. {
  741. MK_INSN(cbw, "mov $0xFE, %eax \n\t"
  742. "cbw\n\t");
  743. MK_INSN(cwde, "mov $0xFFFE, %eax \n\t"
  744. "cwde\n\t");
  745. inregs = (struct regs){ 0 };
  746. exec_in_big_real_mode(&insn_cbw);
  747. report("cbq 1", ~0, outregs.eax == 0xFFFE);
  748. exec_in_big_real_mode(&insn_cwde);
  749. report("cwde 1", ~0, outregs.eax == 0xFFFFFFFE);
  750. }
  751. void test_loopcc(void)
  752. {
  753. MK_INSN(loop, "mov $10, %ecx\n\t"
  754. "1: inc %eax\n\t"
  755. "loop 1b\n\t");
  756. MK_INSN(loope, "mov $10, %ecx\n\t"
  757. "mov $1, %eax\n\t"
  758. "1: dec %eax\n\t"
  759. "loope 1b\n\t");
  760. MK_INSN(loopne, "mov $10, %ecx\n\t"
  761. "mov $5, %eax\n\t"
  762. "1: dec %eax\n\t"
  763. "loopne 1b\n\t");
  764. inregs = (struct regs){ 0 };
  765. exec_in_big_real_mode(&insn_loop);
  766. report("LOOPcc short 1", R_AX, outregs.eax == 10);
  767. exec_in_big_real_mode(&insn_loope);
  768. report("LOOPcc short 2", R_AX | R_CX,
  769. outregs.eax == -1 && outregs.ecx == 8);
  770. exec_in_big_real_mode(&insn_loopne);
  771. report("LOOPcc short 3", R_AX | R_CX,
  772. outregs.eax == 0 && outregs.ecx == 5);
  773. }
  774. static void test_das(void)
  775. {
  776. short i;
  777. u16 nr_fail = 0;
  778. static unsigned test_cases[1024] = {
  779. 0x46000000, 0x8701a000, 0x9710fa00, 0x97119a00,
  780. 0x02000101, 0x8301a101, 0x9310fb01, 0x93119b01,
  781. 0x02000202, 0x8301a202, 0x9710fc02, 0x97119c02,
  782. 0x06000303, 0x8701a303, 0x9310fd03, 0x93119d03,
  783. 0x02000404, 0x8301a404, 0x9310fe04, 0x93119e04,
  784. 0x06000505, 0x8701a505, 0x9710ff05, 0x97119f05,
  785. 0x06000606, 0x8701a606, 0x56100006, 0x9711a006,
  786. 0x02000707, 0x8301a707, 0x12100107, 0x9311a107,
  787. 0x02000808, 0x8301a808, 0x12100208, 0x9311a208,
  788. 0x06000909, 0x8701a909, 0x16100309, 0x9711a309,
  789. 0x1200040a, 0x9301a40a, 0x1210040a, 0x9311a40a,
  790. 0x1600050b, 0x9701a50b, 0x1610050b, 0x9711a50b,
  791. 0x1600060c, 0x9701a60c, 0x1610060c, 0x9711a60c,
  792. 0x1200070d, 0x9301a70d, 0x1210070d, 0x9311a70d,
  793. 0x1200080e, 0x9301a80e, 0x1210080e, 0x9311a80e,
  794. 0x1600090f, 0x9701a90f, 0x1610090f, 0x9711a90f,
  795. 0x02001010, 0x8301b010, 0x16100a10, 0x9711aa10,
  796. 0x06001111, 0x8701b111, 0x12100b11, 0x9311ab11,
  797. 0x06001212, 0x8701b212, 0x16100c12, 0x9711ac12,
  798. 0x02001313, 0x8301b313, 0x12100d13, 0x9311ad13,
  799. 0x06001414, 0x8701b414, 0x12100e14, 0x9311ae14,
  800. 0x02001515, 0x8301b515, 0x16100f15, 0x9711af15,
  801. 0x02001616, 0x8301b616, 0x12101016, 0x9311b016,
  802. 0x06001717, 0x8701b717, 0x16101117, 0x9711b117,
  803. 0x06001818, 0x8701b818, 0x16101218, 0x9711b218,
  804. 0x02001919, 0x8301b919, 0x12101319, 0x9311b319,
  805. 0x1600141a, 0x9701b41a, 0x1610141a, 0x9711b41a,
  806. 0x1200151b, 0x9301b51b, 0x1210151b, 0x9311b51b,
  807. 0x1200161c, 0x9301b61c, 0x1210161c, 0x9311b61c,
  808. 0x1600171d, 0x9701b71d, 0x1610171d, 0x9711b71d,
  809. 0x1600181e, 0x9701b81e, 0x1610181e, 0x9711b81e,
  810. 0x1200191f, 0x9301b91f, 0x1210191f, 0x9311b91f,
  811. 0x02002020, 0x8701c020, 0x12101a20, 0x9311ba20,
  812. 0x06002121, 0x8301c121, 0x16101b21, 0x9711bb21,
  813. 0x06002222, 0x8301c222, 0x12101c22, 0x9311bc22,
  814. 0x02002323, 0x8701c323, 0x16101d23, 0x9711bd23,
  815. 0x06002424, 0x8301c424, 0x16101e24, 0x9711be24,
  816. 0x02002525, 0x8701c525, 0x12101f25, 0x9311bf25,
  817. 0x02002626, 0x8701c626, 0x12102026, 0x9711c026,
  818. 0x06002727, 0x8301c727, 0x16102127, 0x9311c127,
  819. 0x06002828, 0x8301c828, 0x16102228, 0x9311c228,
  820. 0x02002929, 0x8701c929, 0x12102329, 0x9711c329,
  821. 0x1600242a, 0x9301c42a, 0x1610242a, 0x9311c42a,
  822. 0x1200252b, 0x9701c52b, 0x1210252b, 0x9711c52b,
  823. 0x1200262c, 0x9701c62c, 0x1210262c, 0x9711c62c,
  824. 0x1600272d, 0x9301c72d, 0x1610272d, 0x9311c72d,
  825. 0x1600282e, 0x9301c82e, 0x1610282e, 0x9311c82e,
  826. 0x1200292f, 0x9701c92f, 0x1210292f, 0x9711c92f,
  827. 0x06003030, 0x8301d030, 0x12102a30, 0x9711ca30,
  828. 0x02003131, 0x8701d131, 0x16102b31, 0x9311cb31,
  829. 0x02003232, 0x8701d232, 0x12102c32, 0x9711cc32,
  830. 0x06003333, 0x8301d333, 0x16102d33, 0x9311cd33,
  831. 0x02003434, 0x8701d434, 0x16102e34, 0x9311ce34,
  832. 0x06003535, 0x8301d535, 0x12102f35, 0x9711cf35,
  833. 0x06003636, 0x8301d636, 0x16103036, 0x9311d036,
  834. 0x02003737, 0x8701d737, 0x12103137, 0x9711d137,
  835. 0x02003838, 0x8701d838, 0x12103238, 0x9711d238,
  836. 0x06003939, 0x8301d939, 0x16103339, 0x9311d339,
  837. 0x1200343a, 0x9701d43a, 0x1210343a, 0x9711d43a,
  838. 0x1600353b, 0x9301d53b, 0x1610353b, 0x9311d53b,
  839. 0x1600363c, 0x9301d63c, 0x1610363c, 0x9311d63c,
  840. 0x1200373d, 0x9701d73d, 0x1210373d, 0x9711d73d,
  841. 0x1200383e, 0x9701d83e, 0x1210383e, 0x9711d83e,
  842. 0x1600393f, 0x9301d93f, 0x1610393f, 0x9311d93f,
  843. 0x02004040, 0x8301e040, 0x16103a40, 0x9311da40,
  844. 0x06004141, 0x8701e141, 0x12103b41, 0x9711db41,
  845. 0x06004242, 0x8701e242, 0x16103c42, 0x9311dc42,
  846. 0x02004343, 0x8301e343, 0x12103d43, 0x9711dd43,
  847. 0x06004444, 0x8701e444, 0x12103e44, 0x9711de44,
  848. 0x02004545, 0x8301e545, 0x16103f45, 0x9311df45,
  849. 0x02004646, 0x8301e646, 0x12104046, 0x9311e046,
  850. 0x06004747, 0x8701e747, 0x16104147, 0x9711e147,
  851. 0x06004848, 0x8701e848, 0x16104248, 0x9711e248,
  852. 0x02004949, 0x8301e949, 0x12104349, 0x9311e349,
  853. 0x1600444a, 0x9701e44a, 0x1610444a, 0x9711e44a,
  854. 0x1200454b, 0x9301e54b, 0x1210454b, 0x9311e54b,
  855. 0x1200464c, 0x9301e64c, 0x1210464c, 0x9311e64c,
  856. 0x1600474d, 0x9701e74d, 0x1610474d, 0x9711e74d,
  857. 0x1600484e, 0x9701e84e, 0x1610484e, 0x9711e84e,
  858. 0x1200494f, 0x9301e94f, 0x1210494f, 0x9311e94f,
  859. 0x06005050, 0x8701f050, 0x12104a50, 0x9311ea50,
  860. 0x02005151, 0x8301f151, 0x16104b51, 0x9711eb51,
  861. 0x02005252, 0x8301f252, 0x12104c52, 0x9311ec52,
  862. 0x06005353, 0x8701f353, 0x16104d53, 0x9711ed53,
  863. 0x02005454, 0x8301f454, 0x16104e54, 0x9711ee54,
  864. 0x06005555, 0x8701f555, 0x12104f55, 0x9311ef55,
  865. 0x06005656, 0x8701f656, 0x16105056, 0x9711f056,
  866. 0x02005757, 0x8301f757, 0x12105157, 0x9311f157,
  867. 0x02005858, 0x8301f858, 0x12105258, 0x9311f258,
  868. 0x06005959, 0x8701f959, 0x16105359, 0x9711f359,
  869. 0x1200545a, 0x9301f45a, 0x1210545a, 0x9311f45a,
  870. 0x1600555b, 0x9701f55b, 0x1610555b, 0x9711f55b,
  871. 0x1600565c, 0x9701f65c, 0x1610565c, 0x9711f65c,
  872. 0x1200575d, 0x9301f75d, 0x1210575d, 0x9311f75d,
  873. 0x1200585e, 0x9301f85e, 0x1210585e, 0x9311f85e,
  874. 0x1600595f, 0x9701f95f, 0x1610595f, 0x9711f95f,
  875. 0x06006060, 0x47010060, 0x16105a60, 0x9711fa60,
  876. 0x02006161, 0x03010161, 0x12105b61, 0x9311fb61,
  877. 0x02006262, 0x03010262, 0x16105c62, 0x9711fc62,
  878. 0x06006363, 0x07010363, 0x12105d63, 0x9311fd63,
  879. 0x02006464, 0x03010464, 0x12105e64, 0x9311fe64,
  880. 0x06006565, 0x07010565, 0x16105f65, 0x9711ff65,
  881. 0x06006666, 0x07010666, 0x16106066, 0x57110066,
  882. 0x02006767, 0x03010767, 0x12106167, 0x13110167,
  883. 0x02006868, 0x03010868, 0x12106268, 0x13110268,
  884. 0x06006969, 0x07010969, 0x16106369, 0x17110369,
  885. 0x1200646a, 0x1301046a, 0x1210646a, 0x1311046a,
  886. 0x1600656b, 0x1701056b, 0x1610656b, 0x1711056b,
  887. 0x1600666c, 0x1701066c, 0x1610666c, 0x1711066c,
  888. 0x1200676d, 0x1301076d, 0x1210676d, 0x1311076d,
  889. 0x1200686e, 0x1301086e, 0x1210686e, 0x1311086e,
  890. 0x1600696f, 0x1701096f, 0x1610696f, 0x1711096f,
  891. 0x02007070, 0x03011070, 0x16106a70, 0x17110a70,
  892. 0x06007171, 0x07011171, 0x12106b71, 0x13110b71,
  893. 0x06007272, 0x07011272, 0x16106c72, 0x17110c72,
  894. 0x02007373, 0x03011373, 0x12106d73, 0x13110d73,
  895. 0x06007474, 0x07011474, 0x12106e74, 0x13110e74,
  896. 0x02007575, 0x03011575, 0x16106f75, 0x17110f75,
  897. 0x02007676, 0x03011676, 0x12107076, 0x13111076,
  898. 0x06007777, 0x07011777, 0x16107177, 0x17111177,
  899. 0x06007878, 0x07011878, 0x16107278, 0x17111278,
  900. 0x02007979, 0x03011979, 0x12107379, 0x13111379,
  901. 0x1600747a, 0x1701147a, 0x1610747a, 0x1711147a,
  902. 0x1200757b, 0x1301157b, 0x1210757b, 0x1311157b,
  903. 0x1200767c, 0x1301167c, 0x1210767c, 0x1311167c,
  904. 0x1600777d, 0x1701177d, 0x1610777d, 0x1711177d,
  905. 0x1600787e, 0x1701187e, 0x1610787e, 0x1711187e,
  906. 0x1200797f, 0x1301197f, 0x1210797f, 0x1311197f,
  907. 0x82008080, 0x03012080, 0x12107a80, 0x13111a80,
  908. 0x86008181, 0x07012181, 0x16107b81, 0x17111b81,
  909. 0x86008282, 0x07012282, 0x12107c82, 0x13111c82,
  910. 0x82008383, 0x03012383, 0x16107d83, 0x17111d83,
  911. 0x86008484, 0x07012484, 0x16107e84, 0x17111e84,
  912. 0x82008585, 0x03012585, 0x12107f85, 0x13111f85,
  913. 0x82008686, 0x03012686, 0x92108086, 0x13112086,
  914. 0x86008787, 0x07012787, 0x96108187, 0x17112187,
  915. 0x86008888, 0x07012888, 0x96108288, 0x17112288,
  916. 0x82008989, 0x03012989, 0x92108389, 0x13112389,
  917. 0x9600848a, 0x1701248a, 0x9610848a, 0x1711248a,
  918. 0x9200858b, 0x1301258b, 0x9210858b, 0x1311258b,
  919. 0x9200868c, 0x1301268c, 0x9210868c, 0x1311268c,
  920. 0x9600878d, 0x1701278d, 0x9610878d, 0x1711278d,
  921. 0x9600888e, 0x1701288e, 0x9610888e, 0x1711288e,
  922. 0x9200898f, 0x1301298f, 0x9210898f, 0x1311298f,
  923. 0x86009090, 0x07013090, 0x92108a90, 0x13112a90,
  924. 0x82009191, 0x03013191, 0x96108b91, 0x17112b91,
  925. 0x82009292, 0x03013292, 0x92108c92, 0x13112c92,
  926. 0x86009393, 0x07013393, 0x96108d93, 0x17112d93,
  927. 0x82009494, 0x03013494, 0x96108e94, 0x17112e94,
  928. 0x86009595, 0x07013595, 0x92108f95, 0x13112f95,
  929. 0x86009696, 0x07013696, 0x96109096, 0x17113096,
  930. 0x82009797, 0x03013797, 0x92109197, 0x13113197,
  931. 0x82009898, 0x03013898, 0x92109298, 0x13113298,
  932. 0x86009999, 0x07013999, 0x96109399, 0x17113399,
  933. 0x1300349a, 0x1301349a, 0x1310349a, 0x1311349a,
  934. 0x1700359b, 0x1701359b, 0x1710359b, 0x1711359b,
  935. 0x1700369c, 0x1701369c, 0x1710369c, 0x1711369c,
  936. 0x1300379d, 0x1301379d, 0x1310379d, 0x1311379d,
  937. 0x1300389e, 0x1301389e, 0x1310389e, 0x1311389e,
  938. 0x1700399f, 0x1701399f, 0x1710399f, 0x1711399f,
  939. 0x030040a0, 0x030140a0, 0x17103aa0, 0x17113aa0,
  940. 0x070041a1, 0x070141a1, 0x13103ba1, 0x13113ba1,
  941. 0x070042a2, 0x070142a2, 0x17103ca2, 0x17113ca2,
  942. 0x030043a3, 0x030143a3, 0x13103da3, 0x13113da3,
  943. 0x070044a4, 0x070144a4, 0x13103ea4, 0x13113ea4,
  944. 0x030045a5, 0x030145a5, 0x17103fa5, 0x17113fa5,
  945. 0x030046a6, 0x030146a6, 0x131040a6, 0x131140a6,
  946. 0x070047a7, 0x070147a7, 0x171041a7, 0x171141a7,
  947. 0x070048a8, 0x070148a8, 0x171042a8, 0x171142a8,
  948. 0x030049a9, 0x030149a9, 0x131043a9, 0x131143a9,
  949. 0x170044aa, 0x170144aa, 0x171044aa, 0x171144aa,
  950. 0x130045ab, 0x130145ab, 0x131045ab, 0x131145ab,
  951. 0x130046ac, 0x130146ac, 0x131046ac, 0x131146ac,
  952. 0x170047ad, 0x170147ad, 0x171047ad, 0x171147ad,
  953. 0x170048ae, 0x170148ae, 0x171048ae, 0x171148ae,
  954. 0x130049af, 0x130149af, 0x131049af, 0x131149af,
  955. 0x070050b0, 0x070150b0, 0x13104ab0, 0x13114ab0,
  956. 0x030051b1, 0x030151b1, 0x17104bb1, 0x17114bb1,
  957. 0x030052b2, 0x030152b2, 0x13104cb2, 0x13114cb2,
  958. 0x070053b3, 0x070153b3, 0x17104db3, 0x17114db3,
  959. 0x030054b4, 0x030154b4, 0x17104eb4, 0x17114eb4,
  960. 0x070055b5, 0x070155b5, 0x13104fb5, 0x13114fb5,
  961. 0x070056b6, 0x070156b6, 0x171050b6, 0x171150b6,
  962. 0x030057b7, 0x030157b7, 0x131051b7, 0x131151b7,
  963. 0x030058b8, 0x030158b8, 0x131052b8, 0x131152b8,
  964. 0x070059b9, 0x070159b9, 0x171053b9, 0x171153b9,
  965. 0x130054ba, 0x130154ba, 0x131054ba, 0x131154ba,
  966. 0x170055bb, 0x170155bb, 0x171055bb, 0x171155bb,
  967. 0x170056bc, 0x170156bc, 0x171056bc, 0x171156bc,
  968. 0x130057bd, 0x130157bd, 0x131057bd, 0x131157bd,
  969. 0x130058be, 0x130158be, 0x131058be, 0x131158be,
  970. 0x170059bf, 0x170159bf, 0x171059bf, 0x171159bf,
  971. 0x070060c0, 0x070160c0, 0x17105ac0, 0x17115ac0,
  972. 0x030061c1, 0x030161c1, 0x13105bc1, 0x13115bc1,
  973. 0x030062c2, 0x030162c2, 0x17105cc2, 0x17115cc2,
  974. 0x070063c3, 0x070163c3, 0x13105dc3, 0x13115dc3,
  975. 0x030064c4, 0x030164c4, 0x13105ec4, 0x13115ec4,
  976. 0x070065c5, 0x070165c5, 0x17105fc5, 0x17115fc5,
  977. 0x070066c6, 0x070166c6, 0x171060c6, 0x171160c6,
  978. 0x030067c7, 0x030167c7, 0x131061c7, 0x131161c7,
  979. 0x030068c8, 0x030168c8, 0x131062c8, 0x131162c8,
  980. 0x070069c9, 0x070169c9, 0x171063c9, 0x171163c9,
  981. 0x130064ca, 0x130164ca, 0x131064ca, 0x131164ca,
  982. 0x170065cb, 0x170165cb, 0x171065cb, 0x171165cb,
  983. 0x170066cc, 0x170166cc, 0x171066cc, 0x171166cc,
  984. 0x130067cd, 0x130167cd, 0x131067cd, 0x131167cd,
  985. 0x130068ce, 0x130168ce, 0x131068ce, 0x131168ce,
  986. 0x170069cf, 0x170169cf, 0x171069cf, 0x171169cf,
  987. 0x030070d0, 0x030170d0, 0x17106ad0, 0x17116ad0,
  988. 0x070071d1, 0x070171d1, 0x13106bd1, 0x13116bd1,
  989. 0x070072d2, 0x070172d2, 0x17106cd2, 0x17116cd2,
  990. 0x030073d3, 0x030173d3, 0x13106dd3, 0x13116dd3,
  991. 0x070074d4, 0x070174d4, 0x13106ed4, 0x13116ed4,
  992. 0x030075d5, 0x030175d5, 0x17106fd5, 0x17116fd5,
  993. 0x030076d6, 0x030176d6, 0x131070d6, 0x131170d6,
  994. 0x070077d7, 0x070177d7, 0x171071d7, 0x171171d7,
  995. 0x070078d8, 0x070178d8, 0x171072d8, 0x171172d8,
  996. 0x030079d9, 0x030179d9, 0x131073d9, 0x131173d9,
  997. 0x170074da, 0x170174da, 0x171074da, 0x171174da,
  998. 0x130075db, 0x130175db, 0x131075db, 0x131175db,
  999. 0x130076dc, 0x130176dc, 0x131076dc, 0x131176dc,
  1000. 0x170077dd, 0x170177dd, 0x171077dd, 0x171177dd,
  1001. 0x170078de, 0x170178de, 0x171078de, 0x171178de,
  1002. 0x130079df, 0x130179df, 0x131079df, 0x131179df,
  1003. 0x830080e0, 0x830180e0, 0x13107ae0, 0x13117ae0,
  1004. 0x870081e1, 0x870181e1, 0x17107be1, 0x17117be1,
  1005. 0x870082e2, 0x870182e2, 0x13107ce2, 0x13117ce2,
  1006. 0x830083e3, 0x830183e3, 0x17107de3, 0x17117de3,
  1007. 0x870084e4, 0x870184e4, 0x17107ee4, 0x17117ee4,
  1008. 0x830085e5, 0x830185e5, 0x13107fe5, 0x13117fe5,
  1009. 0x830086e6, 0x830186e6, 0x931080e6, 0x931180e6,
  1010. 0x870087e7, 0x870187e7, 0x971081e7, 0x971181e7,
  1011. 0x870088e8, 0x870188e8, 0x971082e8, 0x971182e8,
  1012. 0x830089e9, 0x830189e9, 0x931083e9, 0x931183e9,
  1013. 0x970084ea, 0x970184ea, 0x971084ea, 0x971184ea,
  1014. 0x930085eb, 0x930185eb, 0x931085eb, 0x931185eb,
  1015. 0x930086ec, 0x930186ec, 0x931086ec, 0x931186ec,
  1016. 0x970087ed, 0x970187ed, 0x971087ed, 0x971187ed,
  1017. 0x970088ee, 0x970188ee, 0x971088ee, 0x971188ee,
  1018. 0x930089ef, 0x930189ef, 0x931089ef, 0x931189ef,
  1019. 0x870090f0, 0x870190f0, 0x93108af0, 0x93118af0,
  1020. 0x830091f1, 0x830191f1, 0x97108bf1, 0x97118bf1,
  1021. 0x830092f2, 0x830192f2, 0x93108cf2, 0x93118cf2,
  1022. 0x870093f3, 0x870193f3, 0x97108df3, 0x97118df3,
  1023. 0x830094f4, 0x830194f4, 0x97108ef4, 0x97118ef4,
  1024. 0x870095f5, 0x870195f5, 0x93108ff5, 0x93118ff5,
  1025. 0x870096f6, 0x870196f6, 0x971090f6, 0x971190f6,
  1026. 0x830097f7, 0x830197f7, 0x931091f7, 0x931191f7,
  1027. 0x830098f8, 0x830198f8, 0x931092f8, 0x931192f8,
  1028. 0x870099f9, 0x870199f9, 0x971093f9, 0x971193f9,
  1029. 0x930094fa, 0x930194fa, 0x931094fa, 0x931194fa,
  1030. 0x970095fb, 0x970195fb, 0x971095fb, 0x971195fb,
  1031. 0x970096fc, 0x970196fc, 0x971096fc, 0x971196fc,
  1032. 0x930097fd, 0x930197fd, 0x931097fd, 0x931197fd,
  1033. 0x930098fe, 0x930198fe, 0x931098fe, 0x931198fe,
  1034. 0x970099ff, 0x970199ff, 0x971099ff, 0x971199ff,
  1035. };
  1036. MK_INSN(das, "das");
  1037. inregs = (struct regs){ 0 };
  1038. for (i = 0; i < 1024; ++i) {
  1039. unsigned tmp = test_cases[i];
  1040. inregs.eax = tmp & 0xff;
  1041. inregs.eflags = (tmp >> 16) & 0xff;
  1042. exec_in_big_real_mode(&insn_das);
  1043. if (!regs_equal(R_AX)
  1044. || outregs.eax != ((tmp >> 8) & 0xff)
  1045. || (outregs.eflags & 0xff) != (tmp >> 24)) {
  1046. ++nr_fail;
  1047. break;
  1048. }
  1049. }
  1050. report("DAS", ~0, nr_fail == 0);
  1051. }
  1052. void test_cwd_cdq()
  1053. {
  1054. /* Sign-bit set */
  1055. MK_INSN(cwd_1, "mov $0x8000, %ax\n\t"
  1056. "cwd\n\t");
  1057. /* Sign-bit not set */
  1058. MK_INSN(cwd_2, "mov $0x1000, %ax\n\t"
  1059. "cwd\n\t");
  1060. /* Sign-bit set */
  1061. MK_INSN(cdq_1, "mov $0x80000000, %eax\n\t"
  1062. "cdq\n\t");
  1063. /* Sign-bit not set */
  1064. MK_INSN(cdq_2, "mov $0x10000000, %eax\n\t"
  1065. "cdq\n\t");
  1066. inregs = (struct regs){ 0 };
  1067. exec_in_big_real_mode(&insn_cwd_1);
  1068. report("cwd 1", R_AX | R_DX,
  1069. outregs.eax == 0x8000 && outregs.edx == 0xffff);
  1070. exec_in_big_real_mode(&insn_cwd_2);
  1071. report("cwd 2", R_AX | R_DX,
  1072. outregs.eax == 0x1000 && outregs.edx == 0);
  1073. exec_in_big_real_mode(&insn_cdq_1);
  1074. report("cdq 1", R_AX | R_DX,
  1075. outregs.eax == 0x80000000 && outregs.edx == 0xffffffff);
  1076. exec_in_big_real_mode(&insn_cdq_2);
  1077. report("cdq 2", R_AX | R_DX,
  1078. outregs.eax == 0x10000000 && outregs.edx == 0);
  1079. }
  1080. static struct {
  1081. void *address;
  1082. unsigned short sel;
  1083. } __attribute__((packed)) desc = {
  1084. (void *)0x1234,
  1085. 0x10,
  1086. };
  1087. void test_lds_lss()
  1088. {
  1089. inregs = (struct regs){ .ebx = (unsigned long)&desc };
  1090. MK_INSN(lds, "push %ds\n\t"
  1091. "lds (%ebx), %eax\n\t"
  1092. "mov %ds, %ebx\n\t"
  1093. "pop %ds\n\t");
  1094. exec_in_big_real_mode(&insn_lds);
  1095. report("lds", R_AX | R_BX,
  1096. outregs.eax == (unsigned long)desc.address &&
  1097. outregs.ebx == desc.sel);
  1098. MK_INSN(les, "push %es\n\t"
  1099. "les (%ebx), %eax\n\t"
  1100. "mov %es, %ebx\n\t"
  1101. "pop %es\n\t");
  1102. exec_in_big_real_mode(&insn_les);
  1103. report("les", R_AX | R_BX,
  1104. outregs.eax == (unsigned long)desc.address &&
  1105. outregs.ebx == desc.sel);
  1106. MK_INSN(lfs, "push %fs\n\t"
  1107. "lfs (%ebx), %eax\n\t"
  1108. "mov %fs, %ebx\n\t"
  1109. "pop %fs\n\t");
  1110. exec_in_big_real_mode(&insn_lfs);
  1111. report("lfs", R_AX | R_BX,
  1112. outregs.eax == (unsigned long)desc.address &&
  1113. outregs.ebx == desc.sel);
  1114. MK_INSN(lgs, "push %gs\n\t"
  1115. "lgs (%ebx), %eax\n\t"
  1116. "mov %gs, %ebx\n\t"
  1117. "pop %gs\n\t");
  1118. exec_in_big_real_mode(&insn_lgs);
  1119. report("lgs", R_AX | R_BX,
  1120. outregs.eax == (unsigned long)desc.address &&
  1121. outregs.ebx == desc.sel);
  1122. MK_INSN(lss, "push %ss\n\t"
  1123. "lss (%ebx), %eax\n\t"
  1124. "mov %ss, %ebx\n\t"
  1125. "pop %ss\n\t");
  1126. exec_in_big_real_mode(&insn_lss);
  1127. report("lss", R_AX | R_BX,
  1128. outregs.eax == (unsigned long)desc.address &&
  1129. outregs.ebx == desc.sel);
  1130. }
  1131. void test_jcxz(void)
  1132. {
  1133. MK_INSN(jcxz1, "jcxz 1f\n\t"
  1134. "mov $0x1234, %eax\n\t"
  1135. "1:\n\t");
  1136. MK_INSN(jcxz2, "mov $0x100, %ecx\n\t"
  1137. "jcxz 1f\n\t"
  1138. "mov $0x1234, %eax\n\t"
  1139. "mov $0, %ecx\n\t"
  1140. "1:\n\t");
  1141. MK_INSN(jcxz3, "mov $0x10000, %ecx\n\t"
  1142. "jcxz 1f\n\t"
  1143. "mov $0x1234, %eax\n\t"
  1144. "1:\n\t");
  1145. MK_INSN(jecxz1, "jecxz 1f\n\t"
  1146. "mov $0x1234, %eax\n\t"
  1147. "1:\n\t");
  1148. MK_INSN(jecxz2, "mov $0x10000, %ecx\n\t"
  1149. "jecxz 1f\n\t"
  1150. "mov $0x1234, %eax\n\t"
  1151. "mov $0, %ecx\n\t"
  1152. "1:\n\t");
  1153. inregs = (struct regs){ 0 };
  1154. exec_in_big_real_mode(&insn_jcxz1);
  1155. report("jcxz short 1", 0, 1);
  1156. exec_in_big_real_mode(&insn_jcxz2);
  1157. report("jcxz short 2", R_AX, outregs.eax == 0x1234);
  1158. exec_in_big_real_mode(&insn_jcxz3);
  1159. report("jcxz short 3", R_CX, outregs.ecx == 0x10000);
  1160. exec_in_big_real_mode(&insn_jecxz1);
  1161. report("jecxz short 1", 0, 1);
  1162. exec_in_big_real_mode(&insn_jecxz2);
  1163. report("jecxz short 2", R_AX, outregs.eax == 0x1234);
  1164. }
  1165. static void test_cpuid(void)
  1166. {
  1167. MK_INSN(cpuid, "cpuid");
  1168. unsigned function = 0x1234;
  1169. unsigned eax, ebx, ecx, edx;
  1170. inregs.eax = eax = function;
  1171. inregs.ecx = ecx = 0;
  1172. asm("cpuid" : "+a"(eax), "=b"(ebx), "+c"(ecx), "=d"(edx));
  1173. exec_in_big_real_mode(&insn_cpuid);
  1174. report("cpuid", R_AX|R_BX|R_CX|R_DX,
  1175. outregs.eax == eax && outregs.ebx == ebx
  1176. && outregs.ecx == ecx && outregs.edx == edx);
  1177. }
  1178. static void test_ss_base_for_esp_ebp(void)
  1179. {
  1180. MK_INSN(ssrel1, "mov %ss, %ax; mov %bx, %ss; movl (%ebp), %ebx; mov %ax, %ss");
  1181. MK_INSN(ssrel2, "mov %ss, %ax; mov %bx, %ss; movl (%ebp,%edi,8), %ebx; mov %ax, %ss");
  1182. static unsigned array[] = { 0x12345678, 0, 0, 0, 0x87654321 };
  1183. inregs.ebx = 1;
  1184. inregs.ebp = (unsigned)array;
  1185. exec_in_big_real_mode(&insn_ssrel1);
  1186. report("ss relative addressing (1)", R_AX | R_BX, outregs.ebx == 0x87654321);
  1187. inregs.ebx = 1;
  1188. inregs.ebp = (unsigned)array;
  1189. inregs.edi = 0;
  1190. exec_in_big_real_mode(&insn_ssrel2);
  1191. report("ss relative addressing (2)", R_AX | R_BX, outregs.ebx == 0x87654321);
  1192. }
  1193. extern unsigned long long r_gdt[];
  1194. static void test_sgdt_sidt(void)
  1195. {
  1196. MK_INSN(sgdt, "sgdtw (%eax)");
  1197. MK_INSN(sidt, "sidtw (%eax)");
  1198. struct table_descr x, y;
  1199. inregs.eax = (unsigned)&y;
  1200. asm volatile("sgdtw %0" : "=m"(x));
  1201. exec_in_big_real_mode(&insn_sgdt);
  1202. report("sgdt", 0, x.limit == y.limit && x.base == y.base);
  1203. inregs.eax = (unsigned)&y;
  1204. asm volatile("sidtw %0" : "=m"(x));
  1205. exec_in_big_real_mode(&insn_sidt);
  1206. report("sidt", 0, x.limit == y.limit && x.base == y.base);
  1207. }
  1208. static void test_sahf(void)
  1209. {
  1210. MK_INSN(sahf, "sahf; pushfw; mov (%esp), %al; popfw");
  1211. inregs.eax = 0xfd00;
  1212. exec_in_big_real_mode(&insn_sahf);
  1213. report("sahf", R_AX, outregs.eax == (inregs.eax | 0xd7));
  1214. }
  1215. static void test_lahf(void)
  1216. {
  1217. MK_INSN(lahf, "pushfw; mov %al, (%esp); popfw; lahf");
  1218. inregs.eax = 0xc7;
  1219. exec_in_big_real_mode(&insn_lahf);
  1220. report("lahf", R_AX, (outregs.eax >> 8) == inregs.eax);
  1221. }
  1222. static void test_movzx_movsx(void)
  1223. {
  1224. MK_INSN(movsx, "movsx %al, %ebx");
  1225. MK_INSN(movzx, "movzx %al, %ebx");
  1226. MK_INSN(movzsah, "movsx %ah, %ebx");
  1227. MK_INSN(movzxah, "movzx %ah, %ebx");
  1228. inregs.eax = 0x1234569c;
  1229. inregs.esp = 0xffff;
  1230. exec_in_big_real_mode(&insn_movsx);
  1231. report("movsx", R_BX, outregs.ebx == (signed char)inregs.eax);
  1232. exec_in_big_real_mode(&insn_movzx);
  1233. report("movzx", R_BX, outregs.ebx == (unsigned char)inregs.eax);
  1234. exec_in_big_real_mode(&insn_movzsah);
  1235. report("movsx ah", R_BX, outregs.ebx == (signed char)(inregs.eax>>8));
  1236. exec_in_big_real_mode(&insn_movzxah);
  1237. report("movzx ah", R_BX, outregs.ebx == (unsigned char)(inregs.eax >> 8));
  1238. }
  1239. static void test_bswap(void)
  1240. {
  1241. MK_INSN(bswap, "bswap %ecx");
  1242. inregs.ecx = 0x12345678;
  1243. exec_in_big_real_mode(&insn_bswap);
  1244. report("bswap", R_CX, outregs.ecx == 0x78563412);
  1245. }
  1246. static void test_aad(void)
  1247. {
  1248. MK_INSN(aad, "aad");
  1249. inregs.eax = 0x12345678;
  1250. exec_in_big_real_mode(&insn_aad);
  1251. report("aad", R_AX, outregs.eax == 0x123400d4);
  1252. }
  1253. static void test_aam(void)
  1254. {
  1255. MK_INSN(aam, "aam");
  1256. inregs.eax = 0x76543210;
  1257. exec_in_big_real_mode(&insn_aam);
  1258. report("aam", R_AX, outregs.eax == 0x76540106);
  1259. }
  1260. static void test_xlat(void)
  1261. {
  1262. MK_INSN(xlat, "xlat");
  1263. u8 table[256];
  1264. int i;
  1265. for (i = 0; i < 256; i++) {
  1266. table[i] = i + 1;
  1267. }
  1268. inregs.eax = 0x89abcdef;
  1269. inregs.ebx = (u32)table;
  1270. exec_in_big_real_mode(&insn_xlat);
  1271. report("xlat", R_AX, outregs.eax == 0x89abcdf0);
  1272. }
  1273. static void test_salc(void)
  1274. {
  1275. MK_INSN(clc_salc, "clc; .byte 0xd6");
  1276. MK_INSN(stc_salc, "stc; .byte 0xd6");
  1277. inregs.eax = 0x12345678;
  1278. exec_in_big_real_mode(&insn_clc_salc);
  1279. report("salc (1)", R_AX, outregs.eax == 0x12345600);
  1280. exec_in_big_real_mode(&insn_stc_salc);
  1281. report("salc (2)", R_AX, outregs.eax == 0x123456ff);
  1282. }
  1283. static void test_fninit(void)
  1284. {
  1285. u16 fcw = -1, fsw = -1;
  1286. MK_INSN(fninit, "fninit ; fnstsw (%eax) ; fnstcw (%ebx)");
  1287. inregs.eax = (u32)&fsw;
  1288. inregs.ebx = (u32)&fcw;
  1289. exec_in_big_real_mode(&insn_fninit);
  1290. report("fninit", 0, fsw == 0 && (fcw & 0x103f) == 0x003f);
  1291. }
  1292. static void test_nopl(void)
  1293. {
  1294. MK_INSN(nopl1, ".byte 0x90\n\r"); // 1 byte nop
  1295. MK_INSN(nopl2, ".byte 0x66, 0x90\n\r"); // 2 bytes nop
  1296. MK_INSN(nopl3, ".byte 0x0f, 0x1f, 0x00\n\r"); // 3 bytes nop
  1297. MK_INSN(nopl4, ".byte 0x0f, 0x1f, 0x40, 0x00\n\r"); // 4 bytes nop
  1298. exec_in_big_real_mode(&insn_nopl1);
  1299. exec_in_big_real_mode(&insn_nopl2);
  1300. exec_in_big_real_mode(&insn_nopl3);
  1301. exec_in_big_real_mode(&insn_nopl4);
  1302. report("nopl", 0, 1);
  1303. }
  1304. static u32 perf_baseline;
  1305. #define PERF_COUNT 1000000
  1306. #define MK_INSN_PERF(name, insn) \
  1307. MK_INSN(name, "rdtsc; mov %eax, %ebx; mov %edx, %esi\n" \
  1308. "1:" insn "\n" \
  1309. ".byte 0x67; loop 1b\n" \
  1310. "rdtsc");
  1311. static u32 cycles_in_big_real_mode(struct insn_desc *insn)
  1312. {
  1313. u64 start, end;
  1314. inregs.ecx = PERF_COUNT;
  1315. exec_in_big_real_mode(insn);
  1316. start = ((u64)outregs.esi << 32) | outregs.ebx;
  1317. end = ((u64)outregs.edx << 32) | outregs.eax;
  1318. return end - start;
  1319. }
  1320. static void test_perf_loop(void)
  1321. {
  1322. /*
  1323. * This test runs simple instructions that should roughly take the
  1324. * the same time to emulate: PERF_COUNT iterations of "loop" and 3
  1325. * setup instructions. Other performance tests can run PERF_COUNT
  1326. * iterations of the same instruction and subtract the cycle count
  1327. * of this test.
  1328. */
  1329. MK_INSN_PERF(perf_loop, "");
  1330. perf_baseline = cycles_in_big_real_mode(&insn_perf_loop);
  1331. print_serial_u32(perf_baseline / (PERF_COUNT + 3));
  1332. print_serial(" cycles/emulated jump instruction\n");
  1333. }
  1334. static void test_perf_mov(void)
  1335. {
  1336. u32 cyc;
  1337. MK_INSN_PERF(perf_move, "mov %esi, %edi");
  1338. cyc = cycles_in_big_real_mode(&insn_perf_move);
  1339. print_serial_u32((cyc - perf_baseline) / PERF_COUNT);
  1340. print_serial(" cycles/emulated move instruction\n");
  1341. }
  1342. static void test_perf_arith(void)
  1343. {
  1344. u32 cyc;
  1345. MK_INSN_PERF(perf_arith, "add $4, %edi");
  1346. cyc = cycles_in_big_real_mode(&insn_perf_arith);
  1347. print_serial_u32((cyc - perf_baseline) / PERF_COUNT);
  1348. print_serial(" cycles/emulated arithmetic instruction\n");
  1349. }
  1350. static void test_perf_memory_load(void)
  1351. {
  1352. u32 cyc, tmp;
  1353. MK_INSN_PERF(perf_memory_load, "cmp $0, (%edi)");
  1354. inregs.edi = (u32)&tmp;
  1355. cyc = cycles_in_big_real_mode(&insn_perf_memory_load);
  1356. print_serial_u32((cyc - perf_baseline) / PERF_COUNT);
  1357. print_serial(" cycles/emulated memory load instruction\n");
  1358. }
  1359. static void test_perf_memory_store(void)
  1360. {
  1361. u32 cyc, tmp;
  1362. MK_INSN_PERF(perf_memory_store, "mov %ax, (%edi)");
  1363. inregs.edi = (u32)&tmp;
  1364. cyc = cycles_in_big_real_mode(&insn_perf_memory_store);
  1365. print_serial_u32((cyc - perf_baseline) / PERF_COUNT);
  1366. print_serial(" cycles/emulated memory store instruction\n");
  1367. }
  1368. static void test_perf_memory_rmw(void)
  1369. {
  1370. u32 cyc, tmp;
  1371. MK_INSN_PERF(perf_memory_rmw, "add $1, (%edi)");
  1372. inregs.edi = (u32)&tmp;
  1373. cyc = cycles_in_big_real_mode(&insn_perf_memory_rmw);
  1374. print_serial_u32((cyc - perf_baseline) / PERF_COUNT);
  1375. print_serial(" cycles/emulated memory RMW instruction\n");
  1376. }
  1377. void test_dr_mod(void)
  1378. {
  1379. MK_INSN(drmod, "movl %ebx, %dr0\n\t"
  1380. ".byte 0x0f \n\t .byte 0x21 \n\t .byte 0x0\n\t");
  1381. inregs.eax = 0xdead;
  1382. inregs.ebx = 0xaced;
  1383. exec_in_big_real_mode(&insn_drmod);
  1384. report("mov dr with mod bits", R_AX | R_BX, outregs.eax == 0xaced);
  1385. }
  1386. void test_smsw(void)
  1387. {
  1388. MK_INSN(smsw, "movl %cr0, %ebx\n\t"
  1389. "movl %ebx, %ecx\n\t"
  1390. "or $0x40000000, %ebx\n\t"
  1391. "movl %ebx, %cr0\n\t"
  1392. "smswl %eax\n\t"
  1393. "movl %ecx, %cr0\n\t");
  1394. inregs.eax = 0x12345678;
  1395. exec_in_big_real_mode(&insn_smsw);
  1396. report("smsw", R_AX | R_BX | R_CX, outregs.eax == outregs.ebx);
  1397. }
  1398. void test_xadd(void)
  1399. {
  1400. MK_INSN(xadd, "xaddl %eax, %eax\n\t");
  1401. inregs.eax = 0x12345678;
  1402. exec_in_big_real_mode(&insn_xadd);
  1403. report("xadd", R_AX, outregs.eax == inregs.eax * 2);
  1404. }
  1405. void realmode_start(void)
  1406. {
  1407. test_null();
  1408. test_shld();
  1409. test_push_pop();
  1410. test_pusha_popa();
  1411. test_mov_imm();
  1412. test_cmp_imm();
  1413. test_add_imm();
  1414. test_sub_imm();
  1415. test_xor_imm();
  1416. test_io();
  1417. test_eflags_insn();
  1418. test_jcc_short();
  1419. test_jcc_near();
  1420. /* test_call() uses short jump so call it after testing jcc */
  1421. test_call();
  1422. /* long jmp test uses call near so test it after testing call */
  1423. test_long_jmp();
  1424. test_xchg();
  1425. test_iret();
  1426. test_int();
  1427. test_imul();
  1428. test_mul();
  1429. test_div();
  1430. test_idiv();
  1431. test_loopcc();
  1432. test_cbw();
  1433. test_cwd_cdq();
  1434. test_das();
  1435. test_lds_lss();
  1436. test_jcxz();
  1437. test_cpuid();
  1438. test_ss_base_for_esp_ebp();
  1439. test_sgdt_sidt();
  1440. test_lahf();
  1441. test_sahf();
  1442. test_movzx_movsx();
  1443. test_bswap();
  1444. test_aad();
  1445. test_aam();
  1446. test_xlat();
  1447. test_salc();
  1448. test_fninit();
  1449. test_dr_mod();
  1450. test_smsw();
  1451. test_nopl();
  1452. test_xadd();
  1453. test_perf_loop();
  1454. test_perf_mov();
  1455. test_perf_arith();
  1456. test_perf_memory_load();
  1457. test_perf_memory_store();
  1458. test_perf_memory_rmw();
  1459. exit(failed);
  1460. }
  1461. unsigned long long r_gdt[] = { 0, 0x9b000000ffff, 0x93000000ffff };
  1462. struct table_descr r_gdt_descr = { sizeof(r_gdt) - 1, &r_gdt };
  1463. asm(
  1464. ".section .init \n\t"
  1465. ".code32 \n\t"
  1466. "mb_magic = 0x1BADB002 \n\t"
  1467. "mb_flags = 0x0 \n\t"
  1468. "# multiboot header \n\t"
  1469. ".long mb_magic, mb_flags, 0 - (mb_magic + mb_flags) \n\t"
  1470. ".globl start \n\t"
  1471. ".data \n\t"
  1472. ". = . + 4096 \n\t"
  1473. "stacktop: \n\t"
  1474. ".text \n\t"
  1475. "start: \n\t"
  1476. "lgdt r_gdt_descr \n\t"
  1477. "ljmp $8, $1f; 1: \n\t"
  1478. ".code16gcc \n\t"
  1479. "mov $16, %eax \n\t"
  1480. "mov %ax, %ds \n\t"
  1481. "mov %ax, %es \n\t"
  1482. "mov %ax, %fs \n\t"
  1483. "mov %ax, %gs \n\t"
  1484. "mov %ax, %ss \n\t"
  1485. "mov %cr0, %eax \n\t"
  1486. "btc $0, %eax \n\t"
  1487. "mov %eax, %cr0 \n\t"
  1488. "ljmp $0, $realmode_entry \n\t"
  1489. "realmode_entry: \n\t"
  1490. "xor %ax, %ax \n\t"
  1491. "mov %ax, %ds \n\t"
  1492. "mov %ax, %es \n\t"
  1493. "mov %ax, %ss \n\t"
  1494. "mov %ax, %fs \n\t"
  1495. "mov %ax, %gs \n\t"
  1496. "mov $stacktop, %esp\n\t"
  1497. "ljmp $0, $realmode_start \n\t"
  1498. ".code16gcc \n\t"
  1499. );