realmode.c 53 KB

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  1. #ifndef USE_SERIAL
  2. #define USE_SERIAL
  3. #endif
  4. #define ARRAY_SIZE(_a) (sizeof(_a)/sizeof((_a)[0]))
  5. asm(".code16gcc");
  6. typedef unsigned char u8;
  7. typedef unsigned short u16;
  8. typedef unsigned u32;
  9. typedef unsigned long long u64;
  10. #ifndef NULL
  11. #define NULL ((void*)0)
  12. #endif
  13. void realmode_start(void);
  14. void test_function(void);
  15. asm(
  16. "test_function: \n\t"
  17. "mov $0x1234, %eax \n\t"
  18. "ret"
  19. );
  20. static int strlen(const char *str)
  21. {
  22. int n;
  23. for (n = 0; *str; ++str)
  24. ++n;
  25. return n;
  26. }
  27. static void outb(u8 data, u16 port)
  28. {
  29. asm volatile("out %0, %1" : : "a"(data), "d"(port));
  30. }
  31. #ifdef USE_SERIAL
  32. static int serial_iobase = 0x3f8;
  33. static int serial_inited = 0;
  34. static u8 inb(u16 port)
  35. {
  36. u8 data;
  37. asm volatile("in %1, %0" : "=a"(data) : "d"(port));
  38. return data;
  39. }
  40. static void serial_outb(char ch)
  41. {
  42. u8 lsr;
  43. do {
  44. lsr = inb(serial_iobase + 0x05);
  45. } while (!(lsr & 0x20));
  46. outb(ch, serial_iobase + 0x00);
  47. }
  48. static void serial_init(void)
  49. {
  50. u8 lcr;
  51. /* set DLAB */
  52. lcr = inb(serial_iobase + 0x03);
  53. lcr |= 0x80;
  54. outb(lcr, serial_iobase + 0x03);
  55. /* set baud rate to 115200 */
  56. outb(0x01, serial_iobase + 0x00);
  57. outb(0x00, serial_iobase + 0x01);
  58. /* clear DLAB */
  59. lcr = inb(serial_iobase + 0x03);
  60. lcr &= ~0x80;
  61. outb(lcr, serial_iobase + 0x03);
  62. /* IER: disable interrupts */
  63. outb(0x00, serial_iobase + 0x01);
  64. /* LCR: 8 bits, no parity, one stop bit */
  65. outb(0x03, serial_iobase + 0x03);
  66. /* FCR: disable FIFO queues */
  67. outb(0x00, serial_iobase + 0x02);
  68. /* MCR: RTS, DTR on */
  69. outb(0x03, serial_iobase + 0x04);
  70. }
  71. #endif
  72. static void print_serial(const char *buf)
  73. {
  74. unsigned long len = strlen(buf);
  75. #ifdef USE_SERIAL
  76. unsigned long i;
  77. if (!serial_inited) {
  78. serial_init();
  79. serial_inited = 1;
  80. }
  81. for (i = 0; i < len; i++) {
  82. serial_outb(buf[i]);
  83. }
  84. #else
  85. asm volatile ("addr32/rep/outsb" : "+S"(buf), "+c"(len) : "d"(0xf1));
  86. #endif
  87. }
  88. static void print_serial_u32(u32 value)
  89. {
  90. char n[12], *p;
  91. p = &n[11];
  92. *p = 0;
  93. do {
  94. *--p = '0' + (value % 10);
  95. value /= 10;
  96. } while (value > 0);
  97. print_serial(p);
  98. }
  99. static int failed;
  100. static void exit(int code)
  101. {
  102. outb(code, 0xf4);
  103. if (code == 0)
  104. print_serial("--- DONE: 0 ---\n");
  105. else
  106. print_serial("--- DONE: 1 ---\n");
  107. while (1) {
  108. asm volatile("hlt" ::: "memory");
  109. }
  110. }
  111. struct regs {
  112. u32 eax, ebx, ecx, edx;
  113. u32 esi, edi, esp, ebp;
  114. u32 eip, eflags;
  115. };
  116. struct table_descr {
  117. u16 limit;
  118. void *base;
  119. } __attribute__((packed));
  120. static u64 gdt[] = {
  121. 0,
  122. 0x00cf9b000000ffffull, // flat 32-bit code segment
  123. 0x00cf93000000ffffull, // flat 32-bit data segment
  124. };
  125. static struct table_descr gdt_descr = {
  126. sizeof(gdt) - 1,
  127. gdt,
  128. };
  129. struct insn_desc {
  130. u16 ptr;
  131. u16 len;
  132. };
  133. struct {
  134. u32 stack[128];
  135. char top[];
  136. } tmp_stack;
  137. static struct regs inregs, outregs;
  138. static inline void init_inregs(struct regs *regs)
  139. {
  140. inregs = (struct regs){ 0 };
  141. if (regs)
  142. inregs = *regs;
  143. if (!inregs.esp)
  144. inregs.esp = (unsigned long)&tmp_stack.top;
  145. }
  146. static void exec_in_big_real_mode(struct insn_desc *insn)
  147. {
  148. unsigned long tmp;
  149. static struct regs save;
  150. int i;
  151. extern u8 test_insn[], test_insn_end[];
  152. for (i = 0; i < insn->len; ++i)
  153. test_insn[i] = ((u8 *)(unsigned long)insn->ptr)[i];
  154. for (; i < test_insn_end - test_insn; ++i)
  155. test_insn[i] = 0x90; // nop
  156. save = inregs;
  157. asm volatile(
  158. "lgdtl %[gdt_descr] \n\t"
  159. "mov %%cr0, %[tmp] \n\t"
  160. "or $1, %[tmp] \n\t"
  161. "mov %[tmp], %%cr0 \n\t"
  162. "mov %[bigseg], %%gs \n\t"
  163. "and $-2, %[tmp] \n\t"
  164. "mov %[tmp], %%cr0 \n\t"
  165. /* Save ES, because it is clobbered by some tests. */
  166. "pushw %%es \n\t"
  167. "pushw %[save]+36; popfw \n\t"
  168. "xchg %%eax, %[save]+0 \n\t"
  169. "xchg %%ebx, %[save]+4 \n\t"
  170. "xchg %%ecx, %[save]+8 \n\t"
  171. "xchg %%edx, %[save]+12 \n\t"
  172. "xchg %%esi, %[save]+16 \n\t"
  173. "xchg %%edi, %[save]+20 \n\t"
  174. "xchg %%esp, %[save]+24 \n\t"
  175. "xchg %%ebp, %[save]+28 \n\t"
  176. "test_insn: . = . + 32\n\t"
  177. "test_insn_end: \n\t"
  178. "xchg %%eax, %[save]+0 \n\t"
  179. "xchg %%ebx, %[save]+4 \n\t"
  180. "xchg %%ecx, %[save]+8 \n\t"
  181. "xchg %%edx, %[save]+12 \n\t"
  182. "xchg %%esi, %[save]+16 \n\t"
  183. "xchg %%edi, %[save]+20 \n\t"
  184. "xchg %%esp, %[save]+24 \n\t"
  185. "xchg %%ebp, %[save]+28 \n\t"
  186. /* Save EFLAGS in outregs*/
  187. "pushfl \n\t"
  188. "popl %[save]+36 \n\t"
  189. /* Restore ES for future rep string operations. */
  190. "popw %%es \n\t"
  191. /* Restore DF for the harness code */
  192. "cld\n\t"
  193. "xor %[tmp], %[tmp] \n\t"
  194. "mov %[tmp], %%gs \n\t"
  195. : [tmp]"=&r"(tmp), [save]"+m"(save)
  196. : [gdt_descr]"m"(gdt_descr), [bigseg]"r"((short)16)
  197. : "cc", "memory"
  198. );
  199. outregs = save;
  200. }
  201. #define R_AX 1
  202. #define R_BX 2
  203. #define R_CX 4
  204. #define R_DX 8
  205. #define R_SI 16
  206. #define R_DI 32
  207. #define R_SP 64
  208. #define R_BP 128
  209. static int regs_equal(int ignore)
  210. {
  211. const u32 *p1 = &inregs.eax, *p2 = &outregs.eax; // yuck
  212. int i;
  213. for (i = 0; i < 8; ++i)
  214. if (!(ignore & (1 << i)) && p1[i] != p2[i])
  215. return 0;
  216. return 1;
  217. }
  218. static void report(const char *name, u16 regs_ignore, _Bool ok)
  219. {
  220. if (!regs_equal(regs_ignore)) {
  221. ok = 0;
  222. }
  223. print_serial(ok ? "PASS: " : "FAIL: ");
  224. print_serial(name);
  225. print_serial("\n");
  226. if (!ok)
  227. failed = 1;
  228. }
  229. #define MK_INSN(name, str) \
  230. asm ( \
  231. ".pushsection .data.insn \n\t" \
  232. "insn_" #name ": \n\t" \
  233. ".word 1001f, 1002f - 1001f \n\t" \
  234. ".popsection \n\t" \
  235. ".pushsection .text.insn, \"ax\" \n\t" \
  236. "1001: \n\t" \
  237. "insn_code_" #name ": " str " \n\t" \
  238. "1002: \n\t" \
  239. ".popsection" \
  240. ); \
  241. extern struct insn_desc insn_##name;
  242. static void test_xchg(void)
  243. {
  244. MK_INSN(xchg_test1, "xchg %eax,%eax\n\t");
  245. MK_INSN(xchg_test2, "xchg %eax,%ebx\n\t");
  246. MK_INSN(xchg_test3, "xchg %eax,%ecx\n\t");
  247. MK_INSN(xchg_test4, "xchg %eax,%edx\n\t");
  248. MK_INSN(xchg_test5, "xchg %eax,%esi\n\t");
  249. MK_INSN(xchg_test6, "xchg %eax,%edi\n\t");
  250. MK_INSN(xchg_test7, "xchg %eax,%ebp\n\t");
  251. MK_INSN(xchg_test8, "xchg %eax,%esp\n\t");
  252. inregs = (struct regs){ .eax = 0, .ebx = 1, .ecx = 2, .edx = 3, .esi = 4, .edi = 5, .ebp = 6, .esp = 7};
  253. exec_in_big_real_mode(&insn_xchg_test1);
  254. report("xchg 1", 0, 1);
  255. exec_in_big_real_mode(&insn_xchg_test2);
  256. report("xchg 2", R_AX | R_BX,
  257. outregs.eax == inregs.ebx && outregs.ebx == inregs.eax);
  258. exec_in_big_real_mode(&insn_xchg_test3);
  259. report("xchg 3", R_AX | R_CX,
  260. outregs.eax == inregs.ecx && outregs.ecx == inregs.eax);
  261. exec_in_big_real_mode(&insn_xchg_test4);
  262. report("xchg 4", R_AX | R_DX,
  263. outregs.eax == inregs.edx && outregs.edx == inregs.eax);
  264. exec_in_big_real_mode(&insn_xchg_test5);
  265. report("xchg 5", R_AX | R_SI,
  266. outregs.eax == inregs.esi && outregs.esi == inregs.eax);
  267. exec_in_big_real_mode(&insn_xchg_test6);
  268. report("xchg 6", R_AX | R_DI,
  269. outregs.eax == inregs.edi && outregs.edi == inregs.eax);
  270. exec_in_big_real_mode(&insn_xchg_test7);
  271. report("xchg 7", R_AX | R_BP,
  272. outregs.eax == inregs.ebp && outregs.ebp == inregs.eax);
  273. exec_in_big_real_mode(&insn_xchg_test8);
  274. report("xchg 8", R_AX | R_SP,
  275. outregs.eax == inregs.esp && outregs.esp == inregs.eax);
  276. }
  277. static void test_shld(void)
  278. {
  279. MK_INSN(shld_test, "shld $8,%edx,%eax\n\t");
  280. init_inregs(&(struct regs){ .eax = 0xbe, .edx = 0xef000000 });
  281. exec_in_big_real_mode(&insn_shld_test);
  282. report("shld", ~0, outregs.eax == 0xbeef);
  283. }
  284. static void test_mov_imm(void)
  285. {
  286. MK_INSN(mov_r32_imm_1, "mov $1234567890, %eax");
  287. MK_INSN(mov_r16_imm_1, "mov $1234, %ax");
  288. MK_INSN(mov_r8_imm_1, "mov $0x12, %ah");
  289. MK_INSN(mov_r8_imm_2, "mov $0x34, %al");
  290. MK_INSN(mov_r8_imm_3, "mov $0x12, %ah\n\t" "mov $0x34, %al\n\t");
  291. init_inregs(NULL);
  292. exec_in_big_real_mode(&insn_mov_r16_imm_1);
  293. report("mov 1", R_AX, outregs.eax == 1234);
  294. /* test mov $imm, %eax */
  295. exec_in_big_real_mode(&insn_mov_r32_imm_1);
  296. report("mov 2", R_AX, outregs.eax == 1234567890);
  297. /* test mov $imm, %al/%ah */
  298. exec_in_big_real_mode(&insn_mov_r8_imm_1);
  299. report("mov 3", R_AX, outregs.eax == 0x1200);
  300. exec_in_big_real_mode(&insn_mov_r8_imm_2);
  301. report("mov 4", R_AX, outregs.eax == 0x34);
  302. exec_in_big_real_mode(&insn_mov_r8_imm_3);
  303. report("mov 5", R_AX, outregs.eax == 0x1234);
  304. }
  305. static void test_sub_imm(void)
  306. {
  307. MK_INSN(sub_r32_imm_1, "mov $1234567890, %eax\n\t" "sub $10, %eax\n\t");
  308. MK_INSN(sub_r16_imm_1, "mov $1234, %ax\n\t" "sub $10, %ax\n\t");
  309. MK_INSN(sub_r8_imm_1, "mov $0x12, %ah\n\t" "sub $0x10, %ah\n\t");
  310. MK_INSN(sub_r8_imm_2, "mov $0x34, %al\n\t" "sub $0x10, %al\n\t");
  311. init_inregs(NULL);
  312. exec_in_big_real_mode(&insn_sub_r16_imm_1);
  313. report("sub 1", R_AX, outregs.eax == 1224);
  314. /* test mov $imm, %eax */
  315. exec_in_big_real_mode(&insn_sub_r32_imm_1);
  316. report("sub 2", R_AX, outregs.eax == 1234567880);
  317. /* test mov $imm, %al/%ah */
  318. exec_in_big_real_mode(&insn_sub_r8_imm_1);
  319. report("sub 3", R_AX, outregs.eax == 0x0200);
  320. exec_in_big_real_mode(&insn_sub_r8_imm_2);
  321. report("sub 4", R_AX, outregs.eax == 0x24);
  322. }
  323. static void test_xor_imm(void)
  324. {
  325. MK_INSN(xor_r32_imm_1, "mov $1234567890, %eax\n\t" "xor $1234567890, %eax\n\t");
  326. MK_INSN(xor_r16_imm_1, "mov $1234, %ax\n\t" "xor $1234, %ax\n\t");
  327. MK_INSN(xor_r8_imm_1, "mov $0x12, %ah\n\t" "xor $0x12, %ah\n\t");
  328. MK_INSN(xor_r8_imm_2, "mov $0x34, %al\n\t" "xor $0x34, %al\n\t");
  329. init_inregs(NULL);
  330. exec_in_big_real_mode(&insn_xor_r16_imm_1);
  331. report("xor 1", R_AX, outregs.eax == 0);
  332. /* test mov $imm, %eax */
  333. exec_in_big_real_mode(&insn_xor_r32_imm_1);
  334. report("xor 2", R_AX, outregs.eax == 0);
  335. /* test mov $imm, %al/%ah */
  336. exec_in_big_real_mode(&insn_xor_r8_imm_1);
  337. report("xor 3", R_AX, outregs.eax == 0);
  338. exec_in_big_real_mode(&insn_xor_r8_imm_2);
  339. report("xor 4", R_AX, outregs.eax == 0);
  340. }
  341. static void test_cmp_imm(void)
  342. {
  343. MK_INSN(cmp_test1, "mov $0x34, %al\n\t"
  344. "cmp $0x34, %al\n\t");
  345. MK_INSN(cmp_test2, "mov $0x34, %al\n\t"
  346. "cmp $0x39, %al\n\t");
  347. MK_INSN(cmp_test3, "mov $0x34, %al\n\t"
  348. "cmp $0x24, %al\n\t");
  349. init_inregs(NULL);
  350. /* test cmp imm8 with AL */
  351. /* ZF: (bit 6) Zero Flag becomes 1 if an operation results
  352. * in a 0 writeback, or 0 register
  353. */
  354. exec_in_big_real_mode(&insn_cmp_test1);
  355. report("cmp 1", ~0, (outregs.eflags & (1<<6)) == (1<<6));
  356. exec_in_big_real_mode(&insn_cmp_test2);
  357. report("cmp 2", ~0, (outregs.eflags & (1<<6)) == 0);
  358. exec_in_big_real_mode(&insn_cmp_test3);
  359. report("cmp 3", ~0, (outregs.eflags & (1<<6)) == 0);
  360. }
  361. static void test_add_imm(void)
  362. {
  363. MK_INSN(add_test1, "mov $0x43211234, %eax \n\t"
  364. "add $0x12344321, %eax \n\t");
  365. MK_INSN(add_test2, "mov $0x12, %eax \n\t"
  366. "add $0x21, %al\n\t");
  367. init_inregs(NULL);
  368. exec_in_big_real_mode(&insn_add_test1);
  369. report("add 1", ~0, outregs.eax == 0x55555555);
  370. exec_in_big_real_mode(&insn_add_test2);
  371. report("add 2", ~0, outregs.eax == 0x33);
  372. }
  373. static void test_eflags_insn(void)
  374. {
  375. MK_INSN(clc, "clc");
  376. MK_INSN(stc, "stc");
  377. MK_INSN(cli, "cli");
  378. MK_INSN(sti, "sti");
  379. MK_INSN(cld, "cld");
  380. MK_INSN(std, "std");
  381. init_inregs(NULL);
  382. exec_in_big_real_mode(&insn_clc);
  383. report("clc", ~0, (outregs.eflags & 1) == 0);
  384. exec_in_big_real_mode(&insn_stc);
  385. report("stc", ~0, (outregs.eflags & 1) == 1);
  386. exec_in_big_real_mode(&insn_cli);
  387. report("cli", ~0, !(outregs.eflags & (1 << 9)));
  388. exec_in_big_real_mode(&insn_sti);
  389. report("sti", ~0, outregs.eflags & (1 << 9));
  390. exec_in_big_real_mode(&insn_cld);
  391. report("cld", ~0, !(outregs.eflags & (1 << 10)));
  392. exec_in_big_real_mode(&insn_std);
  393. report("std", ~0, (outregs.eflags & (1 << 10)));
  394. }
  395. static void test_io(void)
  396. {
  397. MK_INSN(io_test1, "mov $0xff, %al \n\t"
  398. "out %al, $0xe0 \n\t"
  399. "mov $0x00, %al \n\t"
  400. "in $0xe0, %al \n\t");
  401. MK_INSN(io_test2, "mov $0xffff, %ax \n\t"
  402. "out %ax, $0xe0 \n\t"
  403. "mov $0x0000, %ax \n\t"
  404. "in $0xe0, %ax \n\t");
  405. MK_INSN(io_test3, "mov $0xffffffff, %eax \n\t"
  406. "out %eax, $0xe0 \n\t"
  407. "mov $0x000000, %eax \n\t"
  408. "in $0xe0, %eax \n\t");
  409. MK_INSN(io_test4, "mov $0xe0, %dx \n\t"
  410. "mov $0xff, %al \n\t"
  411. "out %al, %dx \n\t"
  412. "mov $0x00, %al \n\t"
  413. "in %dx, %al \n\t");
  414. MK_INSN(io_test5, "mov $0xe0, %dx \n\t"
  415. "mov $0xffff, %ax \n\t"
  416. "out %ax, %dx \n\t"
  417. "mov $0x0000, %ax \n\t"
  418. "in %dx, %ax \n\t");
  419. MK_INSN(io_test6, "mov $0xe0, %dx \n\t"
  420. "mov $0xffffffff, %eax \n\t"
  421. "out %eax, %dx \n\t"
  422. "mov $0x00000000, %eax \n\t"
  423. "in %dx, %eax \n\t");
  424. init_inregs(NULL);
  425. exec_in_big_real_mode(&insn_io_test1);
  426. report("pio 1", R_AX, outregs.eax == 0xff);
  427. exec_in_big_real_mode(&insn_io_test2);
  428. report("pio 2", R_AX, outregs.eax == 0xffff);
  429. exec_in_big_real_mode(&insn_io_test3);
  430. report("pio 3", R_AX, outregs.eax == 0xffffffff);
  431. exec_in_big_real_mode(&insn_io_test4);
  432. report("pio 4", R_AX|R_DX, outregs.eax == 0xff);
  433. exec_in_big_real_mode(&insn_io_test5);
  434. report("pio 5", R_AX|R_DX, outregs.eax == 0xffff);
  435. exec_in_big_real_mode(&insn_io_test6);
  436. report("pio 6", R_AX|R_DX, outregs.eax == 0xffffffff);
  437. }
  438. asm ("retf: lretw");
  439. extern void retf(void);
  440. asm ("retf_imm: lretw $10");
  441. extern void retf_imm(void);
  442. static void test_call(void)
  443. {
  444. u32 addr;
  445. MK_INSN(call1, "mov $test_function, %eax \n\t"
  446. "call *%eax\n\t");
  447. MK_INSN(call_near1, "jmp 2f\n\t"
  448. "1: mov $0x1234, %eax\n\t"
  449. "ret\n\t"
  450. "2: call 1b\t");
  451. MK_INSN(call_near2, "call 1f\n\t"
  452. "jmp 2f\n\t"
  453. "1: mov $0x1234, %eax\n\t"
  454. "ret\n\t"
  455. "2:\t");
  456. MK_INSN(call_far1, "lcallw *(%ebx)\n\t");
  457. MK_INSN(call_far2, "lcallw $0, $retf\n\t");
  458. MK_INSN(ret_imm, "sub $10, %sp; jmp 2f; 1: retw $10; 2: callw 1b");
  459. MK_INSN(retf_imm, "sub $10, %sp; lcallw $0, $retf_imm");
  460. init_inregs(NULL);
  461. exec_in_big_real_mode(&insn_call1);
  462. report("call 1", R_AX, outregs.eax == 0x1234);
  463. exec_in_big_real_mode(&insn_call_near1);
  464. report("call near 1", R_AX, outregs.eax == 0x1234);
  465. exec_in_big_real_mode(&insn_call_near2);
  466. report("call near 2", R_AX, outregs.eax == 0x1234);
  467. addr = (((unsigned)retf >> 4) << 16) | ((unsigned)retf & 0x0f);
  468. inregs.ebx = (unsigned)&addr;
  469. exec_in_big_real_mode(&insn_call_far1);
  470. report("call far 1", 0, 1);
  471. exec_in_big_real_mode(&insn_call_far2);
  472. report("call far 2", 0, 1);
  473. exec_in_big_real_mode(&insn_ret_imm);
  474. report("ret imm 1", 0, 1);
  475. exec_in_big_real_mode(&insn_retf_imm);
  476. report("retf imm 1", 0, 1);
  477. }
  478. static void test_jcc_short(void)
  479. {
  480. MK_INSN(jnz_short1, "jnz 1f\n\t"
  481. "mov $0x1234, %eax\n\t"
  482. "1:\n\t");
  483. MK_INSN(jnz_short2, "1:\n\t"
  484. "cmp $0x1234, %eax\n\t"
  485. "mov $0x1234, %eax\n\t"
  486. "jnz 1b\n\t");
  487. MK_INSN(jmp_short1, "jmp 1f\n\t"
  488. "mov $0x1234, %eax\n\t"
  489. "1:\n\t");
  490. init_inregs(NULL);
  491. exec_in_big_real_mode(&insn_jnz_short1);
  492. report("jnz short 1", ~0, 1);
  493. exec_in_big_real_mode(&insn_jnz_short2);
  494. report("jnz short 2", R_AX, (outregs.eflags & (1 << 6)));
  495. exec_in_big_real_mode(&insn_jmp_short1);
  496. report("jmp short 1", ~0, 1);
  497. }
  498. static void test_jcc_near(void)
  499. {
  500. /* encode near jmp manually. gas will not do it if offsets < 127 byte */
  501. MK_INSN(jnz_near1, ".byte 0x0f, 0x85, 0x06, 0x00\n\t"
  502. "mov $0x1234, %eax\n\t");
  503. MK_INSN(jnz_near2, "cmp $0x1234, %eax\n\t"
  504. "mov $0x1234, %eax\n\t"
  505. ".byte 0x0f, 0x85, 0xf0, 0xff\n\t");
  506. MK_INSN(jmp_near1, ".byte 0xE9, 0x06, 0x00\n\t"
  507. "mov $0x1234, %eax\n\t");
  508. init_inregs(NULL);
  509. exec_in_big_real_mode(&insn_jnz_near1);
  510. report("jnz near 1", 0, 1);
  511. exec_in_big_real_mode(&insn_jnz_near2);
  512. report("jnz near 2", R_AX, outregs.eflags & (1 << 6));
  513. exec_in_big_real_mode(&insn_jmp_near1);
  514. report("jmp near 1", 0, 1);
  515. }
  516. static void test_long_jmp(void)
  517. {
  518. MK_INSN(long_jmp, "calll 1f\n\t"
  519. "jmp 2f\n\t"
  520. "1: jmp $0, $test_function\n\t"
  521. "2:\n\t");
  522. init_inregs(NULL);
  523. exec_in_big_real_mode(&insn_long_jmp);
  524. report("jmp far 1", R_AX, outregs.eax == 0x1234);
  525. }
  526. static void test_push_pop(void)
  527. {
  528. MK_INSN(push32, "mov $0x12345678, %eax\n\t"
  529. "push %eax\n\t"
  530. "pop %ebx\n\t");
  531. MK_INSN(push16, "mov $0x1234, %ax\n\t"
  532. "push %ax\n\t"
  533. "pop %bx\n\t");
  534. MK_INSN(push_es, "mov $0x231, %bx\n\t" //Just write a dummy value to see if it gets overwritten
  535. "mov $0x123, %ax\n\t"
  536. "mov %ax, %es\n\t"
  537. "pushw %es\n\t"
  538. "pop %bx \n\t"
  539. );
  540. MK_INSN(pop_es, "push %ax\n\t"
  541. "popw %es\n\t"
  542. "mov %es, %bx\n\t"
  543. );
  544. MK_INSN(push_pop_ss, "pushw %ss\n\t"
  545. "pushw %ax\n\t"
  546. "popw %ss\n\t"
  547. "mov %ss, %bx\n\t"
  548. "popw %ss\n\t"
  549. );
  550. MK_INSN(push_pop_fs, "pushl %fs\n\t"
  551. "pushl %eax\n\t"
  552. "popl %fs\n\t"
  553. "mov %fs, %ebx\n\t"
  554. "popl %fs\n\t"
  555. );
  556. MK_INSN(push_pop_high_esp_bits,
  557. "xor $0x12340000, %esp \n\t"
  558. "push %ax; \n\t"
  559. "xor $0x12340000, %esp \n\t"
  560. "pop %bx");
  561. init_inregs(NULL);
  562. exec_in_big_real_mode(&insn_push32);
  563. report("push/pop 1", R_AX|R_BX,
  564. outregs.eax == outregs.ebx && outregs.eax == 0x12345678);
  565. exec_in_big_real_mode(&insn_push16);
  566. report("push/pop 2", R_AX|R_BX,
  567. outregs.eax == outregs.ebx && outregs.eax == 0x1234);
  568. exec_in_big_real_mode(&insn_push_es);
  569. report("push/pop 3", R_AX|R_BX,
  570. outregs.ebx == outregs.eax && outregs.eax == 0x123);
  571. exec_in_big_real_mode(&insn_pop_es);
  572. report("push/pop 4", R_AX|R_BX, outregs.ebx == outregs.eax);
  573. exec_in_big_real_mode(&insn_push_pop_ss);
  574. report("push/pop 5", R_AX|R_BX, outregs.ebx == outregs.eax);
  575. exec_in_big_real_mode(&insn_push_pop_fs);
  576. report("push/pop 6", R_AX|R_BX, outregs.ebx == outregs.eax);
  577. inregs.eax = 0x9977;
  578. inregs.ebx = 0x7799;
  579. exec_in_big_real_mode(&insn_push_pop_high_esp_bits);
  580. report("push/pop with high bits set in %esp", R_BX, outregs.ebx == 0x9977);
  581. }
  582. static void test_null(void)
  583. {
  584. MK_INSN(null, "");
  585. init_inregs(NULL);
  586. exec_in_big_real_mode(&insn_null);
  587. report("null", 0, 1);
  588. }
  589. static void test_pusha_popa(void)
  590. {
  591. MK_INSN(pusha, "pushal\n\t"
  592. "popl %edi\n\t"
  593. "popl %esi\n\t"
  594. "popl %ebp\n\t"
  595. "addl $4, %esp\n\t"
  596. "popl %ebx\n\t"
  597. "popl %edx\n\t"
  598. "popl %ecx\n\t"
  599. "popl %eax\n\t"
  600. );
  601. MK_INSN(popa, "pushl %eax\n\t"
  602. "pushl %ecx\n\t"
  603. "pushl %edx\n\t"
  604. "pushl %ebx\n\t"
  605. "pushl %esp\n\t"
  606. "pushl %ebp\n\t"
  607. "pushl %esi\n\t"
  608. "pushl %edi\n\t"
  609. "popal\n\t"
  610. );
  611. init_inregs(&(struct regs){ .eax = 0, .ebx = 1, .ecx = 2, .edx = 3, .esi = 4, .edi = 5, .ebp = 6 });
  612. exec_in_big_real_mode(&insn_pusha);
  613. report("pusha/popa 1", 0, 1);
  614. exec_in_big_real_mode(&insn_popa);
  615. report("pusha/popa 1", 0, 1);
  616. }
  617. static void test_iret(void)
  618. {
  619. MK_INSN(iret32, "pushfl\n\t"
  620. "pushl %cs\n\t"
  621. "calll 1f\n\t" /* a near call will push eip onto the stack */
  622. "jmp 2f\n\t"
  623. "1: iretl\n\t"
  624. "2:\n\t"
  625. );
  626. MK_INSN(iret16, "pushfw\n\t"
  627. "pushw %cs\n\t"
  628. "callw 1f\n\t"
  629. "jmp 2f\n\t"
  630. "1: iretw\n\t"
  631. "2:\n\t");
  632. MK_INSN(iret_flags32, "pushfl\n\t"
  633. "popl %eax\n\t"
  634. "andl $~0x2, %eax\n\t"
  635. "orl $0xffc18028, %eax\n\t"
  636. "pushl %eax\n\t"
  637. "pushl %cs\n\t"
  638. "calll 1f\n\t"
  639. "jmp 2f\n\t"
  640. "1: iretl\n\t"
  641. "2:\n\t");
  642. MK_INSN(iret_flags16, "pushfw\n\t"
  643. "popw %ax\n\t"
  644. "and $~0x2, %ax\n\t"
  645. "or $0x8028, %ax\n\t"
  646. "pushw %ax\n\t"
  647. "pushw %cs\n\t"
  648. "callw 1f\n\t"
  649. "jmp 2f\n\t"
  650. "1: iretw\n\t"
  651. "2:\n\t");
  652. init_inregs(NULL);
  653. exec_in_big_real_mode(&insn_iret32);
  654. report("iret 1", 0, 1);
  655. exec_in_big_real_mode(&insn_iret16);
  656. report("iret 2", 0, 1);
  657. exec_in_big_real_mode(&insn_iret_flags32);
  658. report("iret 3", R_AX, 1);
  659. report("rflags.rf", ~0, !(outregs.eflags & (1 << 16)));
  660. exec_in_big_real_mode(&insn_iret_flags16);
  661. report("iret 4", R_AX, 1);
  662. }
  663. static void test_int(void)
  664. {
  665. init_inregs(NULL);
  666. *(u32 *)(0x11 * 4) = 0x1000; /* Store a pointer to address 0x1000 in IDT entry 0x11 */
  667. *(u8 *)(0x1000) = 0xcf; /* 0x1000 contains an IRET instruction */
  668. MK_INSN(int11, "int $0x11\n\t");
  669. exec_in_big_real_mode(&insn_int11);
  670. report("int 1", 0, 1);
  671. }
  672. static void test_sti_inhibit(void)
  673. {
  674. init_inregs(NULL);
  675. *(u32 *)(0x73 * 4) = 0x1000; /* Store IRQ 11 handler in the IDT */
  676. *(u8 *)(0x1000) = 0xcf; /* 0x1000 contains an IRET instruction */
  677. MK_INSN(sti_inhibit, "cli\n\t"
  678. "movw $0x200b, %dx\n\t"
  679. "movl $1, %eax\n\t"
  680. "outl %eax, %dx\n\t" /* Set IRQ11 */
  681. "movl $0, %eax\n\t"
  682. "outl %eax, %dx\n\t" /* Clear IRQ11 */
  683. "sti\n\t"
  684. "hlt\n\t");
  685. exec_in_big_real_mode(&insn_sti_inhibit);
  686. report("sti inhibit", ~0, 1);
  687. }
  688. static void test_imul(void)
  689. {
  690. MK_INSN(imul8_1, "mov $2, %al\n\t"
  691. "mov $-4, %cx\n\t"
  692. "imul %cl\n\t");
  693. MK_INSN(imul16_1, "mov $2, %ax\n\t"
  694. "mov $-4, %cx\n\t"
  695. "imul %cx\n\t");
  696. MK_INSN(imul32_1, "mov $2, %eax\n\t"
  697. "mov $-4, %ecx\n\t"
  698. "imul %ecx\n\t");
  699. MK_INSN(imul8_2, "mov $0x12340002, %eax\n\t"
  700. "mov $4, %cx\n\t"
  701. "imul %cl\n\t");
  702. MK_INSN(imul16_2, "mov $2, %ax\n\t"
  703. "mov $4, %cx\n\t"
  704. "imul %cx\n\t");
  705. MK_INSN(imul32_2, "mov $2, %eax\n\t"
  706. "mov $4, %ecx\n\t"
  707. "imul %ecx\n\t");
  708. init_inregs(NULL);
  709. exec_in_big_real_mode(&insn_imul8_1);
  710. report("imul 1", R_AX | R_CX | R_DX, (outregs.eax & 0xff) == (u8)-8);
  711. exec_in_big_real_mode(&insn_imul16_1);
  712. report("imul 2", R_AX | R_CX | R_DX, outregs.eax == (u16)-8);
  713. exec_in_big_real_mode(&insn_imul32_1);
  714. report("imul 3", R_AX | R_CX | R_DX, outregs.eax == (u32)-8);
  715. exec_in_big_real_mode(&insn_imul8_2);
  716. report("imul 4", R_AX | R_CX | R_DX,
  717. (outregs.eax & 0xffff) == 8
  718. && (outregs.eax & 0xffff0000) == 0x12340000);
  719. exec_in_big_real_mode(&insn_imul16_2);
  720. report("imul 5", R_AX | R_CX | R_DX, outregs.eax == 8);
  721. exec_in_big_real_mode(&insn_imul32_2);
  722. report("imul 6", R_AX | R_CX | R_DX, outregs.eax == 8);
  723. }
  724. static void test_mul(void)
  725. {
  726. MK_INSN(mul8, "mov $2, %al\n\t"
  727. "mov $4, %cx\n\t"
  728. "imul %cl\n\t");
  729. MK_INSN(mul16, "mov $2, %ax\n\t"
  730. "mov $4, %cx\n\t"
  731. "imul %cx\n\t");
  732. MK_INSN(mul32, "mov $2, %eax\n\t"
  733. "mov $4, %ecx\n\t"
  734. "imul %ecx\n\t");
  735. init_inregs(NULL);
  736. exec_in_big_real_mode(&insn_mul8);
  737. report("mul 1", R_AX | R_CX | R_DX, (outregs.eax & 0xff) == 8);
  738. exec_in_big_real_mode(&insn_mul16);
  739. report("mul 2", R_AX | R_CX | R_DX, outregs.eax == 8);
  740. exec_in_big_real_mode(&insn_mul32);
  741. report("mul 3", R_AX | R_CX | R_DX, outregs.eax == 8);
  742. }
  743. static void test_div(void)
  744. {
  745. MK_INSN(div8, "mov $257, %ax\n\t"
  746. "mov $2, %cl\n\t"
  747. "div %cl\n\t");
  748. MK_INSN(div16, "mov $512, %ax\n\t"
  749. "mov $5, %cx\n\t"
  750. "div %cx\n\t");
  751. MK_INSN(div32, "mov $512, %eax\n\t"
  752. "mov $5, %ecx\n\t"
  753. "div %ecx\n\t");
  754. init_inregs(NULL);
  755. exec_in_big_real_mode(&insn_div8);
  756. report("div 1", R_AX | R_CX | R_DX, outregs.eax == 384);
  757. exec_in_big_real_mode(&insn_div16);
  758. report("div 2", R_AX | R_CX | R_DX,
  759. outregs.eax == 102 && outregs.edx == 2);
  760. exec_in_big_real_mode(&insn_div32);
  761. report("div 3", R_AX | R_CX | R_DX,
  762. outregs.eax == 102 && outregs.edx == 2);
  763. }
  764. static void test_idiv(void)
  765. {
  766. MK_INSN(idiv8, "mov $256, %ax\n\t"
  767. "mov $-2, %cl\n\t"
  768. "idiv %cl\n\t");
  769. MK_INSN(idiv16, "mov $512, %ax\n\t"
  770. "mov $-2, %cx\n\t"
  771. "idiv %cx\n\t");
  772. MK_INSN(idiv32, "mov $512, %eax\n\t"
  773. "mov $-2, %ecx\n\t"
  774. "idiv %ecx\n\t");
  775. init_inregs(NULL);
  776. exec_in_big_real_mode(&insn_idiv8);
  777. report("idiv 1", R_AX | R_CX | R_DX, outregs.eax == (u8)-128);
  778. exec_in_big_real_mode(&insn_idiv16);
  779. report("idiv 2", R_AX | R_CX | R_DX, outregs.eax == (u16)-256);
  780. exec_in_big_real_mode(&insn_idiv32);
  781. report("idiv 3", R_AX | R_CX | R_DX, outregs.eax == (u32)-256);
  782. }
  783. static void test_cbw(void)
  784. {
  785. MK_INSN(cbw, "mov $0xFE, %eax \n\t"
  786. "cbw\n\t");
  787. MK_INSN(cwde, "mov $0xFFFE, %eax \n\t"
  788. "cwde\n\t");
  789. init_inregs(NULL);
  790. exec_in_big_real_mode(&insn_cbw);
  791. report("cbq 1", ~0, outregs.eax == 0xFFFE);
  792. exec_in_big_real_mode(&insn_cwde);
  793. report("cwde 1", ~0, outregs.eax == 0xFFFFFFFE);
  794. }
  795. static void test_loopcc(void)
  796. {
  797. MK_INSN(loop, "mov $10, %ecx\n\t"
  798. "1: inc %eax\n\t"
  799. "loop 1b\n\t");
  800. MK_INSN(loope, "mov $10, %ecx\n\t"
  801. "mov $1, %eax\n\t"
  802. "1: dec %eax\n\t"
  803. "loope 1b\n\t");
  804. MK_INSN(loopne, "mov $10, %ecx\n\t"
  805. "mov $5, %eax\n\t"
  806. "1: dec %eax\n\t"
  807. "loopne 1b\n\t");
  808. init_inregs(NULL);
  809. exec_in_big_real_mode(&insn_loop);
  810. report("LOOPcc short 1", R_AX, outregs.eax == 10);
  811. exec_in_big_real_mode(&insn_loope);
  812. report("LOOPcc short 2", R_AX | R_CX,
  813. outregs.eax == -1 && outregs.ecx == 8);
  814. exec_in_big_real_mode(&insn_loopne);
  815. report("LOOPcc short 3", R_AX | R_CX,
  816. outregs.eax == 0 && outregs.ecx == 5);
  817. }
  818. static void test_das(void)
  819. {
  820. short i;
  821. u16 nr_fail = 0;
  822. static unsigned test_cases[1024] = {
  823. 0x46000000, 0x8701a000, 0x9710fa00, 0x97119a00,
  824. 0x02000101, 0x8301a101, 0x9310fb01, 0x93119b01,
  825. 0x02000202, 0x8301a202, 0x9710fc02, 0x97119c02,
  826. 0x06000303, 0x8701a303, 0x9310fd03, 0x93119d03,
  827. 0x02000404, 0x8301a404, 0x9310fe04, 0x93119e04,
  828. 0x06000505, 0x8701a505, 0x9710ff05, 0x97119f05,
  829. 0x06000606, 0x8701a606, 0x56100006, 0x9711a006,
  830. 0x02000707, 0x8301a707, 0x12100107, 0x9311a107,
  831. 0x02000808, 0x8301a808, 0x12100208, 0x9311a208,
  832. 0x06000909, 0x8701a909, 0x16100309, 0x9711a309,
  833. 0x1200040a, 0x9301a40a, 0x1210040a, 0x9311a40a,
  834. 0x1600050b, 0x9701a50b, 0x1610050b, 0x9711a50b,
  835. 0x1600060c, 0x9701a60c, 0x1610060c, 0x9711a60c,
  836. 0x1200070d, 0x9301a70d, 0x1210070d, 0x9311a70d,
  837. 0x1200080e, 0x9301a80e, 0x1210080e, 0x9311a80e,
  838. 0x1600090f, 0x9701a90f, 0x1610090f, 0x9711a90f,
  839. 0x02001010, 0x8301b010, 0x16100a10, 0x9711aa10,
  840. 0x06001111, 0x8701b111, 0x12100b11, 0x9311ab11,
  841. 0x06001212, 0x8701b212, 0x16100c12, 0x9711ac12,
  842. 0x02001313, 0x8301b313, 0x12100d13, 0x9311ad13,
  843. 0x06001414, 0x8701b414, 0x12100e14, 0x9311ae14,
  844. 0x02001515, 0x8301b515, 0x16100f15, 0x9711af15,
  845. 0x02001616, 0x8301b616, 0x12101016, 0x9311b016,
  846. 0x06001717, 0x8701b717, 0x16101117, 0x9711b117,
  847. 0x06001818, 0x8701b818, 0x16101218, 0x9711b218,
  848. 0x02001919, 0x8301b919, 0x12101319, 0x9311b319,
  849. 0x1600141a, 0x9701b41a, 0x1610141a, 0x9711b41a,
  850. 0x1200151b, 0x9301b51b, 0x1210151b, 0x9311b51b,
  851. 0x1200161c, 0x9301b61c, 0x1210161c, 0x9311b61c,
  852. 0x1600171d, 0x9701b71d, 0x1610171d, 0x9711b71d,
  853. 0x1600181e, 0x9701b81e, 0x1610181e, 0x9711b81e,
  854. 0x1200191f, 0x9301b91f, 0x1210191f, 0x9311b91f,
  855. 0x02002020, 0x8701c020, 0x12101a20, 0x9311ba20,
  856. 0x06002121, 0x8301c121, 0x16101b21, 0x9711bb21,
  857. 0x06002222, 0x8301c222, 0x12101c22, 0x9311bc22,
  858. 0x02002323, 0x8701c323, 0x16101d23, 0x9711bd23,
  859. 0x06002424, 0x8301c424, 0x16101e24, 0x9711be24,
  860. 0x02002525, 0x8701c525, 0x12101f25, 0x9311bf25,
  861. 0x02002626, 0x8701c626, 0x12102026, 0x9711c026,
  862. 0x06002727, 0x8301c727, 0x16102127, 0x9311c127,
  863. 0x06002828, 0x8301c828, 0x16102228, 0x9311c228,
  864. 0x02002929, 0x8701c929, 0x12102329, 0x9711c329,
  865. 0x1600242a, 0x9301c42a, 0x1610242a, 0x9311c42a,
  866. 0x1200252b, 0x9701c52b, 0x1210252b, 0x9711c52b,
  867. 0x1200262c, 0x9701c62c, 0x1210262c, 0x9711c62c,
  868. 0x1600272d, 0x9301c72d, 0x1610272d, 0x9311c72d,
  869. 0x1600282e, 0x9301c82e, 0x1610282e, 0x9311c82e,
  870. 0x1200292f, 0x9701c92f, 0x1210292f, 0x9711c92f,
  871. 0x06003030, 0x8301d030, 0x12102a30, 0x9711ca30,
  872. 0x02003131, 0x8701d131, 0x16102b31, 0x9311cb31,
  873. 0x02003232, 0x8701d232, 0x12102c32, 0x9711cc32,
  874. 0x06003333, 0x8301d333, 0x16102d33, 0x9311cd33,
  875. 0x02003434, 0x8701d434, 0x16102e34, 0x9311ce34,
  876. 0x06003535, 0x8301d535, 0x12102f35, 0x9711cf35,
  877. 0x06003636, 0x8301d636, 0x16103036, 0x9311d036,
  878. 0x02003737, 0x8701d737, 0x12103137, 0x9711d137,
  879. 0x02003838, 0x8701d838, 0x12103238, 0x9711d238,
  880. 0x06003939, 0x8301d939, 0x16103339, 0x9311d339,
  881. 0x1200343a, 0x9701d43a, 0x1210343a, 0x9711d43a,
  882. 0x1600353b, 0x9301d53b, 0x1610353b, 0x9311d53b,
  883. 0x1600363c, 0x9301d63c, 0x1610363c, 0x9311d63c,
  884. 0x1200373d, 0x9701d73d, 0x1210373d, 0x9711d73d,
  885. 0x1200383e, 0x9701d83e, 0x1210383e, 0x9711d83e,
  886. 0x1600393f, 0x9301d93f, 0x1610393f, 0x9311d93f,
  887. 0x02004040, 0x8301e040, 0x16103a40, 0x9311da40,
  888. 0x06004141, 0x8701e141, 0x12103b41, 0x9711db41,
  889. 0x06004242, 0x8701e242, 0x16103c42, 0x9311dc42,
  890. 0x02004343, 0x8301e343, 0x12103d43, 0x9711dd43,
  891. 0x06004444, 0x8701e444, 0x12103e44, 0x9711de44,
  892. 0x02004545, 0x8301e545, 0x16103f45, 0x9311df45,
  893. 0x02004646, 0x8301e646, 0x12104046, 0x9311e046,
  894. 0x06004747, 0x8701e747, 0x16104147, 0x9711e147,
  895. 0x06004848, 0x8701e848, 0x16104248, 0x9711e248,
  896. 0x02004949, 0x8301e949, 0x12104349, 0x9311e349,
  897. 0x1600444a, 0x9701e44a, 0x1610444a, 0x9711e44a,
  898. 0x1200454b, 0x9301e54b, 0x1210454b, 0x9311e54b,
  899. 0x1200464c, 0x9301e64c, 0x1210464c, 0x9311e64c,
  900. 0x1600474d, 0x9701e74d, 0x1610474d, 0x9711e74d,
  901. 0x1600484e, 0x9701e84e, 0x1610484e, 0x9711e84e,
  902. 0x1200494f, 0x9301e94f, 0x1210494f, 0x9311e94f,
  903. 0x06005050, 0x8701f050, 0x12104a50, 0x9311ea50,
  904. 0x02005151, 0x8301f151, 0x16104b51, 0x9711eb51,
  905. 0x02005252, 0x8301f252, 0x12104c52, 0x9311ec52,
  906. 0x06005353, 0x8701f353, 0x16104d53, 0x9711ed53,
  907. 0x02005454, 0x8301f454, 0x16104e54, 0x9711ee54,
  908. 0x06005555, 0x8701f555, 0x12104f55, 0x9311ef55,
  909. 0x06005656, 0x8701f656, 0x16105056, 0x9711f056,
  910. 0x02005757, 0x8301f757, 0x12105157, 0x9311f157,
  911. 0x02005858, 0x8301f858, 0x12105258, 0x9311f258,
  912. 0x06005959, 0x8701f959, 0x16105359, 0x9711f359,
  913. 0x1200545a, 0x9301f45a, 0x1210545a, 0x9311f45a,
  914. 0x1600555b, 0x9701f55b, 0x1610555b, 0x9711f55b,
  915. 0x1600565c, 0x9701f65c, 0x1610565c, 0x9711f65c,
  916. 0x1200575d, 0x9301f75d, 0x1210575d, 0x9311f75d,
  917. 0x1200585e, 0x9301f85e, 0x1210585e, 0x9311f85e,
  918. 0x1600595f, 0x9701f95f, 0x1610595f, 0x9711f95f,
  919. 0x06006060, 0x47010060, 0x16105a60, 0x9711fa60,
  920. 0x02006161, 0x03010161, 0x12105b61, 0x9311fb61,
  921. 0x02006262, 0x03010262, 0x16105c62, 0x9711fc62,
  922. 0x06006363, 0x07010363, 0x12105d63, 0x9311fd63,
  923. 0x02006464, 0x03010464, 0x12105e64, 0x9311fe64,
  924. 0x06006565, 0x07010565, 0x16105f65, 0x9711ff65,
  925. 0x06006666, 0x07010666, 0x16106066, 0x57110066,
  926. 0x02006767, 0x03010767, 0x12106167, 0x13110167,
  927. 0x02006868, 0x03010868, 0x12106268, 0x13110268,
  928. 0x06006969, 0x07010969, 0x16106369, 0x17110369,
  929. 0x1200646a, 0x1301046a, 0x1210646a, 0x1311046a,
  930. 0x1600656b, 0x1701056b, 0x1610656b, 0x1711056b,
  931. 0x1600666c, 0x1701066c, 0x1610666c, 0x1711066c,
  932. 0x1200676d, 0x1301076d, 0x1210676d, 0x1311076d,
  933. 0x1200686e, 0x1301086e, 0x1210686e, 0x1311086e,
  934. 0x1600696f, 0x1701096f, 0x1610696f, 0x1711096f,
  935. 0x02007070, 0x03011070, 0x16106a70, 0x17110a70,
  936. 0x06007171, 0x07011171, 0x12106b71, 0x13110b71,
  937. 0x06007272, 0x07011272, 0x16106c72, 0x17110c72,
  938. 0x02007373, 0x03011373, 0x12106d73, 0x13110d73,
  939. 0x06007474, 0x07011474, 0x12106e74, 0x13110e74,
  940. 0x02007575, 0x03011575, 0x16106f75, 0x17110f75,
  941. 0x02007676, 0x03011676, 0x12107076, 0x13111076,
  942. 0x06007777, 0x07011777, 0x16107177, 0x17111177,
  943. 0x06007878, 0x07011878, 0x16107278, 0x17111278,
  944. 0x02007979, 0x03011979, 0x12107379, 0x13111379,
  945. 0x1600747a, 0x1701147a, 0x1610747a, 0x1711147a,
  946. 0x1200757b, 0x1301157b, 0x1210757b, 0x1311157b,
  947. 0x1200767c, 0x1301167c, 0x1210767c, 0x1311167c,
  948. 0x1600777d, 0x1701177d, 0x1610777d, 0x1711177d,
  949. 0x1600787e, 0x1701187e, 0x1610787e, 0x1711187e,
  950. 0x1200797f, 0x1301197f, 0x1210797f, 0x1311197f,
  951. 0x82008080, 0x03012080, 0x12107a80, 0x13111a80,
  952. 0x86008181, 0x07012181, 0x16107b81, 0x17111b81,
  953. 0x86008282, 0x07012282, 0x12107c82, 0x13111c82,
  954. 0x82008383, 0x03012383, 0x16107d83, 0x17111d83,
  955. 0x86008484, 0x07012484, 0x16107e84, 0x17111e84,
  956. 0x82008585, 0x03012585, 0x12107f85, 0x13111f85,
  957. 0x82008686, 0x03012686, 0x92108086, 0x13112086,
  958. 0x86008787, 0x07012787, 0x96108187, 0x17112187,
  959. 0x86008888, 0x07012888, 0x96108288, 0x17112288,
  960. 0x82008989, 0x03012989, 0x92108389, 0x13112389,
  961. 0x9600848a, 0x1701248a, 0x9610848a, 0x1711248a,
  962. 0x9200858b, 0x1301258b, 0x9210858b, 0x1311258b,
  963. 0x9200868c, 0x1301268c, 0x9210868c, 0x1311268c,
  964. 0x9600878d, 0x1701278d, 0x9610878d, 0x1711278d,
  965. 0x9600888e, 0x1701288e, 0x9610888e, 0x1711288e,
  966. 0x9200898f, 0x1301298f, 0x9210898f, 0x1311298f,
  967. 0x86009090, 0x07013090, 0x92108a90, 0x13112a90,
  968. 0x82009191, 0x03013191, 0x96108b91, 0x17112b91,
  969. 0x82009292, 0x03013292, 0x92108c92, 0x13112c92,
  970. 0x86009393, 0x07013393, 0x96108d93, 0x17112d93,
  971. 0x82009494, 0x03013494, 0x96108e94, 0x17112e94,
  972. 0x86009595, 0x07013595, 0x92108f95, 0x13112f95,
  973. 0x86009696, 0x07013696, 0x96109096, 0x17113096,
  974. 0x82009797, 0x03013797, 0x92109197, 0x13113197,
  975. 0x82009898, 0x03013898, 0x92109298, 0x13113298,
  976. 0x86009999, 0x07013999, 0x96109399, 0x17113399,
  977. 0x1300349a, 0x1301349a, 0x1310349a, 0x1311349a,
  978. 0x1700359b, 0x1701359b, 0x1710359b, 0x1711359b,
  979. 0x1700369c, 0x1701369c, 0x1710369c, 0x1711369c,
  980. 0x1300379d, 0x1301379d, 0x1310379d, 0x1311379d,
  981. 0x1300389e, 0x1301389e, 0x1310389e, 0x1311389e,
  982. 0x1700399f, 0x1701399f, 0x1710399f, 0x1711399f,
  983. 0x030040a0, 0x030140a0, 0x17103aa0, 0x17113aa0,
  984. 0x070041a1, 0x070141a1, 0x13103ba1, 0x13113ba1,
  985. 0x070042a2, 0x070142a2, 0x17103ca2, 0x17113ca2,
  986. 0x030043a3, 0x030143a3, 0x13103da3, 0x13113da3,
  987. 0x070044a4, 0x070144a4, 0x13103ea4, 0x13113ea4,
  988. 0x030045a5, 0x030145a5, 0x17103fa5, 0x17113fa5,
  989. 0x030046a6, 0x030146a6, 0x131040a6, 0x131140a6,
  990. 0x070047a7, 0x070147a7, 0x171041a7, 0x171141a7,
  991. 0x070048a8, 0x070148a8, 0x171042a8, 0x171142a8,
  992. 0x030049a9, 0x030149a9, 0x131043a9, 0x131143a9,
  993. 0x170044aa, 0x170144aa, 0x171044aa, 0x171144aa,
  994. 0x130045ab, 0x130145ab, 0x131045ab, 0x131145ab,
  995. 0x130046ac, 0x130146ac, 0x131046ac, 0x131146ac,
  996. 0x170047ad, 0x170147ad, 0x171047ad, 0x171147ad,
  997. 0x170048ae, 0x170148ae, 0x171048ae, 0x171148ae,
  998. 0x130049af, 0x130149af, 0x131049af, 0x131149af,
  999. 0x070050b0, 0x070150b0, 0x13104ab0, 0x13114ab0,
  1000. 0x030051b1, 0x030151b1, 0x17104bb1, 0x17114bb1,
  1001. 0x030052b2, 0x030152b2, 0x13104cb2, 0x13114cb2,
  1002. 0x070053b3, 0x070153b3, 0x17104db3, 0x17114db3,
  1003. 0x030054b4, 0x030154b4, 0x17104eb4, 0x17114eb4,
  1004. 0x070055b5, 0x070155b5, 0x13104fb5, 0x13114fb5,
  1005. 0x070056b6, 0x070156b6, 0x171050b6, 0x171150b6,
  1006. 0x030057b7, 0x030157b7, 0x131051b7, 0x131151b7,
  1007. 0x030058b8, 0x030158b8, 0x131052b8, 0x131152b8,
  1008. 0x070059b9, 0x070159b9, 0x171053b9, 0x171153b9,
  1009. 0x130054ba, 0x130154ba, 0x131054ba, 0x131154ba,
  1010. 0x170055bb, 0x170155bb, 0x171055bb, 0x171155bb,
  1011. 0x170056bc, 0x170156bc, 0x171056bc, 0x171156bc,
  1012. 0x130057bd, 0x130157bd, 0x131057bd, 0x131157bd,
  1013. 0x130058be, 0x130158be, 0x131058be, 0x131158be,
  1014. 0x170059bf, 0x170159bf, 0x171059bf, 0x171159bf,
  1015. 0x070060c0, 0x070160c0, 0x17105ac0, 0x17115ac0,
  1016. 0x030061c1, 0x030161c1, 0x13105bc1, 0x13115bc1,
  1017. 0x030062c2, 0x030162c2, 0x17105cc2, 0x17115cc2,
  1018. 0x070063c3, 0x070163c3, 0x13105dc3, 0x13115dc3,
  1019. 0x030064c4, 0x030164c4, 0x13105ec4, 0x13115ec4,
  1020. 0x070065c5, 0x070165c5, 0x17105fc5, 0x17115fc5,
  1021. 0x070066c6, 0x070166c6, 0x171060c6, 0x171160c6,
  1022. 0x030067c7, 0x030167c7, 0x131061c7, 0x131161c7,
  1023. 0x030068c8, 0x030168c8, 0x131062c8, 0x131162c8,
  1024. 0x070069c9, 0x070169c9, 0x171063c9, 0x171163c9,
  1025. 0x130064ca, 0x130164ca, 0x131064ca, 0x131164ca,
  1026. 0x170065cb, 0x170165cb, 0x171065cb, 0x171165cb,
  1027. 0x170066cc, 0x170166cc, 0x171066cc, 0x171166cc,
  1028. 0x130067cd, 0x130167cd, 0x131067cd, 0x131167cd,
  1029. 0x130068ce, 0x130168ce, 0x131068ce, 0x131168ce,
  1030. 0x170069cf, 0x170169cf, 0x171069cf, 0x171169cf,
  1031. 0x030070d0, 0x030170d0, 0x17106ad0, 0x17116ad0,
  1032. 0x070071d1, 0x070171d1, 0x13106bd1, 0x13116bd1,
  1033. 0x070072d2, 0x070172d2, 0x17106cd2, 0x17116cd2,
  1034. 0x030073d3, 0x030173d3, 0x13106dd3, 0x13116dd3,
  1035. 0x070074d4, 0x070174d4, 0x13106ed4, 0x13116ed4,
  1036. 0x030075d5, 0x030175d5, 0x17106fd5, 0x17116fd5,
  1037. 0x030076d6, 0x030176d6, 0x131070d6, 0x131170d6,
  1038. 0x070077d7, 0x070177d7, 0x171071d7, 0x171171d7,
  1039. 0x070078d8, 0x070178d8, 0x171072d8, 0x171172d8,
  1040. 0x030079d9, 0x030179d9, 0x131073d9, 0x131173d9,
  1041. 0x170074da, 0x170174da, 0x171074da, 0x171174da,
  1042. 0x130075db, 0x130175db, 0x131075db, 0x131175db,
  1043. 0x130076dc, 0x130176dc, 0x131076dc, 0x131176dc,
  1044. 0x170077dd, 0x170177dd, 0x171077dd, 0x171177dd,
  1045. 0x170078de, 0x170178de, 0x171078de, 0x171178de,
  1046. 0x130079df, 0x130179df, 0x131079df, 0x131179df,
  1047. 0x830080e0, 0x830180e0, 0x13107ae0, 0x13117ae0,
  1048. 0x870081e1, 0x870181e1, 0x17107be1, 0x17117be1,
  1049. 0x870082e2, 0x870182e2, 0x13107ce2, 0x13117ce2,
  1050. 0x830083e3, 0x830183e3, 0x17107de3, 0x17117de3,
  1051. 0x870084e4, 0x870184e4, 0x17107ee4, 0x17117ee4,
  1052. 0x830085e5, 0x830185e5, 0x13107fe5, 0x13117fe5,
  1053. 0x830086e6, 0x830186e6, 0x931080e6, 0x931180e6,
  1054. 0x870087e7, 0x870187e7, 0x971081e7, 0x971181e7,
  1055. 0x870088e8, 0x870188e8, 0x971082e8, 0x971182e8,
  1056. 0x830089e9, 0x830189e9, 0x931083e9, 0x931183e9,
  1057. 0x970084ea, 0x970184ea, 0x971084ea, 0x971184ea,
  1058. 0x930085eb, 0x930185eb, 0x931085eb, 0x931185eb,
  1059. 0x930086ec, 0x930186ec, 0x931086ec, 0x931186ec,
  1060. 0x970087ed, 0x970187ed, 0x971087ed, 0x971187ed,
  1061. 0x970088ee, 0x970188ee, 0x971088ee, 0x971188ee,
  1062. 0x930089ef, 0x930189ef, 0x931089ef, 0x931189ef,
  1063. 0x870090f0, 0x870190f0, 0x93108af0, 0x93118af0,
  1064. 0x830091f1, 0x830191f1, 0x97108bf1, 0x97118bf1,
  1065. 0x830092f2, 0x830192f2, 0x93108cf2, 0x93118cf2,
  1066. 0x870093f3, 0x870193f3, 0x97108df3, 0x97118df3,
  1067. 0x830094f4, 0x830194f4, 0x97108ef4, 0x97118ef4,
  1068. 0x870095f5, 0x870195f5, 0x93108ff5, 0x93118ff5,
  1069. 0x870096f6, 0x870196f6, 0x971090f6, 0x971190f6,
  1070. 0x830097f7, 0x830197f7, 0x931091f7, 0x931191f7,
  1071. 0x830098f8, 0x830198f8, 0x931092f8, 0x931192f8,
  1072. 0x870099f9, 0x870199f9, 0x971093f9, 0x971193f9,
  1073. 0x930094fa, 0x930194fa, 0x931094fa, 0x931194fa,
  1074. 0x970095fb, 0x970195fb, 0x971095fb, 0x971195fb,
  1075. 0x970096fc, 0x970196fc, 0x971096fc, 0x971196fc,
  1076. 0x930097fd, 0x930197fd, 0x931097fd, 0x931197fd,
  1077. 0x930098fe, 0x930198fe, 0x931098fe, 0x931198fe,
  1078. 0x970099ff, 0x970199ff, 0x971099ff, 0x971199ff,
  1079. };
  1080. MK_INSN(das, "das");
  1081. init_inregs(NULL);
  1082. for (i = 0; i < 1024; ++i) {
  1083. unsigned tmp = test_cases[i];
  1084. inregs.eax = tmp & 0xff;
  1085. inregs.eflags = (tmp >> 16) & 0xff;
  1086. exec_in_big_real_mode(&insn_das);
  1087. if (!regs_equal(R_AX)
  1088. || outregs.eax != ((tmp >> 8) & 0xff)
  1089. || (outregs.eflags & 0xff) != (tmp >> 24)) {
  1090. ++nr_fail;
  1091. break;
  1092. }
  1093. }
  1094. report("DAS", ~0, nr_fail == 0);
  1095. }
  1096. static void test_cwd_cdq(void)
  1097. {
  1098. /* Sign-bit set */
  1099. MK_INSN(cwd_1, "mov $0x8000, %ax\n\t"
  1100. "cwd\n\t");
  1101. /* Sign-bit not set */
  1102. MK_INSN(cwd_2, "mov $0x1000, %ax\n\t"
  1103. "cwd\n\t");
  1104. /* Sign-bit set */
  1105. MK_INSN(cdq_1, "mov $0x80000000, %eax\n\t"
  1106. "cdq\n\t");
  1107. /* Sign-bit not set */
  1108. MK_INSN(cdq_2, "mov $0x10000000, %eax\n\t"
  1109. "cdq\n\t");
  1110. init_inregs(NULL);
  1111. exec_in_big_real_mode(&insn_cwd_1);
  1112. report("cwd 1", R_AX | R_DX,
  1113. outregs.eax == 0x8000 && outregs.edx == 0xffff);
  1114. exec_in_big_real_mode(&insn_cwd_2);
  1115. report("cwd 2", R_AX | R_DX,
  1116. outregs.eax == 0x1000 && outregs.edx == 0);
  1117. exec_in_big_real_mode(&insn_cdq_1);
  1118. report("cdq 1", R_AX | R_DX,
  1119. outregs.eax == 0x80000000 && outregs.edx == 0xffffffff);
  1120. exec_in_big_real_mode(&insn_cdq_2);
  1121. report("cdq 2", R_AX | R_DX,
  1122. outregs.eax == 0x10000000 && outregs.edx == 0);
  1123. }
  1124. static struct {
  1125. void *address;
  1126. unsigned short sel;
  1127. } __attribute__((packed)) desc = {
  1128. (void *)0x1234,
  1129. 0x10,
  1130. };
  1131. static void test_lds_lss(void)
  1132. {
  1133. init_inregs(&(struct regs){ .ebx = (unsigned long)&desc });
  1134. MK_INSN(lds, "pushl %ds\n\t"
  1135. "lds (%ebx), %eax\n\t"
  1136. "mov %ds, %ebx\n\t"
  1137. "popl %ds\n\t");
  1138. exec_in_big_real_mode(&insn_lds);
  1139. report("lds", R_AX | R_BX,
  1140. outregs.eax == (unsigned long)desc.address &&
  1141. outregs.ebx == desc.sel);
  1142. MK_INSN(les, "les (%ebx), %eax\n\t"
  1143. "mov %es, %ebx\n\t");
  1144. exec_in_big_real_mode(&insn_les);
  1145. report("les", R_AX | R_BX,
  1146. outregs.eax == (unsigned long)desc.address &&
  1147. outregs.ebx == desc.sel);
  1148. MK_INSN(lfs, "pushl %fs\n\t"
  1149. "lfs (%ebx), %eax\n\t"
  1150. "mov %fs, %ebx\n\t"
  1151. "popl %fs\n\t");
  1152. exec_in_big_real_mode(&insn_lfs);
  1153. report("lfs", R_AX | R_BX,
  1154. outregs.eax == (unsigned long)desc.address &&
  1155. outregs.ebx == desc.sel);
  1156. MK_INSN(lgs, "pushl %gs\n\t"
  1157. "lgs (%ebx), %eax\n\t"
  1158. "mov %gs, %ebx\n\t"
  1159. "popl %gs\n\t");
  1160. exec_in_big_real_mode(&insn_lgs);
  1161. report("lgs", R_AX | R_BX,
  1162. outregs.eax == (unsigned long)desc.address &&
  1163. outregs.ebx == desc.sel);
  1164. MK_INSN(lss, "mov %ss, %dx\n\t"
  1165. "lss (%ebx), %eax\n\t"
  1166. "mov %ss, %ebx\n\t"
  1167. "mov %dx, %ss\n\t");
  1168. exec_in_big_real_mode(&insn_lss);
  1169. report("lss", R_AX | R_BX,
  1170. outregs.eax == (unsigned long)desc.address &&
  1171. outregs.ebx == desc.sel);
  1172. }
  1173. static void test_jcxz(void)
  1174. {
  1175. MK_INSN(jcxz1, "jcxz 1f\n\t"
  1176. "mov $0x1234, %eax\n\t"
  1177. "1:\n\t");
  1178. MK_INSN(jcxz2, "mov $0x100, %ecx\n\t"
  1179. "jcxz 1f\n\t"
  1180. "mov $0x1234, %eax\n\t"
  1181. "mov $0, %ecx\n\t"
  1182. "1:\n\t");
  1183. MK_INSN(jcxz3, "mov $0x10000, %ecx\n\t"
  1184. "jcxz 1f\n\t"
  1185. "mov $0x1234, %eax\n\t"
  1186. "1:\n\t");
  1187. MK_INSN(jecxz1, "jecxz 1f\n\t"
  1188. "mov $0x1234, %eax\n\t"
  1189. "1:\n\t");
  1190. MK_INSN(jecxz2, "mov $0x10000, %ecx\n\t"
  1191. "jecxz 1f\n\t"
  1192. "mov $0x1234, %eax\n\t"
  1193. "mov $0, %ecx\n\t"
  1194. "1:\n\t");
  1195. init_inregs(NULL);
  1196. exec_in_big_real_mode(&insn_jcxz1);
  1197. report("jcxz short 1", 0, 1);
  1198. exec_in_big_real_mode(&insn_jcxz2);
  1199. report("jcxz short 2", R_AX, outregs.eax == 0x1234);
  1200. exec_in_big_real_mode(&insn_jcxz3);
  1201. report("jcxz short 3", R_CX, outregs.ecx == 0x10000);
  1202. exec_in_big_real_mode(&insn_jecxz1);
  1203. report("jecxz short 1", 0, 1);
  1204. exec_in_big_real_mode(&insn_jecxz2);
  1205. report("jecxz short 2", R_AX, outregs.eax == 0x1234);
  1206. }
  1207. static void test_cpuid(void)
  1208. {
  1209. MK_INSN(cpuid, "cpuid");
  1210. unsigned function = 0x1234;
  1211. unsigned eax, ebx, ecx, edx;
  1212. init_inregs(&(struct regs){ .eax = function });
  1213. eax = inregs.eax;
  1214. ecx = inregs.ecx;
  1215. asm("cpuid" : "+a"(eax), "=b"(ebx), "+c"(ecx), "=d"(edx));
  1216. exec_in_big_real_mode(&insn_cpuid);
  1217. report("cpuid", R_AX|R_BX|R_CX|R_DX,
  1218. outregs.eax == eax && outregs.ebx == ebx
  1219. && outregs.ecx == ecx && outregs.edx == edx);
  1220. }
  1221. static void test_ss_base_for_esp_ebp(void)
  1222. {
  1223. MK_INSN(ssrel1, "mov %ss, %ax; mov %bx, %ss; movl (%ebp), %ebx; mov %ax, %ss");
  1224. MK_INSN(ssrel2, "mov %ss, %ax; mov %bx, %ss; movl (%ebp,%edi,8), %ebx; mov %ax, %ss");
  1225. static unsigned array[] = { 0x12345678, 0, 0, 0, 0x87654321 };
  1226. init_inregs(&(struct regs){ .ebx = 1, .ebp = (unsigned)array });
  1227. exec_in_big_real_mode(&insn_ssrel1);
  1228. report("ss relative addressing (1)", R_AX | R_BX, outregs.ebx == 0x87654321);
  1229. inregs.ebx = 1;
  1230. inregs.ebp = (unsigned)array;
  1231. inregs.edi = 0;
  1232. exec_in_big_real_mode(&insn_ssrel2);
  1233. report("ss relative addressing (2)", R_AX | R_BX, outregs.ebx == 0x87654321);
  1234. }
  1235. extern unsigned long long r_gdt[];
  1236. static void test_sgdt_sidt(void)
  1237. {
  1238. MK_INSN(sgdt, "sgdtw (%eax)");
  1239. MK_INSN(sidt, "sidtw (%eax)");
  1240. struct table_descr x, y;
  1241. init_inregs(&(struct regs){ .eax = (unsigned)&y });
  1242. asm volatile("sgdtw %0" : "=m"(x));
  1243. exec_in_big_real_mode(&insn_sgdt);
  1244. report("sgdt", 0, x.limit == y.limit && x.base == y.base);
  1245. inregs.eax = (unsigned)&y;
  1246. asm volatile("sidtw %0" : "=m"(x));
  1247. exec_in_big_real_mode(&insn_sidt);
  1248. report("sidt", 0, x.limit == y.limit && x.base == y.base);
  1249. }
  1250. static void test_sahf(void)
  1251. {
  1252. MK_INSN(sahf, "sahf; pushfw; mov (%esp), %al; popfw");
  1253. init_inregs(&(struct regs){ .eax = 0xfd00 });
  1254. exec_in_big_real_mode(&insn_sahf);
  1255. report("sahf", R_AX, outregs.eax == (inregs.eax | 0xd7));
  1256. }
  1257. static void test_lahf(void)
  1258. {
  1259. MK_INSN(lahf, "pushfw; mov %al, (%esp); popfw; lahf");
  1260. init_inregs(&(struct regs){ .eax = 0xc7 });
  1261. exec_in_big_real_mode(&insn_lahf);
  1262. report("lahf", R_AX, (outregs.eax >> 8) == inregs.eax);
  1263. }
  1264. static void test_movzx_movsx(void)
  1265. {
  1266. MK_INSN(movsx, "movsx %al, %ebx");
  1267. MK_INSN(movzx, "movzx %al, %ebx");
  1268. MK_INSN(movzsah, "movsx %ah, %ebx");
  1269. MK_INSN(movzxah, "movzx %ah, %ebx");
  1270. init_inregs(&(struct regs){ .eax = 0x1234569c });
  1271. exec_in_big_real_mode(&insn_movsx);
  1272. report("movsx", R_BX, outregs.ebx == (signed char)inregs.eax);
  1273. exec_in_big_real_mode(&insn_movzx);
  1274. report("movzx", R_BX, outregs.ebx == (unsigned char)inregs.eax);
  1275. exec_in_big_real_mode(&insn_movzsah);
  1276. report("movsx ah", R_BX, outregs.ebx == (signed char)(inregs.eax>>8));
  1277. exec_in_big_real_mode(&insn_movzxah);
  1278. report("movzx ah", R_BX, outregs.ebx == (unsigned char)(inregs.eax >> 8));
  1279. }
  1280. static void test_bswap(void)
  1281. {
  1282. MK_INSN(bswap, "bswap %ecx");
  1283. init_inregs(&(struct regs){ .ecx = 0x12345678 });
  1284. exec_in_big_real_mode(&insn_bswap);
  1285. report("bswap", R_CX, outregs.ecx == 0x78563412);
  1286. }
  1287. static void test_aad(void)
  1288. {
  1289. MK_INSN(aad, "aad");
  1290. init_inregs(&(struct regs){ .eax = 0x12345678 });
  1291. exec_in_big_real_mode(&insn_aad);
  1292. report("aad", R_AX, outregs.eax == 0x123400d4);
  1293. }
  1294. static void test_aam(void)
  1295. {
  1296. MK_INSN(aam, "aam");
  1297. init_inregs(&(struct regs){ .eax = 0x76543210 });
  1298. exec_in_big_real_mode(&insn_aam);
  1299. report("aam", R_AX, outregs.eax == 0x76540106);
  1300. }
  1301. static void test_xlat(void)
  1302. {
  1303. MK_INSN(xlat, "xlat");
  1304. u8 table[256];
  1305. int i;
  1306. for (i = 0; i < 256; i++) {
  1307. table[i] = i + 1;
  1308. }
  1309. init_inregs(&(struct regs){ .eax = 0x89abcdef, .ebx = (u32)table });
  1310. exec_in_big_real_mode(&insn_xlat);
  1311. report("xlat", R_AX, outregs.eax == 0x89abcdf0);
  1312. }
  1313. static void test_salc(void)
  1314. {
  1315. MK_INSN(clc_salc, "clc; .byte 0xd6");
  1316. MK_INSN(stc_salc, "stc; .byte 0xd6");
  1317. init_inregs(&(struct regs){ .eax = 0x12345678 });
  1318. exec_in_big_real_mode(&insn_clc_salc);
  1319. report("salc (1)", R_AX, outregs.eax == 0x12345600);
  1320. exec_in_big_real_mode(&insn_stc_salc);
  1321. report("salc (2)", R_AX, outregs.eax == 0x123456ff);
  1322. }
  1323. static void test_fninit(void)
  1324. {
  1325. u16 fcw = -1, fsw = -1;
  1326. MK_INSN(fninit, "fninit ; fnstsw (%eax) ; fnstcw (%ebx)");
  1327. init_inregs(&(struct regs){ .eax = (u32)&fsw, .ebx = (u32)&fcw });
  1328. exec_in_big_real_mode(&insn_fninit);
  1329. report("fninit", 0, fsw == 0 && (fcw & 0x103f) == 0x003f);
  1330. }
  1331. static void test_nopl(void)
  1332. {
  1333. MK_INSN(nopl1, ".byte 0x90\n\r"); // 1 byte nop
  1334. MK_INSN(nopl2, ".byte 0x66, 0x90\n\r"); // 2 bytes nop
  1335. MK_INSN(nopl3, ".byte 0x0f, 0x1f, 0x00\n\r"); // 3 bytes nop
  1336. MK_INSN(nopl4, ".byte 0x0f, 0x1f, 0x40, 0x00\n\r"); // 4 bytes nop
  1337. exec_in_big_real_mode(&insn_nopl1);
  1338. exec_in_big_real_mode(&insn_nopl2);
  1339. exec_in_big_real_mode(&insn_nopl3);
  1340. exec_in_big_real_mode(&insn_nopl4);
  1341. report("nopl", 0, 1);
  1342. }
  1343. static u64 perf_baseline;
  1344. #define PERF_COUNT_SHIFT (30)
  1345. // 2**27 = ~1 second at 100 mIPS
  1346. #define PERF_COUNT (1 << PERF_COUNT_SHIFT)
  1347. #define MK_INSN_PERF(name, insn) \
  1348. MK_INSN(name, "rdtsc; mov %eax, %ebx; mov %edx, %esi\n" \
  1349. "1:" insn "\n" \
  1350. ".byte 0x67; loop 1b\n" \
  1351. "rdtsc");
  1352. static u64 cycles_in_big_real_mode(struct insn_desc *insn)
  1353. {
  1354. u64 start, end;
  1355. init_inregs(&(struct regs){ .ecx = PERF_COUNT });
  1356. exec_in_big_real_mode(insn);
  1357. start = ((u64)outregs.esi << 32) | outregs.ebx;
  1358. end = ((u64)outregs.edx << 32) | outregs.eax;
  1359. return end - start;
  1360. }
  1361. static void test_perf_loop(void)
  1362. {
  1363. /*
  1364. * This test runs simple instructions that should roughly take the
  1365. * the same time to emulate: PERF_COUNT iterations of "loop" and 3
  1366. * setup instructions. Other performance tests can run PERF_COUNT
  1367. * iterations of the same instruction and subtract the cycle count
  1368. * of this test.
  1369. */
  1370. MK_INSN_PERF(perf_loop, "");
  1371. perf_baseline = cycles_in_big_real_mode(&insn_perf_loop);
  1372. print_serial_u32(perf_baseline * 1000 >> PERF_COUNT_SHIFT);
  1373. print_serial(" millicycles/emulated jump instruction\n");
  1374. }
  1375. static void test_perf_mov(void)
  1376. {
  1377. u64 cyc;
  1378. MK_INSN_PERF(perf_move, "mov %esi, %edi");
  1379. cyc = cycles_in_big_real_mode(&insn_perf_move);
  1380. print_serial_u32(cyc * 1000 >> PERF_COUNT_SHIFT);
  1381. print_serial(" millicycles/emulated move instruction\n");
  1382. }
  1383. static void test_perf_arith(void)
  1384. {
  1385. u64 cyc;
  1386. MK_INSN_PERF(perf_arith, "add $4, %edi");
  1387. cyc = cycles_in_big_real_mode(&insn_perf_arith);
  1388. print_serial_u32(cyc * 1000 >> PERF_COUNT_SHIFT);
  1389. print_serial(" millicycles/emulated arithmetic instruction\n");
  1390. }
  1391. static void test_perf_memory_load(void)
  1392. {
  1393. u64 cyc, tmp;
  1394. MK_INSN_PERF(perf_memory_load, "cmp $0, (%edi)");
  1395. init_inregs(&(struct regs){ .edi = (u32)&tmp });
  1396. cyc = cycles_in_big_real_mode(&insn_perf_memory_load);
  1397. print_serial_u32(cyc * 1000 >> PERF_COUNT_SHIFT);
  1398. print_serial(" millicycles/emulated memory load instruction\n");
  1399. }
  1400. static void test_perf_memory_store(void)
  1401. {
  1402. u64 cyc, tmp;
  1403. MK_INSN_PERF(perf_memory_store, "mov %ax, (%edi)");
  1404. init_inregs(&(struct regs){ .edi = (u32)&tmp });
  1405. cyc = cycles_in_big_real_mode(&insn_perf_memory_store);
  1406. print_serial_u32(cyc * 1000 >> PERF_COUNT_SHIFT);
  1407. print_serial(" millicycles/emulated memory store instruction\n");
  1408. }
  1409. static void test_perf_memory_rmw(void)
  1410. {
  1411. u64 cyc, tmp;
  1412. MK_INSN_PERF(perf_memory_rmw, "add $1, (%edi)");
  1413. init_inregs(&(struct regs){ .edi = (u32)&tmp });
  1414. cyc = cycles_in_big_real_mode(&insn_perf_memory_rmw);
  1415. print_serial_u32(cyc * 1000 >> PERF_COUNT_SHIFT);
  1416. print_serial(" millicycles/emulated memory RMW instruction\n");
  1417. }
  1418. static void test_perf_memory_shl(void)
  1419. {
  1420. u64 cyc, tmp;
  1421. MK_INSN_PERF(perf_memory_shl, "shl $1, %edi");
  1422. init_inregs(&(struct regs){ .edi = (u32)&tmp });
  1423. cyc = cycles_in_big_real_mode(&insn_perf_memory_shl);
  1424. print_serial_u32(cyc * 1000 >> PERF_COUNT_SHIFT);
  1425. print_serial(" millicycles/emulated SHL instruction\n");
  1426. }
  1427. static void test_perf_memory_adc(void)
  1428. {
  1429. u64 cyc, tmp;
  1430. MK_INSN_PERF(perf_memory_adc, "adc $1, %edi");
  1431. init_inregs(&(struct regs){ .edi = (u32)&tmp });
  1432. cyc = cycles_in_big_real_mode(&insn_perf_memory_adc);
  1433. print_serial_u32(cyc * 1000 >> PERF_COUNT_SHIFT);
  1434. print_serial(" millicycles/emulated ADC instruction\n");
  1435. }
  1436. static void test_dr_mod(void)
  1437. {
  1438. MK_INSN(drmod, "movl %ebx, %dr0\n\t"
  1439. ".byte 0x0f \n\t .byte 0x21 \n\t .byte 0x0\n\t");
  1440. init_inregs(&(struct regs){ .eax = 0xdead, .ebx = 0xaced });
  1441. exec_in_big_real_mode(&insn_drmod);
  1442. report("mov dr with mod bits", R_AX | R_BX, outregs.eax == 0xaced);
  1443. }
  1444. static void test_smsw(void)
  1445. {
  1446. MK_INSN(smsw, "movl %cr0, %ebx\n\t"
  1447. "movl %ebx, %ecx\n\t"
  1448. "or $0x40000000, %ebx\n\t"
  1449. "movl %ebx, %cr0\n\t"
  1450. "smswl %eax\n\t"
  1451. "movl %ecx, %cr0\n\t");
  1452. init_inregs(&(struct regs){ .eax = 0x12345678 });
  1453. exec_in_big_real_mode(&insn_smsw);
  1454. report("smsw", R_AX | R_BX | R_CX, outregs.eax == outregs.ebx);
  1455. }
  1456. static void test_xadd(void)
  1457. {
  1458. MK_INSN(xadd, "xaddl %eax, %eax\n\t");
  1459. init_inregs(&(struct regs){ .eax = 0x12345678 });
  1460. exec_in_big_real_mode(&insn_xadd);
  1461. report("xadd", R_AX, outregs.eax == inregs.eax * 2);
  1462. }
  1463. void realmode_start(void)
  1464. {
  1465. // enable interrupts (v86 only)
  1466. outb(0, 0x21);
  1467. outb(0, 0xa1);
  1468. test_null();
  1469. test_shld();
  1470. test_push_pop();
  1471. test_pusha_popa();
  1472. test_mov_imm();
  1473. test_cmp_imm();
  1474. test_add_imm();
  1475. test_sub_imm();
  1476. test_xor_imm();
  1477. test_io();
  1478. test_eflags_insn();
  1479. test_jcc_short();
  1480. test_jcc_near();
  1481. /* test_call() uses short jump so call it after testing jcc */
  1482. test_call();
  1483. /* long jmp test uses call near so test it after testing call */
  1484. test_long_jmp();
  1485. test_xchg();
  1486. test_iret();
  1487. test_int();
  1488. test_sti_inhibit();
  1489. test_imul();
  1490. test_mul();
  1491. test_div();
  1492. test_idiv();
  1493. test_loopcc();
  1494. test_cbw();
  1495. test_cwd_cdq();
  1496. test_das();
  1497. test_lds_lss();
  1498. test_jcxz();
  1499. test_cpuid();
  1500. test_ss_base_for_esp_ebp();
  1501. test_sgdt_sidt();
  1502. test_lahf();
  1503. test_sahf();
  1504. test_movzx_movsx();
  1505. test_bswap();
  1506. test_aad();
  1507. test_aam();
  1508. test_xlat();
  1509. test_salc();
  1510. test_fninit();
  1511. test_dr_mod();
  1512. test_smsw();
  1513. test_nopl();
  1514. test_xadd();
  1515. test_perf_loop();
  1516. test_perf_mov();
  1517. test_perf_arith();
  1518. test_perf_memory_shl();
  1519. test_perf_memory_adc();
  1520. test_perf_memory_load();
  1521. test_perf_memory_store();
  1522. test_perf_memory_rmw();
  1523. exit(failed);
  1524. }
  1525. unsigned long long r_gdt[] = { 0, 0x9b000000ffff, 0x93000000ffff };
  1526. struct table_descr r_gdt_descr = { sizeof(r_gdt) - 1, &r_gdt };
  1527. struct table_descr r_idt_descr = { 0x3ff, 0 };
  1528. asm(
  1529. ".section .init \n\t"
  1530. ".code32 \n\t"
  1531. "mb_magic = 0x1BADB002 \n\t"
  1532. "mb_flags = 0x0 \n\t"
  1533. "# multiboot header \n\t"
  1534. ".long mb_magic, mb_flags, 0 - (mb_magic + mb_flags) \n\t"
  1535. ".globl start \n\t"
  1536. ".data \n\t"
  1537. ". = . + 4096 \n\t"
  1538. "stacktop: \n\t"
  1539. ".text \n\t"
  1540. "start: \n\t"
  1541. "lgdt r_gdt_descr \n\t"
  1542. "lidt r_idt_descr \n\t"
  1543. "ljmp $8, $1f; 1: \n\t"
  1544. ".code16gcc \n\t"
  1545. "mov $16, %eax \n\t"
  1546. "mov %ax, %ds \n\t"
  1547. "mov %ax, %es \n\t"
  1548. "mov %ax, %fs \n\t"
  1549. "mov %ax, %gs \n\t"
  1550. "mov %ax, %ss \n\t"
  1551. "mov %cr0, %eax \n\t"
  1552. "btc $0, %eax \n\t"
  1553. "mov %eax, %cr0 \n\t"
  1554. "ljmp $0, $realmode_entry \n\t"
  1555. "realmode_entry: \n\t"
  1556. "xor %ax, %ax \n\t"
  1557. "mov %ax, %ds \n\t"
  1558. "mov %ax, %es \n\t"
  1559. "mov %ax, %ss \n\t"
  1560. "mov %ax, %fs \n\t"
  1561. "mov %ax, %gs \n\t"
  1562. "mov $stacktop, %esp\n\t"
  1563. "ljmp $0, $realmode_start \n\t"
  1564. ".code16gcc \n\t"
  1565. );