vmx.c 46 KB

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  1. /*
  2. * x86/vmx.c : Framework for testing nested virtualization
  3. * This is a framework to test nested VMX for KVM, which
  4. * started as a project of GSoC 2013. All test cases should
  5. * be located in x86/vmx_tests.c and framework related
  6. * functions should be in this file.
  7. *
  8. * How to write test cases?
  9. * Add callbacks of test suite in variant "vmx_tests". You can
  10. * write:
  11. * 1. init function used for initializing test suite
  12. * 2. main function for codes running in L2 guest,
  13. * 3. exit_handler to handle vmexit of L2 to L1
  14. * 4. syscall handler to handle L2 syscall vmexit
  15. * 5. vmenter fail handler to handle direct failure of vmenter
  16. * 6. guest_regs is loaded when vmenter and saved when
  17. * vmexit, you can read and set it in exit_handler
  18. * If no special function is needed for a test suite, use
  19. * coressponding basic_* functions as callback. More handlers
  20. * can be added to "vmx_tests", see details of "struct vmx_test"
  21. * and function test_run().
  22. *
  23. * Currently, vmx test framework only set up one VCPU and one
  24. * concurrent guest test environment with same paging for L2 and
  25. * L1. For usage of EPT, only 1:1 mapped paging is used from VFN
  26. * to PFN.
  27. *
  28. * Author : Arthur Chunqi Li <yzt356@gmail.com>
  29. */
  30. #include "libcflat.h"
  31. #include "processor.h"
  32. #include "vm.h"
  33. #include "desc.h"
  34. #include "vmx.h"
  35. #include "msr.h"
  36. #include "smp.h"
  37. u64 *vmxon_region;
  38. struct vmcs *vmcs_root;
  39. u32 vpid_cnt;
  40. void *guest_stack, *guest_syscall_stack;
  41. u32 ctrl_pin, ctrl_enter, ctrl_exit, ctrl_cpu[2];
  42. struct regs regs;
  43. struct vmx_test *current;
  44. #define MAX_TEST_TEARDOWN_STEPS 10
  45. struct test_teardown_step {
  46. test_teardown_func func;
  47. void *data;
  48. };
  49. static int teardown_count;
  50. static struct test_teardown_step teardown_steps[MAX_TEST_TEARDOWN_STEPS];
  51. static test_guest_func v2_guest_main;
  52. u64 hypercall_field;
  53. bool launched;
  54. static int matched;
  55. static int guest_finished;
  56. static int in_guest;
  57. union vmx_basic basic;
  58. union vmx_ctrl_msr ctrl_pin_rev;
  59. union vmx_ctrl_msr ctrl_cpu_rev[2];
  60. union vmx_ctrl_msr ctrl_exit_rev;
  61. union vmx_ctrl_msr ctrl_enter_rev;
  62. union vmx_ept_vpid ept_vpid;
  63. extern struct descriptor_table_ptr gdt64_desc;
  64. extern struct descriptor_table_ptr idt_descr;
  65. extern struct descriptor_table_ptr tss_descr;
  66. extern void *vmx_return;
  67. extern void *entry_sysenter;
  68. extern void *guest_entry;
  69. static volatile u32 stage;
  70. static jmp_buf abort_target;
  71. struct vmcs_field {
  72. u64 mask;
  73. u64 encoding;
  74. };
  75. #define MASK(_bits) GENMASK_ULL((_bits) - 1, 0)
  76. #define MASK_NATURAL MASK(sizeof(unsigned long) * 8)
  77. static struct vmcs_field vmcs_fields[] = {
  78. { MASK(16), VPID },
  79. { MASK(16), PINV },
  80. { MASK(16), EPTP_IDX },
  81. { MASK(16), GUEST_SEL_ES },
  82. { MASK(16), GUEST_SEL_CS },
  83. { MASK(16), GUEST_SEL_SS },
  84. { MASK(16), GUEST_SEL_DS },
  85. { MASK(16), GUEST_SEL_FS },
  86. { MASK(16), GUEST_SEL_GS },
  87. { MASK(16), GUEST_SEL_LDTR },
  88. { MASK(16), GUEST_SEL_TR },
  89. { MASK(16), GUEST_INT_STATUS },
  90. { MASK(16), HOST_SEL_ES },
  91. { MASK(16), HOST_SEL_CS },
  92. { MASK(16), HOST_SEL_SS },
  93. { MASK(16), HOST_SEL_DS },
  94. { MASK(16), HOST_SEL_FS },
  95. { MASK(16), HOST_SEL_GS },
  96. { MASK(16), HOST_SEL_TR },
  97. { MASK(64), IO_BITMAP_A },
  98. { MASK(64), IO_BITMAP_B },
  99. { MASK(64), MSR_BITMAP },
  100. { MASK(64), EXIT_MSR_ST_ADDR },
  101. { MASK(64), EXIT_MSR_LD_ADDR },
  102. { MASK(64), ENTER_MSR_LD_ADDR },
  103. { MASK(64), VMCS_EXEC_PTR },
  104. { MASK(64), TSC_OFFSET },
  105. { MASK(64), APIC_VIRT_ADDR },
  106. { MASK(64), APIC_ACCS_ADDR },
  107. { MASK(64), EPTP },
  108. { 0 /* read-only */, INFO_PHYS_ADDR },
  109. { MASK(64), VMCS_LINK_PTR },
  110. { MASK(64), GUEST_DEBUGCTL },
  111. { MASK(64), GUEST_EFER },
  112. { MASK(64), GUEST_PAT },
  113. { MASK(64), GUEST_PERF_GLOBAL_CTRL },
  114. { MASK(64), GUEST_PDPTE },
  115. { MASK(64), HOST_PAT },
  116. { MASK(64), HOST_EFER },
  117. { MASK(64), HOST_PERF_GLOBAL_CTRL },
  118. { MASK(32), PIN_CONTROLS },
  119. { MASK(32), CPU_EXEC_CTRL0 },
  120. { MASK(32), EXC_BITMAP },
  121. { MASK(32), PF_ERROR_MASK },
  122. { MASK(32), PF_ERROR_MATCH },
  123. { MASK(32), CR3_TARGET_COUNT },
  124. { MASK(32), EXI_CONTROLS },
  125. { MASK(32), EXI_MSR_ST_CNT },
  126. { MASK(32), EXI_MSR_LD_CNT },
  127. { MASK(32), ENT_CONTROLS },
  128. { MASK(32), ENT_MSR_LD_CNT },
  129. { MASK(32), ENT_INTR_INFO },
  130. { MASK(32), ENT_INTR_ERROR },
  131. { MASK(32), ENT_INST_LEN },
  132. { MASK(32), TPR_THRESHOLD },
  133. { MASK(32), CPU_EXEC_CTRL1 },
  134. { 0 /* read-only */, VMX_INST_ERROR },
  135. { 0 /* read-only */, EXI_REASON },
  136. { 0 /* read-only */, EXI_INTR_INFO },
  137. { 0 /* read-only */, EXI_INTR_ERROR },
  138. { 0 /* read-only */, IDT_VECT_INFO },
  139. { 0 /* read-only */, IDT_VECT_ERROR },
  140. { 0 /* read-only */, EXI_INST_LEN },
  141. { 0 /* read-only */, EXI_INST_INFO },
  142. { MASK(32), GUEST_LIMIT_ES },
  143. { MASK(32), GUEST_LIMIT_CS },
  144. { MASK(32), GUEST_LIMIT_SS },
  145. { MASK(32), GUEST_LIMIT_DS },
  146. { MASK(32), GUEST_LIMIT_FS },
  147. { MASK(32), GUEST_LIMIT_GS },
  148. { MASK(32), GUEST_LIMIT_LDTR },
  149. { MASK(32), GUEST_LIMIT_TR },
  150. { MASK(32), GUEST_LIMIT_GDTR },
  151. { MASK(32), GUEST_LIMIT_IDTR },
  152. { 0x1d0ff, GUEST_AR_ES },
  153. { 0x1f0ff, GUEST_AR_CS },
  154. { 0x1d0ff, GUEST_AR_SS },
  155. { 0x1d0ff, GUEST_AR_DS },
  156. { 0x1d0ff, GUEST_AR_FS },
  157. { 0x1d0ff, GUEST_AR_GS },
  158. { 0x1d0ff, GUEST_AR_LDTR },
  159. { 0x1d0ff, GUEST_AR_TR },
  160. { MASK(32), GUEST_INTR_STATE },
  161. { MASK(32), GUEST_ACTV_STATE },
  162. { MASK(32), GUEST_SMBASE },
  163. { MASK(32), GUEST_SYSENTER_CS },
  164. { MASK(32), PREEMPT_TIMER_VALUE },
  165. { MASK(32), HOST_SYSENTER_CS },
  166. { MASK_NATURAL, CR0_MASK },
  167. { MASK_NATURAL, CR4_MASK },
  168. { MASK_NATURAL, CR0_READ_SHADOW },
  169. { MASK_NATURAL, CR4_READ_SHADOW },
  170. { MASK_NATURAL, CR3_TARGET_0 },
  171. { MASK_NATURAL, CR3_TARGET_1 },
  172. { MASK_NATURAL, CR3_TARGET_2 },
  173. { MASK_NATURAL, CR3_TARGET_3 },
  174. { 0 /* read-only */, EXI_QUALIFICATION },
  175. { 0 /* read-only */, IO_RCX },
  176. { 0 /* read-only */, IO_RSI },
  177. { 0 /* read-only */, IO_RDI },
  178. { 0 /* read-only */, IO_RIP },
  179. { 0 /* read-only */, GUEST_LINEAR_ADDRESS },
  180. { MASK_NATURAL, GUEST_CR0 },
  181. { MASK_NATURAL, GUEST_CR3 },
  182. { MASK_NATURAL, GUEST_CR4 },
  183. { MASK_NATURAL, GUEST_BASE_ES },
  184. { MASK_NATURAL, GUEST_BASE_CS },
  185. { MASK_NATURAL, GUEST_BASE_SS },
  186. { MASK_NATURAL, GUEST_BASE_DS },
  187. { MASK_NATURAL, GUEST_BASE_FS },
  188. { MASK_NATURAL, GUEST_BASE_GS },
  189. { MASK_NATURAL, GUEST_BASE_LDTR },
  190. { MASK_NATURAL, GUEST_BASE_TR },
  191. { MASK_NATURAL, GUEST_BASE_GDTR },
  192. { MASK_NATURAL, GUEST_BASE_IDTR },
  193. { MASK_NATURAL, GUEST_DR7 },
  194. { MASK_NATURAL, GUEST_RSP },
  195. { MASK_NATURAL, GUEST_RIP },
  196. { MASK_NATURAL, GUEST_RFLAGS },
  197. { MASK_NATURAL, GUEST_PENDING_DEBUG },
  198. { MASK_NATURAL, GUEST_SYSENTER_ESP },
  199. { MASK_NATURAL, GUEST_SYSENTER_EIP },
  200. { MASK_NATURAL, HOST_CR0 },
  201. { MASK_NATURAL, HOST_CR3 },
  202. { MASK_NATURAL, HOST_CR4 },
  203. { MASK_NATURAL, HOST_BASE_FS },
  204. { MASK_NATURAL, HOST_BASE_GS },
  205. { MASK_NATURAL, HOST_BASE_TR },
  206. { MASK_NATURAL, HOST_BASE_GDTR },
  207. { MASK_NATURAL, HOST_BASE_IDTR },
  208. { MASK_NATURAL, HOST_SYSENTER_ESP },
  209. { MASK_NATURAL, HOST_SYSENTER_EIP },
  210. { MASK_NATURAL, HOST_RSP },
  211. { MASK_NATURAL, HOST_RIP },
  212. };
  213. static inline u64 vmcs_field_value(struct vmcs_field *f, u8 cookie)
  214. {
  215. u64 value;
  216. /* Incorporate the cookie and the field encoding into the value. */
  217. value = cookie;
  218. value |= (f->encoding << 8);
  219. value |= 0xdeadbeefull << 32;
  220. return value & f->mask;
  221. }
  222. static void set_vmcs_field(struct vmcs_field *f, u8 cookie)
  223. {
  224. vmcs_write(f->encoding, vmcs_field_value(f, cookie));
  225. }
  226. static bool check_vmcs_field(struct vmcs_field *f, u8 cookie)
  227. {
  228. u64 expected;
  229. u64 actual;
  230. int ret;
  231. ret = vmcs_read_checking(f->encoding, &actual);
  232. assert(!(ret & X86_EFLAGS_CF));
  233. /* Skip VMCS fields that aren't recognized by the CPU */
  234. if (ret & X86_EFLAGS_ZF)
  235. return true;
  236. expected = vmcs_field_value(f, cookie);
  237. actual &= f->mask;
  238. if (expected == actual)
  239. return true;
  240. printf("FAIL: VMWRITE/VMREAD %lx (expected: %lx, actual: %lx)\n",
  241. f->encoding, (unsigned long) expected, (unsigned long) actual);
  242. return false;
  243. }
  244. static void set_all_vmcs_fields(u8 cookie)
  245. {
  246. int i;
  247. for (i = 0; i < ARRAY_SIZE(vmcs_fields); i++)
  248. set_vmcs_field(&vmcs_fields[i], cookie);
  249. }
  250. static bool check_all_vmcs_fields(u8 cookie)
  251. {
  252. bool pass = true;
  253. int i;
  254. for (i = 0; i < ARRAY_SIZE(vmcs_fields); i++) {
  255. if (!check_vmcs_field(&vmcs_fields[i], cookie))
  256. pass = false;
  257. }
  258. return pass;
  259. }
  260. void test_vmwrite_vmread(void)
  261. {
  262. struct vmcs *vmcs = alloc_page();
  263. memset(vmcs, 0, PAGE_SIZE);
  264. vmcs->revision_id = basic.revision;
  265. assert(!vmcs_clear(vmcs));
  266. assert(!make_vmcs_current(vmcs));
  267. set_all_vmcs_fields(0x42);
  268. report("VMWRITE/VMREAD", check_all_vmcs_fields(0x42));
  269. assert(!vmcs_clear(vmcs));
  270. free_page(vmcs);
  271. }
  272. void test_vmcs_lifecycle(void)
  273. {
  274. struct vmcs *vmcs[2] = {};
  275. int i;
  276. for (i = 0; i < ARRAY_SIZE(vmcs); i++) {
  277. vmcs[i] = alloc_page();
  278. memset(vmcs[i], 0, PAGE_SIZE);
  279. vmcs[i]->revision_id = basic.revision;
  280. }
  281. #define VMPTRLD(_i) do { \
  282. assert(_i < ARRAY_SIZE(vmcs)); \
  283. assert(!make_vmcs_current(vmcs[_i])); \
  284. printf("VMPTRLD VMCS%d\n", (_i)); \
  285. } while (0)
  286. #define VMCLEAR(_i) do { \
  287. assert(_i < ARRAY_SIZE(vmcs)); \
  288. assert(!vmcs_clear(vmcs[_i])); \
  289. printf("VMCLEAR VMCS%d\n", (_i)); \
  290. } while (0)
  291. VMCLEAR(0);
  292. VMPTRLD(0);
  293. set_all_vmcs_fields(0);
  294. report("current:VMCS0 active:[VMCS0]", check_all_vmcs_fields(0));
  295. VMCLEAR(0);
  296. VMPTRLD(0);
  297. report("current:VMCS0 active:[VMCS0]", check_all_vmcs_fields(0));
  298. VMCLEAR(1);
  299. report("current:VMCS0 active:[VMCS0]", check_all_vmcs_fields(0));
  300. VMPTRLD(1);
  301. set_all_vmcs_fields(1);
  302. report("current:VMCS1 active:[VMCS0,VCMS1]", check_all_vmcs_fields(1));
  303. VMPTRLD(0);
  304. report("current:VMCS0 active:[VMCS0,VCMS1]", check_all_vmcs_fields(0));
  305. VMPTRLD(1);
  306. report("current:VMCS1 active:[VMCS0,VCMS1]", check_all_vmcs_fields(1));
  307. VMPTRLD(1);
  308. report("current:VMCS1 active:[VMCS0,VCMS1]", check_all_vmcs_fields(1));
  309. VMCLEAR(0);
  310. report("current:VMCS1 active:[VCMS1]", check_all_vmcs_fields(1));
  311. /* VMPTRLD should not erase VMWRITEs to the current VMCS */
  312. set_all_vmcs_fields(2);
  313. VMPTRLD(1);
  314. report("current:VMCS1 active:[VCMS1]", check_all_vmcs_fields(2));
  315. for (i = 0; i < ARRAY_SIZE(vmcs); i++) {
  316. VMCLEAR(i);
  317. free_page(vmcs[i]);
  318. }
  319. #undef VMPTRLD
  320. #undef VMCLEAR
  321. }
  322. void vmx_set_test_stage(u32 s)
  323. {
  324. barrier();
  325. stage = s;
  326. barrier();
  327. }
  328. u32 vmx_get_test_stage(void)
  329. {
  330. u32 s;
  331. barrier();
  332. s = stage;
  333. barrier();
  334. return s;
  335. }
  336. void vmx_inc_test_stage(void)
  337. {
  338. barrier();
  339. stage++;
  340. barrier();
  341. }
  342. /* entry_sysenter */
  343. asm(
  344. ".align 4, 0x90\n\t"
  345. ".globl entry_sysenter\n\t"
  346. "entry_sysenter:\n\t"
  347. SAVE_GPR
  348. " and $0xf, %rax\n\t"
  349. " mov %rax, %rdi\n\t"
  350. " call syscall_handler\n\t"
  351. LOAD_GPR
  352. " vmresume\n\t"
  353. );
  354. static void __attribute__((__used__)) syscall_handler(u64 syscall_no)
  355. {
  356. if (current->syscall_handler)
  357. current->syscall_handler(syscall_no);
  358. }
  359. static const char * const exit_reason_descriptions[] = {
  360. [VMX_EXC_NMI] = "VMX_EXC_NMI",
  361. [VMX_EXTINT] = "VMX_EXTINT",
  362. [VMX_TRIPLE_FAULT] = "VMX_TRIPLE_FAULT",
  363. [VMX_INIT] = "VMX_INIT",
  364. [VMX_SIPI] = "VMX_SIPI",
  365. [VMX_SMI_IO] = "VMX_SMI_IO",
  366. [VMX_SMI_OTHER] = "VMX_SMI_OTHER",
  367. [VMX_INTR_WINDOW] = "VMX_INTR_WINDOW",
  368. [VMX_NMI_WINDOW] = "VMX_NMI_WINDOW",
  369. [VMX_TASK_SWITCH] = "VMX_TASK_SWITCH",
  370. [VMX_CPUID] = "VMX_CPUID",
  371. [VMX_GETSEC] = "VMX_GETSEC",
  372. [VMX_HLT] = "VMX_HLT",
  373. [VMX_INVD] = "VMX_INVD",
  374. [VMX_INVLPG] = "VMX_INVLPG",
  375. [VMX_RDPMC] = "VMX_RDPMC",
  376. [VMX_RDTSC] = "VMX_RDTSC",
  377. [VMX_RSM] = "VMX_RSM",
  378. [VMX_VMCALL] = "VMX_VMCALL",
  379. [VMX_VMCLEAR] = "VMX_VMCLEAR",
  380. [VMX_VMLAUNCH] = "VMX_VMLAUNCH",
  381. [VMX_VMPTRLD] = "VMX_VMPTRLD",
  382. [VMX_VMPTRST] = "VMX_VMPTRST",
  383. [VMX_VMREAD] = "VMX_VMREAD",
  384. [VMX_VMRESUME] = "VMX_VMRESUME",
  385. [VMX_VMWRITE] = "VMX_VMWRITE",
  386. [VMX_VMXOFF] = "VMX_VMXOFF",
  387. [VMX_VMXON] = "VMX_VMXON",
  388. [VMX_CR] = "VMX_CR",
  389. [VMX_DR] = "VMX_DR",
  390. [VMX_IO] = "VMX_IO",
  391. [VMX_RDMSR] = "VMX_RDMSR",
  392. [VMX_WRMSR] = "VMX_WRMSR",
  393. [VMX_FAIL_STATE] = "VMX_FAIL_STATE",
  394. [VMX_FAIL_MSR] = "VMX_FAIL_MSR",
  395. [VMX_MWAIT] = "VMX_MWAIT",
  396. [VMX_MTF] = "VMX_MTF",
  397. [VMX_MONITOR] = "VMX_MONITOR",
  398. [VMX_PAUSE] = "VMX_PAUSE",
  399. [VMX_FAIL_MCHECK] = "VMX_FAIL_MCHECK",
  400. [VMX_TPR_THRESHOLD] = "VMX_TPR_THRESHOLD",
  401. [VMX_APIC_ACCESS] = "VMX_APIC_ACCESS",
  402. [VMX_GDTR_IDTR] = "VMX_GDTR_IDTR",
  403. [VMX_LDTR_TR] = "VMX_LDTR_TR",
  404. [VMX_EPT_VIOLATION] = "VMX_EPT_VIOLATION",
  405. [VMX_EPT_MISCONFIG] = "VMX_EPT_MISCONFIG",
  406. [VMX_INVEPT] = "VMX_INVEPT",
  407. [VMX_PREEMPT] = "VMX_PREEMPT",
  408. [VMX_INVVPID] = "VMX_INVVPID",
  409. [VMX_WBINVD] = "VMX_WBINVD",
  410. [VMX_XSETBV] = "VMX_XSETBV",
  411. [VMX_APIC_WRITE] = "VMX_APIC_WRITE",
  412. [VMX_RDRAND] = "VMX_RDRAND",
  413. [VMX_INVPCID] = "VMX_INVPCID",
  414. [VMX_VMFUNC] = "VMX_VMFUNC",
  415. [VMX_RDSEED] = "VMX_RDSEED",
  416. [VMX_PML_FULL] = "VMX_PML_FULL",
  417. [VMX_XSAVES] = "VMX_XSAVES",
  418. [VMX_XRSTORS] = "VMX_XRSTORS",
  419. };
  420. const char *exit_reason_description(u64 reason)
  421. {
  422. if (reason >= ARRAY_SIZE(exit_reason_descriptions))
  423. return "(unknown)";
  424. return exit_reason_descriptions[reason] ? : "(unused)";
  425. }
  426. void print_vmexit_info()
  427. {
  428. u64 guest_rip, guest_rsp;
  429. ulong reason = vmcs_read(EXI_REASON) & 0xff;
  430. ulong exit_qual = vmcs_read(EXI_QUALIFICATION);
  431. guest_rip = vmcs_read(GUEST_RIP);
  432. guest_rsp = vmcs_read(GUEST_RSP);
  433. printf("VMEXIT info:\n");
  434. printf("\tvmexit reason = %ld\n", reason);
  435. printf("\texit qualification = %#lx\n", exit_qual);
  436. printf("\tBit 31 of reason = %lx\n", (vmcs_read(EXI_REASON) >> 31) & 1);
  437. printf("\tguest_rip = %#lx\n", guest_rip);
  438. printf("\tRAX=%#lx RBX=%#lx RCX=%#lx RDX=%#lx\n",
  439. regs.rax, regs.rbx, regs.rcx, regs.rdx);
  440. printf("\tRSP=%#lx RBP=%#lx RSI=%#lx RDI=%#lx\n",
  441. guest_rsp, regs.rbp, regs.rsi, regs.rdi);
  442. printf("\tR8 =%#lx R9 =%#lx R10=%#lx R11=%#lx\n",
  443. regs.r8, regs.r9, regs.r10, regs.r11);
  444. printf("\tR12=%#lx R13=%#lx R14=%#lx R15=%#lx\n",
  445. regs.r12, regs.r13, regs.r14, regs.r15);
  446. }
  447. void
  448. print_vmentry_failure_info(struct vmentry_failure *failure) {
  449. if (failure->early) {
  450. printf("Early %s failure: ", failure->instr);
  451. switch (failure->flags & VMX_ENTRY_FLAGS) {
  452. case X86_EFLAGS_CF:
  453. printf("current-VMCS pointer is not valid.\n");
  454. break;
  455. case X86_EFLAGS_ZF:
  456. printf("error number is %ld. See Intel 30.4.\n",
  457. vmcs_read(VMX_INST_ERROR));
  458. break;
  459. default:
  460. printf("unexpected flags %lx!\n", failure->flags);
  461. }
  462. } else {
  463. u64 reason = vmcs_read(EXI_REASON);
  464. u64 qual = vmcs_read(EXI_QUALIFICATION);
  465. printf("Non-early %s failure (reason=%#lx, qual=%#lx): ",
  466. failure->instr, reason, qual);
  467. switch (reason & 0xff) {
  468. case VMX_FAIL_STATE:
  469. printf("invalid guest state\n");
  470. break;
  471. case VMX_FAIL_MSR:
  472. printf("MSR loading\n");
  473. break;
  474. case VMX_FAIL_MCHECK:
  475. printf("machine-check event\n");
  476. break;
  477. default:
  478. printf("unexpected basic exit reason %ld\n",
  479. reason & 0xff);
  480. }
  481. if (!(reason & VMX_ENTRY_FAILURE))
  482. printf("\tVMX_ENTRY_FAILURE BIT NOT SET!\n");
  483. if (reason & 0x7fff0000)
  484. printf("\tRESERVED BITS SET!\n");
  485. }
  486. }
  487. /*
  488. * VMCLEAR should ensures all VMCS state is flushed to the VMCS
  489. * region in memory.
  490. */
  491. static void test_vmclear_flushing(void)
  492. {
  493. struct vmcs *vmcs[3] = {};
  494. int i;
  495. for (i = 0; i < ARRAY_SIZE(vmcs); i++) {
  496. vmcs[i] = alloc_page();
  497. memset(vmcs[i], 0, PAGE_SIZE);
  498. }
  499. vmcs[0]->revision_id = basic.revision;
  500. assert(!vmcs_clear(vmcs[0]));
  501. assert(!make_vmcs_current(vmcs[0]));
  502. set_all_vmcs_fields(0x86);
  503. assert(!vmcs_clear(vmcs[0]));
  504. memcpy(vmcs[1], vmcs[0], basic.size);
  505. assert(!make_vmcs_current(vmcs[1]));
  506. report("test vmclear flush (current VMCS)", check_all_vmcs_fields(0x86));
  507. set_all_vmcs_fields(0x87);
  508. assert(!make_vmcs_current(vmcs[0]));
  509. assert(!vmcs_clear(vmcs[1]));
  510. memcpy(vmcs[2], vmcs[1], basic.size);
  511. assert(!make_vmcs_current(vmcs[2]));
  512. report("test vmclear flush (!current VMCS)", check_all_vmcs_fields(0x87));
  513. for (i = 0; i < ARRAY_SIZE(vmcs); i++) {
  514. assert(!vmcs_clear(vmcs[i]));
  515. free_page(vmcs[i]);
  516. }
  517. }
  518. static void test_vmclear(void)
  519. {
  520. struct vmcs *tmp_root;
  521. int width = cpuid_maxphyaddr();
  522. /*
  523. * Note- The tests below do not necessarily have a
  524. * valid VMCS, but that's ok since the invalid vmcs
  525. * is only used for a specific test and is discarded
  526. * without touching its contents
  527. */
  528. /* Unaligned page access */
  529. tmp_root = (struct vmcs *)((intptr_t)vmcs_root + 1);
  530. report("test vmclear with unaligned vmcs",
  531. vmcs_clear(tmp_root) == 1);
  532. /* gpa bits beyond physical address width are set*/
  533. tmp_root = (struct vmcs *)((intptr_t)vmcs_root |
  534. ((u64)1 << (width+1)));
  535. report("test vmclear with vmcs address bits set beyond physical address width",
  536. vmcs_clear(tmp_root) == 1);
  537. /* Pass VMXON region */
  538. tmp_root = (struct vmcs *)vmxon_region;
  539. report("test vmclear with vmxon region",
  540. vmcs_clear(tmp_root) == 1);
  541. /* Valid VMCS */
  542. report("test vmclear with valid vmcs region", vmcs_clear(vmcs_root) == 0);
  543. test_vmclear_flushing();
  544. }
  545. static void __attribute__((__used__)) guest_main(void)
  546. {
  547. if (current->v2)
  548. v2_guest_main();
  549. else
  550. current->guest_main();
  551. }
  552. /* guest_entry */
  553. asm(
  554. ".align 4, 0x90\n\t"
  555. ".globl entry_guest\n\t"
  556. "guest_entry:\n\t"
  557. " call guest_main\n\t"
  558. " mov $1, %edi\n\t"
  559. " call hypercall\n\t"
  560. );
  561. /* EPT paging structure related functions */
  562. /* split_large_ept_entry: Split a 2M/1G large page into 512 smaller PTEs.
  563. @ptep : large page table entry to split
  564. @level : level of ptep (2 or 3)
  565. */
  566. static void split_large_ept_entry(unsigned long *ptep, int level)
  567. {
  568. unsigned long *new_pt;
  569. unsigned long gpa;
  570. unsigned long pte;
  571. unsigned long prototype;
  572. int i;
  573. pte = *ptep;
  574. assert(pte & EPT_PRESENT);
  575. assert(pte & EPT_LARGE_PAGE);
  576. assert(level == 2 || level == 3);
  577. new_pt = alloc_page();
  578. assert(new_pt);
  579. memset(new_pt, 0, PAGE_SIZE);
  580. prototype = pte & ~EPT_ADDR_MASK;
  581. if (level == 2)
  582. prototype &= ~EPT_LARGE_PAGE;
  583. gpa = pte & EPT_ADDR_MASK;
  584. for (i = 0; i < EPT_PGDIR_ENTRIES; i++) {
  585. new_pt[i] = prototype | gpa;
  586. gpa += 1ul << EPT_LEVEL_SHIFT(level - 1);
  587. }
  588. pte &= ~EPT_LARGE_PAGE;
  589. pte &= ~EPT_ADDR_MASK;
  590. pte |= virt_to_phys(new_pt);
  591. *ptep = pte;
  592. }
  593. /* install_ept_entry : Install a page to a given level in EPT
  594. @pml4 : addr of pml4 table
  595. @pte_level : level of PTE to set
  596. @guest_addr : physical address of guest
  597. @pte : pte value to set
  598. @pt_page : address of page table, NULL for a new page
  599. */
  600. void install_ept_entry(unsigned long *pml4,
  601. int pte_level,
  602. unsigned long guest_addr,
  603. unsigned long pte,
  604. unsigned long *pt_page)
  605. {
  606. int level;
  607. unsigned long *pt = pml4;
  608. unsigned offset;
  609. /* EPT only uses 48 bits of GPA. */
  610. assert(guest_addr < (1ul << 48));
  611. for (level = EPT_PAGE_LEVEL; level > pte_level; --level) {
  612. offset = (guest_addr >> EPT_LEVEL_SHIFT(level))
  613. & EPT_PGDIR_MASK;
  614. if (!(pt[offset] & (EPT_PRESENT))) {
  615. unsigned long *new_pt = pt_page;
  616. if (!new_pt)
  617. new_pt = alloc_page();
  618. else
  619. pt_page = 0;
  620. memset(new_pt, 0, PAGE_SIZE);
  621. pt[offset] = virt_to_phys(new_pt)
  622. | EPT_RA | EPT_WA | EPT_EA;
  623. } else if (pt[offset] & EPT_LARGE_PAGE)
  624. split_large_ept_entry(&pt[offset], level);
  625. pt = phys_to_virt(pt[offset] & EPT_ADDR_MASK);
  626. }
  627. offset = (guest_addr >> EPT_LEVEL_SHIFT(level)) & EPT_PGDIR_MASK;
  628. pt[offset] = pte;
  629. }
  630. /* Map a page, @perm is the permission of the page */
  631. void install_ept(unsigned long *pml4,
  632. unsigned long phys,
  633. unsigned long guest_addr,
  634. u64 perm)
  635. {
  636. install_ept_entry(pml4, 1, guest_addr, (phys & PAGE_MASK) | perm, 0);
  637. }
  638. /* Map a 1G-size page */
  639. void install_1g_ept(unsigned long *pml4,
  640. unsigned long phys,
  641. unsigned long guest_addr,
  642. u64 perm)
  643. {
  644. install_ept_entry(pml4, 3, guest_addr,
  645. (phys & PAGE_MASK) | perm | EPT_LARGE_PAGE, 0);
  646. }
  647. /* Map a 2M-size page */
  648. void install_2m_ept(unsigned long *pml4,
  649. unsigned long phys,
  650. unsigned long guest_addr,
  651. u64 perm)
  652. {
  653. install_ept_entry(pml4, 2, guest_addr,
  654. (phys & PAGE_MASK) | perm | EPT_LARGE_PAGE, 0);
  655. }
  656. /* setup_ept_range : Setup a range of 1:1 mapped page to EPT paging structure.
  657. @start : start address of guest page
  658. @len : length of address to be mapped
  659. @map_1g : whether 1G page map is used
  660. @map_2m : whether 2M page map is used
  661. @perm : permission for every page
  662. */
  663. void setup_ept_range(unsigned long *pml4, unsigned long start,
  664. unsigned long len, int map_1g, int map_2m, u64 perm)
  665. {
  666. u64 phys = start;
  667. u64 max = (u64)len + (u64)start;
  668. if (map_1g) {
  669. while (phys + PAGE_SIZE_1G <= max) {
  670. install_1g_ept(pml4, phys, phys, perm);
  671. phys += PAGE_SIZE_1G;
  672. }
  673. }
  674. if (map_2m) {
  675. while (phys + PAGE_SIZE_2M <= max) {
  676. install_2m_ept(pml4, phys, phys, perm);
  677. phys += PAGE_SIZE_2M;
  678. }
  679. }
  680. while (phys + PAGE_SIZE <= max) {
  681. install_ept(pml4, phys, phys, perm);
  682. phys += PAGE_SIZE;
  683. }
  684. }
  685. /* get_ept_pte : Get the PTE of a given level in EPT,
  686. @level == 1 means get the latest level*/
  687. bool get_ept_pte(unsigned long *pml4, unsigned long guest_addr, int level,
  688. unsigned long *pte)
  689. {
  690. int l;
  691. unsigned long *pt = pml4, iter_pte;
  692. unsigned offset;
  693. assert(level >= 1 && level <= 4);
  694. for (l = EPT_PAGE_LEVEL; ; --l) {
  695. offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK;
  696. iter_pte = pt[offset];
  697. if (l == level)
  698. break;
  699. if (l < 4 && (iter_pte & EPT_LARGE_PAGE))
  700. return false;
  701. if (!(iter_pte & (EPT_PRESENT)))
  702. return false;
  703. pt = (unsigned long *)(iter_pte & EPT_ADDR_MASK);
  704. }
  705. offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK;
  706. if (pte)
  707. *pte = pt[offset];
  708. return true;
  709. }
  710. static void clear_ept_ad_pte(unsigned long *pml4, unsigned long guest_addr)
  711. {
  712. int l;
  713. unsigned long *pt = pml4;
  714. u64 pte;
  715. unsigned offset;
  716. for (l = EPT_PAGE_LEVEL; ; --l) {
  717. offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK;
  718. pt[offset] &= ~(EPT_ACCESS_FLAG|EPT_DIRTY_FLAG);
  719. pte = pt[offset];
  720. if (l == 1 || (l < 4 && (pte & EPT_LARGE_PAGE)))
  721. break;
  722. pt = (unsigned long *)(pte & EPT_ADDR_MASK);
  723. }
  724. }
  725. /* clear_ept_ad : Clear EPT A/D bits for the page table walk and the
  726. final GPA of a guest address. */
  727. void clear_ept_ad(unsigned long *pml4, u64 guest_cr3,
  728. unsigned long guest_addr)
  729. {
  730. int l;
  731. unsigned long *pt = (unsigned long *)guest_cr3, gpa;
  732. u64 pte, offset_in_page;
  733. unsigned offset;
  734. for (l = EPT_PAGE_LEVEL; ; --l) {
  735. offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK;
  736. clear_ept_ad_pte(pml4, (u64) &pt[offset]);
  737. pte = pt[offset];
  738. if (l == 1 || (l < 4 && (pte & PT_PAGE_SIZE_MASK)))
  739. break;
  740. if (!(pte & PT_PRESENT_MASK))
  741. return;
  742. pt = (unsigned long *)(pte & PT_ADDR_MASK);
  743. }
  744. offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK;
  745. offset_in_page = guest_addr & ((1 << EPT_LEVEL_SHIFT(l)) - 1);
  746. gpa = (pt[offset] & PT_ADDR_MASK) | (guest_addr & offset_in_page);
  747. clear_ept_ad_pte(pml4, gpa);
  748. }
  749. /* check_ept_ad : Check the content of EPT A/D bits for the page table
  750. walk and the final GPA of a guest address. */
  751. void check_ept_ad(unsigned long *pml4, u64 guest_cr3,
  752. unsigned long guest_addr, int expected_gpa_ad,
  753. int expected_pt_ad)
  754. {
  755. int l;
  756. unsigned long *pt = (unsigned long *)guest_cr3, gpa;
  757. u64 ept_pte, pte, offset_in_page;
  758. unsigned offset;
  759. bool bad_pt_ad = false;
  760. for (l = EPT_PAGE_LEVEL; ; --l) {
  761. offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK;
  762. if (!get_ept_pte(pml4, (u64) &pt[offset], 1, &ept_pte)) {
  763. printf("EPT - guest level %d page table is not mapped.\n", l);
  764. return;
  765. }
  766. if (!bad_pt_ad) {
  767. bad_pt_ad |= (ept_pte & (EPT_ACCESS_FLAG|EPT_DIRTY_FLAG)) != expected_pt_ad;
  768. if (bad_pt_ad)
  769. report("EPT - guest level %d page table A=%d/D=%d",
  770. false, l,
  771. !!(expected_pt_ad & EPT_ACCESS_FLAG),
  772. !!(expected_pt_ad & EPT_DIRTY_FLAG));
  773. }
  774. pte = pt[offset];
  775. if (l == 1 || (l < 4 && (pte & PT_PAGE_SIZE_MASK)))
  776. break;
  777. if (!(pte & PT_PRESENT_MASK))
  778. return;
  779. pt = (unsigned long *)(pte & PT_ADDR_MASK);
  780. }
  781. if (!bad_pt_ad)
  782. report("EPT - guest page table structures A=%d/D=%d",
  783. true,
  784. !!(expected_pt_ad & EPT_ACCESS_FLAG),
  785. !!(expected_pt_ad & EPT_DIRTY_FLAG));
  786. offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK;
  787. offset_in_page = guest_addr & ((1 << EPT_LEVEL_SHIFT(l)) - 1);
  788. gpa = (pt[offset] & PT_ADDR_MASK) | (guest_addr & offset_in_page);
  789. if (!get_ept_pte(pml4, gpa, 1, &ept_pte)) {
  790. report("EPT - guest physical address is not mapped", false);
  791. return;
  792. }
  793. report("EPT - guest physical address A=%d/D=%d",
  794. (ept_pte & (EPT_ACCESS_FLAG|EPT_DIRTY_FLAG)) == expected_gpa_ad,
  795. !!(expected_gpa_ad & EPT_ACCESS_FLAG),
  796. !!(expected_gpa_ad & EPT_DIRTY_FLAG));
  797. }
  798. void ept_sync(int type, u64 eptp)
  799. {
  800. switch (type) {
  801. case INVEPT_SINGLE:
  802. if (ept_vpid.val & EPT_CAP_INVEPT_SINGLE) {
  803. invept(INVEPT_SINGLE, eptp);
  804. break;
  805. }
  806. /* else fall through */
  807. case INVEPT_GLOBAL:
  808. if (ept_vpid.val & EPT_CAP_INVEPT_ALL) {
  809. invept(INVEPT_GLOBAL, eptp);
  810. break;
  811. }
  812. /* else fall through */
  813. default:
  814. printf("WARNING: invept is not supported!\n");
  815. }
  816. }
  817. void set_ept_pte(unsigned long *pml4, unsigned long guest_addr,
  818. int level, u64 pte_val)
  819. {
  820. int l;
  821. unsigned long *pt = pml4;
  822. unsigned offset;
  823. assert(level >= 1 && level <= 4);
  824. for (l = EPT_PAGE_LEVEL; ; --l) {
  825. offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK;
  826. if (l == level)
  827. break;
  828. assert(pt[offset] & EPT_PRESENT);
  829. pt = (unsigned long *)(pt[offset] & EPT_ADDR_MASK);
  830. }
  831. offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK;
  832. pt[offset] = pte_val;
  833. }
  834. bool ept_2m_supported(void)
  835. {
  836. return ept_vpid.val & EPT_CAP_2M_PAGE;
  837. }
  838. bool ept_1g_supported(void)
  839. {
  840. return ept_vpid.val & EPT_CAP_1G_PAGE;
  841. }
  842. bool ept_huge_pages_supported(int level)
  843. {
  844. if (level == 2)
  845. return ept_2m_supported();
  846. else if (level == 3)
  847. return ept_1g_supported();
  848. else
  849. return false;
  850. }
  851. bool ept_execute_only_supported(void)
  852. {
  853. return ept_vpid.val & EPT_CAP_WT;
  854. }
  855. bool ept_ad_bits_supported(void)
  856. {
  857. return ept_vpid.val & EPT_CAP_AD_FLAG;
  858. }
  859. void vpid_sync(int type, u16 vpid)
  860. {
  861. switch(type) {
  862. case INVVPID_CONTEXT_GLOBAL:
  863. if (ept_vpid.val & VPID_CAP_INVVPID_CXTGLB) {
  864. invvpid(INVVPID_CONTEXT_GLOBAL, vpid, 0);
  865. break;
  866. }
  867. case INVVPID_ALL:
  868. if (ept_vpid.val & VPID_CAP_INVVPID_ALL) {
  869. invvpid(INVVPID_ALL, vpid, 0);
  870. break;
  871. }
  872. default:
  873. printf("WARNING: invvpid is not supported\n");
  874. }
  875. }
  876. static void init_vmcs_ctrl(void)
  877. {
  878. /* 26.2 CHECKS ON VMX CONTROLS AND HOST-STATE AREA */
  879. /* 26.2.1.1 */
  880. vmcs_write(PIN_CONTROLS, ctrl_pin);
  881. /* Disable VMEXIT of IO instruction */
  882. vmcs_write(CPU_EXEC_CTRL0, ctrl_cpu[0]);
  883. if (ctrl_cpu_rev[0].set & CPU_SECONDARY) {
  884. ctrl_cpu[1] = (ctrl_cpu[1] | ctrl_cpu_rev[1].set) &
  885. ctrl_cpu_rev[1].clr;
  886. vmcs_write(CPU_EXEC_CTRL1, ctrl_cpu[1]);
  887. }
  888. vmcs_write(CR3_TARGET_COUNT, 0);
  889. vmcs_write(VPID, ++vpid_cnt);
  890. }
  891. static void init_vmcs_host(void)
  892. {
  893. /* 26.2 CHECKS ON VMX CONTROLS AND HOST-STATE AREA */
  894. /* 26.2.1.2 */
  895. vmcs_write(HOST_EFER, rdmsr(MSR_EFER));
  896. /* 26.2.1.3 */
  897. vmcs_write(ENT_CONTROLS, ctrl_enter);
  898. vmcs_write(EXI_CONTROLS, ctrl_exit);
  899. /* 26.2.2 */
  900. vmcs_write(HOST_CR0, read_cr0());
  901. vmcs_write(HOST_CR3, read_cr3());
  902. vmcs_write(HOST_CR4, read_cr4());
  903. vmcs_write(HOST_SYSENTER_EIP, (u64)(&entry_sysenter));
  904. vmcs_write(HOST_SYSENTER_CS, KERNEL_CS);
  905. /* 26.2.3 */
  906. vmcs_write(HOST_SEL_CS, KERNEL_CS);
  907. vmcs_write(HOST_SEL_SS, KERNEL_DS);
  908. vmcs_write(HOST_SEL_DS, KERNEL_DS);
  909. vmcs_write(HOST_SEL_ES, KERNEL_DS);
  910. vmcs_write(HOST_SEL_FS, KERNEL_DS);
  911. vmcs_write(HOST_SEL_GS, KERNEL_DS);
  912. vmcs_write(HOST_SEL_TR, TSS_MAIN);
  913. vmcs_write(HOST_BASE_TR, tss_descr.base);
  914. vmcs_write(HOST_BASE_GDTR, gdt64_desc.base);
  915. vmcs_write(HOST_BASE_IDTR, idt_descr.base);
  916. vmcs_write(HOST_BASE_FS, 0);
  917. vmcs_write(HOST_BASE_GS, 0);
  918. /* Set other vmcs area */
  919. vmcs_write(PF_ERROR_MASK, 0);
  920. vmcs_write(PF_ERROR_MATCH, 0);
  921. vmcs_write(VMCS_LINK_PTR, ~0ul);
  922. vmcs_write(VMCS_LINK_PTR_HI, ~0ul);
  923. vmcs_write(HOST_RIP, (u64)(&vmx_return));
  924. }
  925. static void init_vmcs_guest(void)
  926. {
  927. /* 26.3 CHECKING AND LOADING GUEST STATE */
  928. ulong guest_cr0, guest_cr4, guest_cr3;
  929. /* 26.3.1.1 */
  930. guest_cr0 = read_cr0();
  931. guest_cr4 = read_cr4();
  932. guest_cr3 = read_cr3();
  933. if (ctrl_enter & ENT_GUEST_64) {
  934. guest_cr0 |= X86_CR0_PG;
  935. guest_cr4 |= X86_CR4_PAE;
  936. }
  937. if ((ctrl_enter & ENT_GUEST_64) == 0)
  938. guest_cr4 &= (~X86_CR4_PCIDE);
  939. if (guest_cr0 & X86_CR0_PG)
  940. guest_cr0 |= X86_CR0_PE;
  941. vmcs_write(GUEST_CR0, guest_cr0);
  942. vmcs_write(GUEST_CR3, guest_cr3);
  943. vmcs_write(GUEST_CR4, guest_cr4);
  944. vmcs_write(GUEST_SYSENTER_CS, KERNEL_CS);
  945. vmcs_write(GUEST_SYSENTER_ESP,
  946. (u64)(guest_syscall_stack + PAGE_SIZE - 1));
  947. vmcs_write(GUEST_SYSENTER_EIP, (u64)(&entry_sysenter));
  948. vmcs_write(GUEST_DR7, 0);
  949. vmcs_write(GUEST_EFER, rdmsr(MSR_EFER));
  950. /* 26.3.1.2 */
  951. vmcs_write(GUEST_SEL_CS, KERNEL_CS);
  952. vmcs_write(GUEST_SEL_SS, KERNEL_DS);
  953. vmcs_write(GUEST_SEL_DS, KERNEL_DS);
  954. vmcs_write(GUEST_SEL_ES, KERNEL_DS);
  955. vmcs_write(GUEST_SEL_FS, KERNEL_DS);
  956. vmcs_write(GUEST_SEL_GS, KERNEL_DS);
  957. vmcs_write(GUEST_SEL_TR, TSS_MAIN);
  958. vmcs_write(GUEST_SEL_LDTR, 0);
  959. vmcs_write(GUEST_BASE_CS, 0);
  960. vmcs_write(GUEST_BASE_ES, 0);
  961. vmcs_write(GUEST_BASE_SS, 0);
  962. vmcs_write(GUEST_BASE_DS, 0);
  963. vmcs_write(GUEST_BASE_FS, 0);
  964. vmcs_write(GUEST_BASE_GS, 0);
  965. vmcs_write(GUEST_BASE_TR, tss_descr.base);
  966. vmcs_write(GUEST_BASE_LDTR, 0);
  967. vmcs_write(GUEST_LIMIT_CS, 0xFFFFFFFF);
  968. vmcs_write(GUEST_LIMIT_DS, 0xFFFFFFFF);
  969. vmcs_write(GUEST_LIMIT_ES, 0xFFFFFFFF);
  970. vmcs_write(GUEST_LIMIT_SS, 0xFFFFFFFF);
  971. vmcs_write(GUEST_LIMIT_FS, 0xFFFFFFFF);
  972. vmcs_write(GUEST_LIMIT_GS, 0xFFFFFFFF);
  973. vmcs_write(GUEST_LIMIT_LDTR, 0xffff);
  974. vmcs_write(GUEST_LIMIT_TR, tss_descr.limit);
  975. vmcs_write(GUEST_AR_CS, 0xa09b);
  976. vmcs_write(GUEST_AR_DS, 0xc093);
  977. vmcs_write(GUEST_AR_ES, 0xc093);
  978. vmcs_write(GUEST_AR_FS, 0xc093);
  979. vmcs_write(GUEST_AR_GS, 0xc093);
  980. vmcs_write(GUEST_AR_SS, 0xc093);
  981. vmcs_write(GUEST_AR_LDTR, 0x82);
  982. vmcs_write(GUEST_AR_TR, 0x8b);
  983. /* 26.3.1.3 */
  984. vmcs_write(GUEST_BASE_GDTR, gdt64_desc.base);
  985. vmcs_write(GUEST_BASE_IDTR, idt_descr.base);
  986. vmcs_write(GUEST_LIMIT_GDTR, gdt64_desc.limit);
  987. vmcs_write(GUEST_LIMIT_IDTR, idt_descr.limit);
  988. /* 26.3.1.4 */
  989. vmcs_write(GUEST_RIP, (u64)(&guest_entry));
  990. vmcs_write(GUEST_RSP, (u64)(guest_stack + PAGE_SIZE - 1));
  991. vmcs_write(GUEST_RFLAGS, 0x2);
  992. /* 26.3.1.5 */
  993. vmcs_write(GUEST_ACTV_STATE, ACTV_ACTIVE);
  994. vmcs_write(GUEST_INTR_STATE, 0);
  995. }
  996. static int init_vmcs(struct vmcs **vmcs)
  997. {
  998. *vmcs = alloc_page();
  999. memset(*vmcs, 0, PAGE_SIZE);
  1000. (*vmcs)->revision_id = basic.revision;
  1001. /* vmclear first to init vmcs */
  1002. if (vmcs_clear(*vmcs)) {
  1003. printf("%s : vmcs_clear error\n", __func__);
  1004. return 1;
  1005. }
  1006. if (make_vmcs_current(*vmcs)) {
  1007. printf("%s : make_vmcs_current error\n", __func__);
  1008. return 1;
  1009. }
  1010. /* All settings to pin/exit/enter/cpu
  1011. control fields should be placed here */
  1012. ctrl_pin |= PIN_EXTINT | PIN_NMI | PIN_VIRT_NMI;
  1013. ctrl_exit = EXI_LOAD_EFER | EXI_HOST_64;
  1014. ctrl_enter = (ENT_LOAD_EFER | ENT_GUEST_64);
  1015. /* DIsable IO instruction VMEXIT now */
  1016. ctrl_cpu[0] &= (~(CPU_IO | CPU_IO_BITMAP));
  1017. ctrl_cpu[1] = 0;
  1018. ctrl_pin = (ctrl_pin | ctrl_pin_rev.set) & ctrl_pin_rev.clr;
  1019. ctrl_enter = (ctrl_enter | ctrl_enter_rev.set) & ctrl_enter_rev.clr;
  1020. ctrl_exit = (ctrl_exit | ctrl_exit_rev.set) & ctrl_exit_rev.clr;
  1021. ctrl_cpu[0] = (ctrl_cpu[0] | ctrl_cpu_rev[0].set) & ctrl_cpu_rev[0].clr;
  1022. init_vmcs_ctrl();
  1023. init_vmcs_host();
  1024. init_vmcs_guest();
  1025. return 0;
  1026. }
  1027. static void init_vmx(void)
  1028. {
  1029. ulong fix_cr0_set, fix_cr0_clr;
  1030. ulong fix_cr4_set, fix_cr4_clr;
  1031. vmxon_region = alloc_page();
  1032. memset(vmxon_region, 0, PAGE_SIZE);
  1033. fix_cr0_set = rdmsr(MSR_IA32_VMX_CR0_FIXED0);
  1034. fix_cr0_clr = rdmsr(MSR_IA32_VMX_CR0_FIXED1);
  1035. fix_cr4_set = rdmsr(MSR_IA32_VMX_CR4_FIXED0);
  1036. fix_cr4_clr = rdmsr(MSR_IA32_VMX_CR4_FIXED1);
  1037. basic.val = rdmsr(MSR_IA32_VMX_BASIC);
  1038. ctrl_pin_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_PIN
  1039. : MSR_IA32_VMX_PINBASED_CTLS);
  1040. ctrl_exit_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_EXIT
  1041. : MSR_IA32_VMX_EXIT_CTLS);
  1042. ctrl_enter_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_ENTRY
  1043. : MSR_IA32_VMX_ENTRY_CTLS);
  1044. ctrl_cpu_rev[0].val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_PROC
  1045. : MSR_IA32_VMX_PROCBASED_CTLS);
  1046. if ((ctrl_cpu_rev[0].clr & CPU_SECONDARY) != 0)
  1047. ctrl_cpu_rev[1].val = rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2);
  1048. else
  1049. ctrl_cpu_rev[1].val = 0;
  1050. if ((ctrl_cpu_rev[1].clr & (CPU_EPT | CPU_VPID)) != 0)
  1051. ept_vpid.val = rdmsr(MSR_IA32_VMX_EPT_VPID_CAP);
  1052. else
  1053. ept_vpid.val = 0;
  1054. write_cr0((read_cr0() & fix_cr0_clr) | fix_cr0_set);
  1055. write_cr4((read_cr4() & fix_cr4_clr) | fix_cr4_set | X86_CR4_VMXE);
  1056. *vmxon_region = basic.revision;
  1057. guest_stack = alloc_page();
  1058. memset(guest_stack, 0, PAGE_SIZE);
  1059. guest_syscall_stack = alloc_page();
  1060. memset(guest_syscall_stack, 0, PAGE_SIZE);
  1061. }
  1062. static void do_vmxon_off(void *data)
  1063. {
  1064. vmx_on();
  1065. vmx_off();
  1066. }
  1067. static void do_write_feature_control(void *data)
  1068. {
  1069. wrmsr(MSR_IA32_FEATURE_CONTROL, 0);
  1070. }
  1071. static int test_vmx_feature_control(void)
  1072. {
  1073. u64 ia32_feature_control;
  1074. bool vmx_enabled;
  1075. ia32_feature_control = rdmsr(MSR_IA32_FEATURE_CONTROL);
  1076. vmx_enabled = ((ia32_feature_control & 0x5) == 0x5);
  1077. if ((ia32_feature_control & 0x5) == 0x5) {
  1078. printf("VMX enabled and locked by BIOS\n");
  1079. return 0;
  1080. } else if (ia32_feature_control & 0x1) {
  1081. printf("ERROR: VMX locked out by BIOS!?\n");
  1082. return 1;
  1083. }
  1084. wrmsr(MSR_IA32_FEATURE_CONTROL, 0);
  1085. report("test vmxon with FEATURE_CONTROL cleared",
  1086. test_for_exception(GP_VECTOR, &do_vmxon_off, NULL));
  1087. wrmsr(MSR_IA32_FEATURE_CONTROL, 0x4);
  1088. report("test vmxon without FEATURE_CONTROL lock",
  1089. test_for_exception(GP_VECTOR, &do_vmxon_off, NULL));
  1090. wrmsr(MSR_IA32_FEATURE_CONTROL, 0x5);
  1091. vmx_enabled = ((rdmsr(MSR_IA32_FEATURE_CONTROL) & 0x5) == 0x5);
  1092. report("test enable VMX in FEATURE_CONTROL", vmx_enabled);
  1093. report("test FEATURE_CONTROL lock bit",
  1094. test_for_exception(GP_VECTOR, &do_write_feature_control, NULL));
  1095. return !vmx_enabled;
  1096. }
  1097. static int test_vmxon(void)
  1098. {
  1099. int ret, ret1;
  1100. u64 *tmp_region = vmxon_region;
  1101. int width = cpuid_maxphyaddr();
  1102. /* Unaligned page access */
  1103. vmxon_region = (u64 *)((intptr_t)vmxon_region + 1);
  1104. ret1 = vmx_on();
  1105. report("test vmxon with unaligned vmxon region", ret1);
  1106. if (!ret1) {
  1107. ret = 1;
  1108. goto out;
  1109. }
  1110. /* gpa bits beyond physical address width are set*/
  1111. vmxon_region = (u64 *)((intptr_t)tmp_region | ((u64)1 << (width+1)));
  1112. ret1 = vmx_on();
  1113. report("test vmxon with bits set beyond physical address width", ret1);
  1114. if (!ret1) {
  1115. ret = 1;
  1116. goto out;
  1117. }
  1118. /* invalid revision indentifier */
  1119. vmxon_region = tmp_region;
  1120. *vmxon_region = 0xba9da9;
  1121. ret1 = vmx_on();
  1122. report("test vmxon with invalid revision identifier", ret1);
  1123. if (!ret1) {
  1124. ret = 1;
  1125. goto out;
  1126. }
  1127. /* and finally a valid region */
  1128. *vmxon_region = basic.revision;
  1129. ret = vmx_on();
  1130. report("test vmxon with valid vmxon region", !ret);
  1131. out:
  1132. return ret;
  1133. }
  1134. static void test_vmptrld(void)
  1135. {
  1136. struct vmcs *vmcs, *tmp_root;
  1137. int width = cpuid_maxphyaddr();
  1138. vmcs = alloc_page();
  1139. vmcs->revision_id = basic.revision;
  1140. /* Unaligned page access */
  1141. tmp_root = (struct vmcs *)((intptr_t)vmcs + 1);
  1142. report("test vmptrld with unaligned vmcs",
  1143. make_vmcs_current(tmp_root) == 1);
  1144. /* gpa bits beyond physical address width are set*/
  1145. tmp_root = (struct vmcs *)((intptr_t)vmcs |
  1146. ((u64)1 << (width+1)));
  1147. report("test vmptrld with vmcs address bits set beyond physical address width",
  1148. make_vmcs_current(tmp_root) == 1);
  1149. /* Pass VMXON region */
  1150. make_vmcs_current(vmcs);
  1151. tmp_root = (struct vmcs *)vmxon_region;
  1152. report("test vmptrld with vmxon region",
  1153. make_vmcs_current(tmp_root) == 1);
  1154. report("test vmptrld with vmxon region vm-instruction error",
  1155. vmcs_read(VMX_INST_ERROR) == VMXERR_VMPTRLD_VMXON_POINTER);
  1156. report("test vmptrld with valid vmcs region", make_vmcs_current(vmcs) == 0);
  1157. }
  1158. static void test_vmptrst(void)
  1159. {
  1160. int ret;
  1161. struct vmcs *vmcs1, *vmcs2;
  1162. vmcs1 = alloc_page();
  1163. memset(vmcs1, 0, PAGE_SIZE);
  1164. init_vmcs(&vmcs1);
  1165. ret = vmcs_save(&vmcs2);
  1166. report("test vmptrst", (!ret) && (vmcs1 == vmcs2));
  1167. }
  1168. struct vmx_ctl_msr {
  1169. const char *name;
  1170. u32 index, true_index;
  1171. u32 default1;
  1172. } vmx_ctl_msr[] = {
  1173. { "MSR_IA32_VMX_PINBASED_CTLS", MSR_IA32_VMX_PINBASED_CTLS,
  1174. MSR_IA32_VMX_TRUE_PIN, 0x16 },
  1175. { "MSR_IA32_VMX_PROCBASED_CTLS", MSR_IA32_VMX_PROCBASED_CTLS,
  1176. MSR_IA32_VMX_TRUE_PROC, 0x401e172 },
  1177. { "MSR_IA32_VMX_PROCBASED_CTLS2", MSR_IA32_VMX_PROCBASED_CTLS2,
  1178. MSR_IA32_VMX_PROCBASED_CTLS2, 0 },
  1179. { "MSR_IA32_VMX_EXIT_CTLS", MSR_IA32_VMX_EXIT_CTLS,
  1180. MSR_IA32_VMX_TRUE_EXIT, 0x36dff },
  1181. { "MSR_IA32_VMX_ENTRY_CTLS", MSR_IA32_VMX_ENTRY_CTLS,
  1182. MSR_IA32_VMX_TRUE_ENTRY, 0x11ff },
  1183. };
  1184. static void test_vmx_caps(void)
  1185. {
  1186. u64 val, default1, fixed0, fixed1;
  1187. union vmx_ctrl_msr ctrl, true_ctrl;
  1188. unsigned int n;
  1189. bool ok;
  1190. printf("\nTest suite: VMX capability reporting\n");
  1191. report("MSR_IA32_VMX_BASIC",
  1192. (basic.revision & (1ul << 31)) == 0 &&
  1193. basic.size > 0 && basic.size <= 4096 &&
  1194. (basic.type == 0 || basic.type == 6) &&
  1195. basic.reserved1 == 0 && basic.reserved2 == 0);
  1196. val = rdmsr(MSR_IA32_VMX_MISC);
  1197. report("MSR_IA32_VMX_MISC",
  1198. (!(ctrl_cpu_rev[1].clr & CPU_URG) || val & (1ul << 5)) &&
  1199. ((val >> 16) & 0x1ff) <= 256 &&
  1200. (val & 0xc0007e00) == 0);
  1201. for (n = 0; n < ARRAY_SIZE(vmx_ctl_msr); n++) {
  1202. ctrl.val = rdmsr(vmx_ctl_msr[n].index);
  1203. default1 = vmx_ctl_msr[n].default1;
  1204. ok = (ctrl.set & default1) == default1;
  1205. ok = ok && (ctrl.set & ~ctrl.clr) == 0;
  1206. if (ok && basic.ctrl) {
  1207. true_ctrl.val = rdmsr(vmx_ctl_msr[n].true_index);
  1208. ok = ctrl.clr == true_ctrl.clr;
  1209. ok = ok && ctrl.set == (true_ctrl.set | default1);
  1210. }
  1211. report("%s", ok, vmx_ctl_msr[n].name);
  1212. }
  1213. fixed0 = rdmsr(MSR_IA32_VMX_CR0_FIXED0);
  1214. fixed1 = rdmsr(MSR_IA32_VMX_CR0_FIXED1);
  1215. report("MSR_IA32_VMX_IA32_VMX_CR0_FIXED0/1",
  1216. ((fixed0 ^ fixed1) & ~fixed1) == 0);
  1217. fixed0 = rdmsr(MSR_IA32_VMX_CR4_FIXED0);
  1218. fixed1 = rdmsr(MSR_IA32_VMX_CR4_FIXED1);
  1219. report("MSR_IA32_VMX_IA32_VMX_CR4_FIXED0/1",
  1220. ((fixed0 ^ fixed1) & ~fixed1) == 0);
  1221. val = rdmsr(MSR_IA32_VMX_VMCS_ENUM);
  1222. report("MSR_IA32_VMX_VMCS_ENUM",
  1223. (val & 0x3e) >= 0x2a &&
  1224. (val & 0xfffffffffffffc01Ull) == 0);
  1225. val = rdmsr(MSR_IA32_VMX_EPT_VPID_CAP);
  1226. report("MSR_IA32_VMX_EPT_VPID_CAP",
  1227. (val & 0xfffff07ef98cbebeUll) == 0);
  1228. }
  1229. /* This function can only be called in guest */
  1230. static void __attribute__((__used__)) hypercall(u32 hypercall_no)
  1231. {
  1232. u64 val = 0;
  1233. val = (hypercall_no & HYPERCALL_MASK) | HYPERCALL_BIT;
  1234. hypercall_field = val;
  1235. asm volatile("vmcall\n\t");
  1236. }
  1237. static bool is_hypercall()
  1238. {
  1239. ulong reason, hyper_bit;
  1240. reason = vmcs_read(EXI_REASON) & 0xff;
  1241. hyper_bit = hypercall_field & HYPERCALL_BIT;
  1242. if (reason == VMX_VMCALL && hyper_bit)
  1243. return true;
  1244. return false;
  1245. }
  1246. static int handle_hypercall()
  1247. {
  1248. ulong hypercall_no;
  1249. hypercall_no = hypercall_field & HYPERCALL_MASK;
  1250. hypercall_field = 0;
  1251. switch (hypercall_no) {
  1252. case HYPERCALL_VMEXIT:
  1253. return VMX_TEST_VMEXIT;
  1254. case HYPERCALL_VMABORT:
  1255. return VMX_TEST_VMABORT;
  1256. case HYPERCALL_VMSKIP:
  1257. return VMX_TEST_VMSKIP;
  1258. default:
  1259. printf("ERROR : Invalid hypercall number : %ld\n", hypercall_no);
  1260. }
  1261. return VMX_TEST_EXIT;
  1262. }
  1263. static void continue_abort(void)
  1264. {
  1265. assert(!in_guest);
  1266. printf("Host was here when guest aborted:\n");
  1267. dump_stack();
  1268. longjmp(abort_target, 1);
  1269. abort();
  1270. }
  1271. void __abort_test(void)
  1272. {
  1273. if (in_guest)
  1274. hypercall(HYPERCALL_VMABORT);
  1275. else
  1276. longjmp(abort_target, 1);
  1277. abort();
  1278. }
  1279. static void continue_skip(void)
  1280. {
  1281. assert(!in_guest);
  1282. longjmp(abort_target, 1);
  1283. abort();
  1284. }
  1285. void test_skip(const char *msg)
  1286. {
  1287. printf("%s skipping test: %s\n", in_guest ? "Guest" : "Host", msg);
  1288. if (in_guest)
  1289. hypercall(HYPERCALL_VMABORT);
  1290. else
  1291. longjmp(abort_target, 1);
  1292. abort();
  1293. }
  1294. static int exit_handler()
  1295. {
  1296. int ret;
  1297. current->exits++;
  1298. regs.rflags = vmcs_read(GUEST_RFLAGS);
  1299. if (is_hypercall())
  1300. ret = handle_hypercall();
  1301. else
  1302. ret = current->exit_handler();
  1303. vmcs_write(GUEST_RFLAGS, regs.rflags);
  1304. return ret;
  1305. }
  1306. /*
  1307. * Called if vmlaunch or vmresume fails.
  1308. * @early - failure due to "VMX controls and host-state area" (26.2)
  1309. * @vmlaunch - was this a vmlaunch or vmresume
  1310. * @rflags - host rflags
  1311. */
  1312. static int
  1313. entry_failure_handler(struct vmentry_failure *failure)
  1314. {
  1315. if (current->entry_failure_handler)
  1316. return current->entry_failure_handler(failure);
  1317. else
  1318. return VMX_TEST_EXIT;
  1319. }
  1320. /*
  1321. * Tries to enter the guest. Returns true iff entry succeeded. Otherwise,
  1322. * populates @failure.
  1323. */
  1324. static bool vmx_enter_guest(struct vmentry_failure *failure)
  1325. {
  1326. failure->early = 0;
  1327. in_guest = 1;
  1328. asm volatile (
  1329. "mov %[HOST_RSP], %%rdi\n\t"
  1330. "vmwrite %%rsp, %%rdi\n\t"
  1331. LOAD_GPR_C
  1332. "cmpb $0, %[launched]\n\t"
  1333. "jne 1f\n\t"
  1334. "vmlaunch\n\t"
  1335. "jmp 2f\n\t"
  1336. "1: "
  1337. "vmresume\n\t"
  1338. "2: "
  1339. SAVE_GPR_C
  1340. "pushf\n\t"
  1341. "pop %%rdi\n\t"
  1342. "mov %%rdi, %[failure_flags]\n\t"
  1343. "movl $1, %[failure_flags]\n\t"
  1344. "jmp 3f\n\t"
  1345. "vmx_return:\n\t"
  1346. SAVE_GPR_C
  1347. "3: \n\t"
  1348. : [failure_early]"+m"(failure->early),
  1349. [failure_flags]"=m"(failure->flags)
  1350. : [launched]"m"(launched), [HOST_RSP]"i"(HOST_RSP)
  1351. : "rdi", "memory", "cc"
  1352. );
  1353. in_guest = 0;
  1354. failure->vmlaunch = !launched;
  1355. failure->instr = launched ? "vmresume" : "vmlaunch";
  1356. return !failure->early && !(vmcs_read(EXI_REASON) & VMX_ENTRY_FAILURE);
  1357. }
  1358. static int vmx_run()
  1359. {
  1360. while (1) {
  1361. u32 ret;
  1362. bool entered;
  1363. struct vmentry_failure failure;
  1364. entered = vmx_enter_guest(&failure);
  1365. if (entered) {
  1366. /*
  1367. * VMCS isn't in "launched" state if there's been any
  1368. * entry failure (early or otherwise).
  1369. */
  1370. launched = 1;
  1371. ret = exit_handler();
  1372. } else {
  1373. ret = entry_failure_handler(&failure);
  1374. }
  1375. switch (ret) {
  1376. case VMX_TEST_RESUME:
  1377. continue;
  1378. case VMX_TEST_VMEXIT:
  1379. guest_finished = 1;
  1380. return 0;
  1381. case VMX_TEST_EXIT:
  1382. break;
  1383. default:
  1384. printf("ERROR : Invalid %s_handler return val %d.\n",
  1385. entered ? "exit" : "entry_failure",
  1386. ret);
  1387. break;
  1388. }
  1389. if (entered)
  1390. print_vmexit_info();
  1391. else
  1392. print_vmentry_failure_info(&failure);
  1393. abort();
  1394. }
  1395. }
  1396. static void run_teardown_step(struct test_teardown_step *step)
  1397. {
  1398. step->func(step->data);
  1399. }
  1400. static int test_run(struct vmx_test *test)
  1401. {
  1402. int r;
  1403. /* Validate V2 interface. */
  1404. if (test->v2) {
  1405. int ret = 0;
  1406. if (test->init || test->guest_main || test->exit_handler ||
  1407. test->syscall_handler) {
  1408. report("V2 test cannot specify V1 callbacks.", 0);
  1409. ret = 1;
  1410. }
  1411. if (ret)
  1412. return ret;
  1413. }
  1414. if (test->name == NULL)
  1415. test->name = "(no name)";
  1416. if (vmx_on()) {
  1417. printf("%s : vmxon failed.\n", __func__);
  1418. return 1;
  1419. }
  1420. init_vmcs(&(test->vmcs));
  1421. /* Directly call test->init is ok here, init_vmcs has done
  1422. vmcs init, vmclear and vmptrld*/
  1423. if (test->init && test->init(test->vmcs) != VMX_TEST_START)
  1424. goto out;
  1425. teardown_count = 0;
  1426. v2_guest_main = NULL;
  1427. test->exits = 0;
  1428. current = test;
  1429. regs = test->guest_regs;
  1430. vmcs_write(GUEST_RFLAGS, regs.rflags | 0x2);
  1431. launched = 0;
  1432. guest_finished = 0;
  1433. printf("\nTest suite: %s\n", test->name);
  1434. r = setjmp(abort_target);
  1435. if (r) {
  1436. assert(!in_guest);
  1437. goto out;
  1438. }
  1439. if (test->v2)
  1440. test->v2();
  1441. else
  1442. vmx_run();
  1443. while (teardown_count > 0)
  1444. run_teardown_step(&teardown_steps[--teardown_count]);
  1445. if (launched && !guest_finished)
  1446. report("Guest didn't run to completion.", 0);
  1447. out:
  1448. if (vmx_off()) {
  1449. printf("%s : vmxoff failed.\n", __func__);
  1450. return 1;
  1451. }
  1452. return 0;
  1453. }
  1454. /*
  1455. * Add a teardown step. Executed after the test's main function returns.
  1456. * Teardown steps executed in reverse order.
  1457. */
  1458. void test_add_teardown(test_teardown_func func, void *data)
  1459. {
  1460. struct test_teardown_step *step;
  1461. TEST_ASSERT_MSG(teardown_count < MAX_TEST_TEARDOWN_STEPS,
  1462. "There are already %d teardown steps.",
  1463. teardown_count);
  1464. step = &teardown_steps[teardown_count++];
  1465. step->func = func;
  1466. step->data = data;
  1467. }
  1468. /*
  1469. * Set the target of the first enter_guest call. Can only be called once per
  1470. * test. Must be called before first enter_guest call.
  1471. */
  1472. void test_set_guest(test_guest_func func)
  1473. {
  1474. assert(current->v2);
  1475. TEST_ASSERT_MSG(!v2_guest_main, "Already set guest func.");
  1476. v2_guest_main = func;
  1477. }
  1478. /*
  1479. * Enters the guest (or launches it for the first time). Error to call once the
  1480. * guest has returned (i.e., run past the end of its guest() function). Also
  1481. * aborts if guest entry fails.
  1482. */
  1483. void enter_guest(void)
  1484. {
  1485. struct vmentry_failure failure;
  1486. TEST_ASSERT_MSG(v2_guest_main,
  1487. "Never called test_set_guest_func!");
  1488. TEST_ASSERT_MSG(!guest_finished,
  1489. "Called enter_guest() after guest returned.");
  1490. if (!vmx_enter_guest(&failure)) {
  1491. print_vmentry_failure_info(&failure);
  1492. abort();
  1493. }
  1494. launched = 1;
  1495. if (is_hypercall()) {
  1496. int ret;
  1497. ret = handle_hypercall();
  1498. switch (ret) {
  1499. case VMX_TEST_VMEXIT:
  1500. guest_finished = 1;
  1501. break;
  1502. case VMX_TEST_VMABORT:
  1503. continue_abort();
  1504. break;
  1505. case VMX_TEST_VMSKIP:
  1506. continue_skip();
  1507. break;
  1508. default:
  1509. printf("ERROR : Invalid handle_hypercall return %d.\n",
  1510. ret);
  1511. abort();
  1512. }
  1513. }
  1514. }
  1515. extern struct vmx_test vmx_tests[];
  1516. static bool
  1517. test_wanted(const char *name, const char *filters[], int filter_count)
  1518. {
  1519. int i;
  1520. bool positive = false;
  1521. bool match = false;
  1522. char clean_name[strlen(name) + 1];
  1523. char *c;
  1524. const char *n;
  1525. /* Replace spaces with underscores. */
  1526. n = name;
  1527. c = &clean_name[0];
  1528. do *c++ = (*n == ' ') ? '_' : *n;
  1529. while (*n++);
  1530. for (i = 0; i < filter_count; i++) {
  1531. const char *filter = filters[i];
  1532. if (filter[0] == '-') {
  1533. if (simple_glob(clean_name, filter + 1))
  1534. return false;
  1535. } else {
  1536. positive = true;
  1537. match |= simple_glob(clean_name, filter);
  1538. }
  1539. }
  1540. if (!positive || match) {
  1541. matched++;
  1542. return true;
  1543. } else {
  1544. return false;
  1545. }
  1546. }
  1547. int main(int argc, const char *argv[])
  1548. {
  1549. int i = 0;
  1550. setup_vm();
  1551. setup_idt();
  1552. hypercall_field = 0;
  1553. argv++;
  1554. argc--;
  1555. if (!(cpuid(1).c & (1 << 5))) {
  1556. printf("WARNING: vmx not supported, add '-cpu host'\n");
  1557. goto exit;
  1558. }
  1559. init_vmx();
  1560. if (test_wanted("test_vmx_feature_control", argv, argc)) {
  1561. /* Sets MSR_IA32_FEATURE_CONTROL to 0x5 */
  1562. if (test_vmx_feature_control() != 0)
  1563. goto exit;
  1564. } else {
  1565. if ((rdmsr(MSR_IA32_FEATURE_CONTROL) & 0x5) != 0x5)
  1566. wrmsr(MSR_IA32_FEATURE_CONTROL, 0x5);
  1567. }
  1568. if (test_wanted("test_vmxon", argv, argc)) {
  1569. /* Enables VMX */
  1570. if (test_vmxon() != 0)
  1571. goto exit;
  1572. } else {
  1573. if (vmx_on()) {
  1574. report("vmxon", 0);
  1575. goto exit;
  1576. }
  1577. }
  1578. if (test_wanted("test_vmptrld", argv, argc))
  1579. test_vmptrld();
  1580. if (test_wanted("test_vmclear", argv, argc))
  1581. test_vmclear();
  1582. if (test_wanted("test_vmptrst", argv, argc))
  1583. test_vmptrst();
  1584. if (test_wanted("test_vmwrite_vmread", argv, argc))
  1585. test_vmwrite_vmread();
  1586. if (test_wanted("test_vmcs_lifecycle", argv, argc))
  1587. test_vmcs_lifecycle();
  1588. if (test_wanted("test_vmx_caps", argv, argc))
  1589. test_vmx_caps();
  1590. /* Balance vmxon from test_vmxon. */
  1591. vmx_off();
  1592. for (; vmx_tests[i].name != NULL; i++) {
  1593. if (!test_wanted(vmx_tests[i].name, argv, argc))
  1594. continue;
  1595. if (test_run(&vmx_tests[i]))
  1596. goto exit;
  1597. }
  1598. if (!matched)
  1599. report("command line didn't match any tests!", matched);
  1600. exit:
  1601. return report_summary();
  1602. }