Home Explore Help
Register Sign In
RISCI_ATOM
/
v86
mirror of https://github.com/copy/v86.git
1
0
Fork 0
Files Issues 0 Wiki
Branch: master
Branches Tags
v86
/
docs
/
sse-shifts.txt

sse-shifts.txt 2.8 KB
Permalink History Raw

123456789101112131415161718192021222324252627282930313233343536373839 
  1.    0F F1     PSLLW 	mm 	mm/m64 	       mmx 	       Shift Packed Data Left Logical
    2. 

  2. 66 0F F1     PSLLW 	xmm 	xmm/m128       sse2 	       Shift Packed Data Left Logical
    3. 

  3.    0F F2     PSLLD 	mm 	mm/m64 	       mmx 	       Shift Packed Data Left Logical
    4. 

  4. 66 0F F2     PSLLD 	xmm 	xmm/m128       sse2 	       Shift Packed Data Left Logical
    5. 

  5.    0F F3     PSLLQ 	mm 	mm/m64 	       mmx 	       Shift Packed Data Left Logical
    6. 

  6. 66 0F F3     PSLLQ 	xmm 	xmm/m128       sse2 	       Shift Packed Data Left Logical
    7. 

  7. 

  8.    0F E1     PSRAW 	mm 	mm/m64 	       mmx             Shift Packed Data Right Arithmetic
    9. 

  9. 66 0F E1     PSRAW 	xmm 	xmm/m128       sse2	       Shift Packed Data Right Arithmetic
    10. 

  10.    0F E2     PSRAD 	mm 	mm/m64 	       mmx	       Shift Packed Data Right Arithmetic
    11. 

  11. 66 0F E2     PSRAD 	xmm 	xmm/m128       sse2	       Shift Packed Data Right Arithmetic
    12. 

  12. 

  13.    0F D1     PSRLW 	mm 	mm/m64 	       mmx 	       Shift Packed Data Right Logical
    14. 

  14. 66 0F D1     PSRLW 	xmm 	xmm/m128       sse2 	       Shift Packed Data Right Logical
    15. 

  15.    0F D2     PSRLD 	mm 	mm/m64 	       mmx 	       Shift Packed Data Right Logical
    16. 

  16. 66 0F D2     PSRLD 	xmm 	xmm/m128       sse2 	       Shift Packed Data Right Logical
    17. 

  17.    0F D3     PSRLQ 	mm 	mm/m64 	       mmx 	       Shift Packed Data Right Logical
    18. 

  18. 66 0F D3     PSRLQ 	xmm 	xmm/m128       sse2 	       Shift Packed Data Right Logical
    19. 

  19. 

  20.    0F 71     PSRLW 	mm 	imm8 	       mmx 	       Shift Packed Data Right Logical
    21. 

  21. 66 0F 71     PSRLW 	xmm 	imm8 	       sse2 	       Shift Packed Data Right Logical
    22. 

  22.    0F 71     PSRAW 	mm 	imm8 	       mmx 	       Shift Packed Data Right Arithmetic
    23. 

  23. 66 0F 71     PSRAW 	xmm 	imm8 	       sse2 	       Shift Packed Data Right Arithmetic
    24. 

  24.    0F 71     PSLLW 	mm 	imm8 	       mmx 	       Shift Packed Data Left Logical
    25. 

  25. 66 0F 71     PSLLW 	xmm 	imm8 	       sse2 	       Shift Packed Data Left Logical
    26. 

  26. 

  27.    0F 72     PSRLD 	mm 	imm8 	       mmx 	       Shift Double Quadword Right Logical
    28. 

  28. 66 0F 72     PSRLD 	xmm 	imm8 	       sse2 	       Shift Double Quadword Right Logical
    29. 

  29.    0F 72     PSRAD 	mm 	imm8 	       mmx 	       Shift Packed Data Right Arithmetic
    30. 

  30. 66 0F 72     PSRAD 	xmm 	imm8 	       sse2 	       Shift Packed Data Right Arithmetic
    31. 

  31.    0F 72     PSLLD 	mm 	imm8 	       mmx 	       Shift Packed Data Left Logical
    32. 

  32. 66 0F 72     PSLLD 	xmm 	imm8 	       sse2 	       Shift Packed Data Left Logical
    33. 

  33. 

  34.    0F 73     PSRLQ 	mm 	imm8 	       mmx 	       Shift Packed Data Right Logical
    35. 

  35. 66 0F 73     PSRLQ 	xmm 	imm8 	       sse2 	       Shift Packed Data Right Logical
    36. 

  36. 66 0F 73     PSRLDQ 	xmm 	imm8 	       sse2 	       Shift Double Quadword Right Logical
    37. 

  37.    0F 73     PSLLQ 	mm 	imm8 	       mmx 	       Shift Packed Data Left Logical
    38. 

  38. 66 0F 73     PSLLQ 	xmm 	imm8 	       sse2 	       Shift Packed Data Left Logical
    39. 

  39. 66 0F 73     PSLLDQ 	xmm 	imm8 	       sse2 	       Shift Double Quadword Left Logical
    40.