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040-no_extern_inline.patch 3.5 KB

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  1. --- a/include/asm-mips/io.h
  2. +++ b/include/asm-mips/io.h
  3. @@ -118,12 +118,12 @@ static inline void set_io_port_base(unsi
  4. * Change virtual addresses to physical addresses and vv.
  5. * These are trivial on the 1:1 Linux/MIPS mapping
  6. */
  7. -extern inline phys_addr_t virt_to_phys(volatile void * address)
  8. +static inline phys_addr_t virt_to_phys(volatile void * address)
  9. {
  10. return CPHYSADDR(address);
  11. }
  12. -extern inline void * phys_to_virt(unsigned long address)
  13. +static inline void * phys_to_virt(unsigned long address)
  14. {
  15. return (void *)KSEG0ADDR(address);
  16. }
  17. @@ -131,12 +131,12 @@ extern inline void * phys_to_virt(unsign
  18. /*
  19. * IO bus memory addresses are also 1:1 with the physical address
  20. */
  21. -extern inline unsigned long virt_to_bus(volatile void * address)
  22. +static inline unsigned long virt_to_bus(volatile void * address)
  23. {
  24. return CPHYSADDR(address);
  25. }
  26. -extern inline void * bus_to_virt(unsigned long address)
  27. +static inline void * bus_to_virt(unsigned long address)
  28. {
  29. return (void *)KSEG0ADDR(address);
  30. }
  31. @@ -150,12 +150,12 @@ extern unsigned long isa_slot_offset;
  32. extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
  33. #if 0
  34. -extern inline void *ioremap(unsigned long offset, unsigned long size)
  35. +static inline void *ioremap(unsigned long offset, unsigned long size)
  36. {
  37. return __ioremap(offset, size, _CACHE_UNCACHED);
  38. }
  39. -extern inline void *ioremap_nocache(unsigned long offset, unsigned long size)
  40. +static inline void *ioremap_nocache(unsigned long offset, unsigned long size)
  41. {
  42. return __ioremap(offset, size, _CACHE_UNCACHED);
  43. }
  44. @@ -238,7 +238,7 @@ out:
  45. */
  46. #define __OUT1(s) \
  47. -extern inline void __out##s(unsigned int value, unsigned int port) {
  48. +static inline void __out##s(unsigned int value, unsigned int port) {
  49. #define __OUT2(m) \
  50. __asm__ __volatile__ ("s" #m "\t%0,%1(%2)"
  51. @@ -252,7 +252,7 @@ __OUT1(s##c_p) __OUT2(m) : : "r" (__iosw
  52. SLOW_DOWN_IO; }
  53. #define __IN1(t,s) \
  54. -extern __inline__ t __in##s(unsigned int port) { t _v;
  55. +static inline t __in##s(unsigned int port) { t _v;
  56. /*
  57. * Required nops will be inserted by the assembler
  58. @@ -267,7 +267,7 @@ __IN1(t,s##_p) __IN2(m) : "=r" (_v) : "i
  59. __IN1(t,s##c_p) __IN2(m) : "=r" (_v) : "ir" (port), "r" (mips_io_port_base)); SLOW_DOWN_IO; return __ioswab##w(_v); }
  60. #define __INS1(s) \
  61. -extern inline void __ins##s(unsigned int port, void * addr, unsigned long count) {
  62. +static inline void __ins##s(unsigned int port, void * addr, unsigned long count) {
  63. #define __INS2(m) \
  64. if (count) \
  65. @@ -295,7 +295,7 @@ __INS1(s##c) __INS2(m) \
  66. : "$1");}
  67. #define __OUTS1(s) \
  68. -extern inline void __outs##s(unsigned int port, const void * addr, unsigned long count) {
  69. +static inline void __outs##s(unsigned int port, const void * addr, unsigned long count) {
  70. #define __OUTS2(m) \
  71. if (count) \
  72. --- a/include/asm-mips/system.h
  73. +++ b/include/asm-mips/system.h
  74. @@ -23,7 +23,7 @@
  75. #include <linux/kernel.h>
  76. #endif
  77. -extern __inline__ void
  78. +static inline void
  79. __sti(void)
  80. {
  81. __asm__ __volatile__(
  82. @@ -47,7 +47,7 @@ __sti(void)
  83. * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
  84. * no nops at all.
  85. */
  86. -extern __inline__ void
  87. +static inline void
  88. __cli(void)
  89. {
  90. __asm__ __volatile__(
  91. @@ -208,7 +208,7 @@ do { \
  92. * For 32 and 64 bit operands we can take advantage of ll and sc.
  93. * FIXME: This doesn't work for R3000 machines.
  94. */
  95. -extern __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val)
  96. +static inline unsigned long xchg_u32(volatile int * m, unsigned long val)
  97. {
  98. #ifdef CONFIG_CPU_HAS_LLSC
  99. unsigned long dummy;