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0049-watchdog-add-MT7621-support.patch 5.6 KB

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  1. From 77fe64de72317c0e090d82056e7a6a073f2972b4 Mon Sep 17 00:00:00 2001
  2. From: John Crispin <blogic@openwrt.org>
  3. Date: Sun, 16 Mar 2014 05:24:42 +0000
  4. Subject: [PATCH 49/53] watchdog: add MT7621 support
  5. Signed-off-by: John Crispin <blogic@openwrt.org>
  6. ---
  7. drivers/watchdog/Kconfig | 7 ++
  8. drivers/watchdog/Makefile | 1 +
  9. drivers/watchdog/mt7621_wdt.c | 185 +++++++++++++++++++++++++++++++++++++++++
  10. 3 files changed, 193 insertions(+)
  11. create mode 100644 drivers/watchdog/mt7621_wdt.c
  12. --- a/drivers/watchdog/Kconfig
  13. +++ b/drivers/watchdog/Kconfig
  14. @@ -1345,6 +1345,13 @@ config RALINK_WDT
  15. help
  16. Hardware driver for the Ralink SoC Watchdog Timer.
  17. +config MT7621_WDT
  18. + tristate "Mediatek SoC watchdog"
  19. + select WATCHDOG_CORE
  20. + depends on SOC_MT7620 || SOC_MT7621
  21. + help
  22. + Hardware driver for the Ralink SoC Watchdog Timer.
  23. +
  24. # PARISC Architecture
  25. # POWERPC Architecture
  26. --- a/drivers/watchdog/Makefile
  27. +++ b/drivers/watchdog/Makefile
  28. @@ -69,6 +69,7 @@ obj-$(CONFIG_MEDIATEK_WATCHDOG) += mtk_w
  29. obj-$(CONFIG_DIGICOLOR_WATCHDOG) += digicolor_wdt.o
  30. obj-$(CONFIG_LPC18XX_WATCHDOG) += lpc18xx_wdt.o
  31. obj-$(CONFIG_BCM7038_WDT) += bcm7038_wdt.o
  32. +obj-$(CONFIG_MT7621_WDT) += mt7621_wdt.o
  33. # AVR32 Architecture
  34. obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o
  35. --- /dev/null
  36. +++ b/drivers/watchdog/mt7621_wdt.c
  37. @@ -0,0 +1,185 @@
  38. +/*
  39. + * Ralink RT288x/RT3xxx/MT76xx built-in hardware watchdog timer
  40. + *
  41. + * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
  42. + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
  43. + *
  44. + * This driver was based on: drivers/watchdog/softdog.c
  45. + *
  46. + * This program is free software; you can redistribute it and/or modify it
  47. + * under the terms of the GNU General Public License version 2 as published
  48. + * by the Free Software Foundation.
  49. + */
  50. +
  51. +#include <linux/clk.h>
  52. +#include <linux/reset.h>
  53. +#include <linux/module.h>
  54. +#include <linux/kernel.h>
  55. +#include <linux/watchdog.h>
  56. +#include <linux/miscdevice.h>
  57. +#include <linux/moduleparam.h>
  58. +#include <linux/platform_device.h>
  59. +
  60. +#include <asm/mach-ralink/ralink_regs.h>
  61. +
  62. +#define SYSC_RSTSTAT 0x38
  63. +#define WDT_RST_CAUSE BIT(1)
  64. +
  65. +#define RALINK_WDT_TIMEOUT 30
  66. +
  67. +#define TIMER_REG_TMRSTAT 0x00
  68. +#define TIMER_REG_TMR1LOAD 0x24
  69. +#define TIMER_REG_TMR1CTL 0x20
  70. +
  71. +#define TMR1CTL_ENABLE BIT(7)
  72. +#define TMR1CTL_RESTART BIT(9)
  73. +
  74. +static void __iomem *mt762x_wdt_base;
  75. +
  76. +static bool nowayout = WATCHDOG_NOWAYOUT;
  77. +module_param(nowayout, bool, 0);
  78. +MODULE_PARM_DESC(nowayout,
  79. + "Watchdog cannot be stopped once started (default="
  80. + __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  81. +
  82. +static inline void rt_wdt_w32(unsigned reg, u32 val)
  83. +{
  84. + iowrite32(val, mt762x_wdt_base + reg);
  85. +}
  86. +
  87. +static inline u32 rt_wdt_r32(unsigned reg)
  88. +{
  89. + return ioread32(mt762x_wdt_base + reg);
  90. +}
  91. +
  92. +static int mt762x_wdt_ping(struct watchdog_device *w)
  93. +{
  94. + rt_wdt_w32(TIMER_REG_TMRSTAT, TMR1CTL_RESTART);
  95. +
  96. + return 0;
  97. +}
  98. +
  99. +static int mt762x_wdt_set_timeout(struct watchdog_device *w, unsigned int t)
  100. +{
  101. + w->timeout = t;
  102. + rt_wdt_w32(TIMER_REG_TMR1LOAD, t * 1000);
  103. + mt762x_wdt_ping(w);
  104. +
  105. + return 0;
  106. +}
  107. +
  108. +static int mt762x_wdt_start(struct watchdog_device *w)
  109. +{
  110. + u32 t;
  111. +
  112. + rt_wdt_w32(TIMER_REG_TMR1CTL, 1000 << 16);
  113. + mt762x_wdt_set_timeout(w, w->timeout);
  114. +
  115. + t = rt_wdt_r32(TIMER_REG_TMR1CTL);
  116. + t |= TMR1CTL_ENABLE;
  117. + rt_wdt_w32(TIMER_REG_TMR1CTL, t);
  118. +
  119. + return 0;
  120. +}
  121. +
  122. +static int mt762x_wdt_stop(struct watchdog_device *w)
  123. +{
  124. + u32 t;
  125. +
  126. + mt762x_wdt_ping(w);
  127. +
  128. + t = rt_wdt_r32(TIMER_REG_TMR1CTL);
  129. + t &= ~TMR1CTL_ENABLE;
  130. + rt_wdt_w32(TIMER_REG_TMR1CTL, t);
  131. +
  132. + return 0;
  133. +}
  134. +
  135. +static int mt762x_wdt_bootcause(void)
  136. +{
  137. + if (rt_sysc_r32(SYSC_RSTSTAT) & WDT_RST_CAUSE)
  138. + return WDIOF_CARDRESET;
  139. +
  140. + return 0;
  141. +}
  142. +
  143. +static struct watchdog_info mt762x_wdt_info = {
  144. + .identity = "Mediatek Watchdog",
  145. + .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
  146. +};
  147. +
  148. +static struct watchdog_ops mt762x_wdt_ops = {
  149. + .owner = THIS_MODULE,
  150. + .start = mt762x_wdt_start,
  151. + .stop = mt762x_wdt_stop,
  152. + .ping = mt762x_wdt_ping,
  153. + .set_timeout = mt762x_wdt_set_timeout,
  154. +};
  155. +
  156. +static struct watchdog_device mt762x_wdt_dev = {
  157. + .info = &mt762x_wdt_info,
  158. + .ops = &mt762x_wdt_ops,
  159. + .min_timeout = 1,
  160. +};
  161. +
  162. +static int mt762x_wdt_probe(struct platform_device *pdev)
  163. +{
  164. + struct resource *res;
  165. + int ret;
  166. +
  167. + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  168. + mt762x_wdt_base = devm_ioremap_resource(&pdev->dev, res);
  169. + if (IS_ERR(mt762x_wdt_base))
  170. + return PTR_ERR(mt762x_wdt_base);
  171. +
  172. + device_reset(&pdev->dev);
  173. +
  174. + mt762x_wdt_dev.dev = &pdev->dev;
  175. + mt762x_wdt_dev.bootstatus = mt762x_wdt_bootcause();
  176. + mt762x_wdt_dev.max_timeout = (0xfffful / 1000);
  177. + mt762x_wdt_dev.timeout = mt762x_wdt_dev.max_timeout;
  178. +
  179. + watchdog_set_nowayout(&mt762x_wdt_dev, nowayout);
  180. +
  181. + ret = watchdog_register_device(&mt762x_wdt_dev);
  182. + if (!ret)
  183. + dev_info(&pdev->dev, "Initialized\n");
  184. +
  185. + return 0;
  186. +}
  187. +
  188. +static int mt762x_wdt_remove(struct platform_device *pdev)
  189. +{
  190. + watchdog_unregister_device(&mt762x_wdt_dev);
  191. +
  192. + return 0;
  193. +}
  194. +
  195. +static void mt762x_wdt_shutdown(struct platform_device *pdev)
  196. +{
  197. + mt762x_wdt_stop(&mt762x_wdt_dev);
  198. +}
  199. +
  200. +static const struct of_device_id mt762x_wdt_match[] = {
  201. + { .compatible = "mtk,mt7621-wdt" },
  202. + {},
  203. +};
  204. +MODULE_DEVICE_TABLE(of, mt762x_wdt_match);
  205. +
  206. +static struct platform_driver mt762x_wdt_driver = {
  207. + .probe = mt762x_wdt_probe,
  208. + .remove = mt762x_wdt_remove,
  209. + .shutdown = mt762x_wdt_shutdown,
  210. + .driver = {
  211. + .name = KBUILD_MODNAME,
  212. + .owner = THIS_MODULE,
  213. + .of_match_table = mt762x_wdt_match,
  214. + },
  215. +};
  216. +
  217. +module_platform_driver(mt762x_wdt_driver);
  218. +
  219. +MODULE_DESCRIPTION("MediaTek MT762x hardware watchdog driver");
  220. +MODULE_AUTHOR("John Crispin <blogic@openwrt.org");
  221. +MODULE_LICENSE("GPL v2");
  222. +MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);