mach-bhr-4grv2.c 4.8 KB

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  1. /*
  2. * Buffalo BHR-4GRV2 board support
  3. *
  4. * Copyright (c) 2012 Qualcomm Atheros
  5. * Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
  6. * Copyright (c) 2016 FUKAUMI Naoki <naobsd@gmail.com>
  7. *
  8. * Based on mach-ap136.c and mach-wzr-450hp2.c
  9. *
  10. * Permission to use, copy, modify, and/or distribute this software for any
  11. * purpose with or without fee is hereby granted, provided that the above
  12. * copyright notice and this permission notice appear in all copies.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  15. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  16. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  17. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  18. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  19. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  20. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  21. *
  22. */
  23. #include <linux/platform_device.h>
  24. #include <linux/ar8216_platform.h>
  25. #include <asm/mach-ath79/ar71xx_regs.h>
  26. #include "common.h"
  27. #include "dev-eth.h"
  28. #include "dev-gpio-buttons.h"
  29. #include "dev-leds-gpio.h"
  30. #include "dev-m25p80.h"
  31. #include "machtypes.h"
  32. #define BHR_4GRV2_GPIO_LED_VPN_RED 3
  33. #define BHR_4GRV2_GPIO_LED_VPN_GREEN 18
  34. #define BHR_4GRV2_GPIO_LED_POWER_GREEN 19
  35. #define BHR_4GRV2_GPIO_LED_DIAG_RED 20
  36. #define BHR_4GRV2_GPIO_BTN_RESET 17
  37. #define BHR_4GRV2_GPIO_BTN_ECO 21
  38. #define BHR_4GRV2_KEYS_POLL_INTERVAL 20 /* msecs */
  39. #define BHR_4GRV2_KEYS_DEBOUNCE_INTERVAL (3 * BHR_4GRV2_KEYS_POLL_INTERVAL)
  40. #define BHR_4GRV2_MAC0_OFFSET 0
  41. #define BHR_4GRV2_MAC1_OFFSET 6
  42. static struct gpio_led bhr_4grv2_leds_gpio[] __initdata = {
  43. {
  44. .name = "buffalo:red:vpn",
  45. .gpio = BHR_4GRV2_GPIO_LED_VPN_RED,
  46. .active_low = 1,
  47. },
  48. {
  49. .name = "buffalo:green:vpn",
  50. .gpio = BHR_4GRV2_GPIO_LED_VPN_GREEN,
  51. .active_low = 1,
  52. },
  53. {
  54. .name = "buffalo:green:power",
  55. .gpio = BHR_4GRV2_GPIO_LED_POWER_GREEN,
  56. .active_low = 1,
  57. },
  58. {
  59. .name = "buffalo:red:diag",
  60. .gpio = BHR_4GRV2_GPIO_LED_DIAG_RED,
  61. .active_low = 1,
  62. }
  63. };
  64. static struct gpio_keys_button bhr_4grv2_gpio_keys[] __initdata = {
  65. {
  66. .desc = "Reset button",
  67. .type = EV_KEY,
  68. .code = KEY_RESTART,
  69. .debounce_interval = BHR_4GRV2_KEYS_DEBOUNCE_INTERVAL,
  70. .gpio = BHR_4GRV2_GPIO_BTN_RESET,
  71. .active_low = 1,
  72. },
  73. {
  74. .desc = "ECO button",
  75. .type = EV_KEY,
  76. .code = BTN_0,
  77. .debounce_interval = BHR_4GRV2_KEYS_DEBOUNCE_INTERVAL,
  78. .gpio = BHR_4GRV2_GPIO_BTN_ECO,
  79. .active_low = 1,
  80. },
  81. };
  82. /* GMAC0 of the AR8327 switch is connected to GMAC1 via SGMII */
  83. static struct ar8327_pad_cfg bhr_4grv2_ar8327_pad0_cfg = {
  84. .mode = AR8327_PAD_MAC_SGMII,
  85. .sgmii_delay_en = true,
  86. };
  87. /* GMAC6 of the AR8327 switch is connected to GMAC0 via RGMII */
  88. static struct ar8327_pad_cfg bhr_4grv2_ar8327_pad6_cfg = {
  89. .mode = AR8327_PAD_MAC_RGMII,
  90. .txclk_delay_en = true,
  91. .rxclk_delay_en = true,
  92. .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
  93. .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
  94. };
  95. static struct ar8327_platform_data bhr_4grv2_ar8327_data = {
  96. .pad0_cfg = &bhr_4grv2_ar8327_pad0_cfg,
  97. .pad6_cfg = &bhr_4grv2_ar8327_pad6_cfg,
  98. .port0_cfg = {
  99. .force_link = 1,
  100. .speed = AR8327_PORT_SPEED_1000,
  101. .duplex = 1,
  102. .txpause = 1,
  103. .rxpause = 1,
  104. },
  105. .port6_cfg = {
  106. .force_link = 1,
  107. .speed = AR8327_PORT_SPEED_1000,
  108. .duplex = 1,
  109. .txpause = 1,
  110. .rxpause = 1,
  111. },
  112. };
  113. static struct mdio_board_info bhr_4grv2_mdio0_info[] = {
  114. {
  115. .bus_id = "ag71xx-mdio.0",
  116. .phy_addr = 0,
  117. .platform_data = &bhr_4grv2_ar8327_data,
  118. },
  119. };
  120. static void __init bhr_4grv2_setup(void)
  121. {
  122. u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
  123. ath79_register_m25p80(NULL);
  124. ath79_register_leds_gpio(-1, ARRAY_SIZE(bhr_4grv2_leds_gpio),
  125. bhr_4grv2_leds_gpio);
  126. ath79_register_gpio_keys_polled(-1, BHR_4GRV2_KEYS_POLL_INTERVAL,
  127. ARRAY_SIZE(bhr_4grv2_gpio_keys),
  128. bhr_4grv2_gpio_keys);
  129. mdiobus_register_board_info(bhr_4grv2_mdio0_info,
  130. ARRAY_SIZE(bhr_4grv2_mdio0_info));
  131. ath79_register_mdio(0, 0x0);
  132. ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
  133. /* GMAC0 is connected to the RGMII interface */
  134. ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
  135. ath79_eth0_data.phy_mask = BIT(0);
  136. ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
  137. ath79_eth0_pll_data.pll_1000 = 0x56000000;
  138. ath79_init_mac(ath79_eth0_data.mac_addr, art + BHR_4GRV2_MAC0_OFFSET, 0);
  139. ath79_register_eth(0);
  140. /* GMAC1 is connected to the SGMII interface */
  141. ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
  142. ath79_eth1_data.speed = SPEED_1000;
  143. ath79_eth1_data.duplex = DUPLEX_FULL;
  144. ath79_eth1_pll_data.pll_1000 = 0x03000101;
  145. ath79_init_mac(ath79_eth1_data.mac_addr, art + BHR_4GRV2_MAC1_OFFSET, 0);
  146. ath79_register_eth(1);
  147. }
  148. MIPS_MACHINE(ATH79_MACH_BHR_4GRV2, "BHR-4GRV2",
  149. "Buffalo BHR-4GRV2", bhr_4grv2_setup);