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mach-rb922.c 5.8 KB

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  1. /*
  2. * MikroTik RouterBOARD 91X support
  3. *
  4. * Copyright (C) 2015 Gabor Juhos <juhosg@openwrt.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published
  8. * by the Free Software Foundation.
  9. */
  10. #include <linux/phy.h>
  11. #include <linux/delay.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/ath9k_platform.h>
  14. #include <linux/mtd/mtd.h>
  15. #include <linux/mtd/nand.h>
  16. #include <linux/mtd/partitions.h>
  17. #include <linux/spi/spi.h>
  18. #include <linux/spi/flash.h>
  19. #include <linux/routerboot.h>
  20. #include <linux/gpio.h>
  21. #include <linux/platform_data/phy-at803x.h>
  22. #include <asm/prom.h>
  23. #include <asm/mach-ath79/ath79.h>
  24. #include <asm/mach-ath79/ar71xx_regs.h>
  25. #include "common.h"
  26. #include "dev-gpio-buttons.h"
  27. #include "dev-eth.h"
  28. #include "dev-leds-gpio.h"
  29. #include "dev-m25p80.h"
  30. #include "dev-nfc.h"
  31. #include "dev-usb.h"
  32. #include "dev-spi.h"
  33. #include "machtypes.h"
  34. #include "pci.h"
  35. #include "routerboot.h"
  36. #define RB922_GPIO_LED_USR 12
  37. #define RB922_GPIO_USB_POWER 13
  38. #define RB922_GPIO_FAN_CTRL 14
  39. #define RB922_GPIO_BTN_RESET 20
  40. #define RB922_GPIO_NAND_NCE 23
  41. #define RB922_PHY_ADDR 4
  42. #define RB922_KEYS_POLL_INTERVAL 20 /* msecs */
  43. #define RB922_KEYS_DEBOUNCE_INTERVAL (3 * RB922_KEYS_POLL_INTERVAL)
  44. #define RB_ROUTERBOOT_OFFSET 0x0000
  45. #define RB_ROUTERBOOT_MIN_SIZE 0xb000
  46. #define RB_HARD_CFG_SIZE 0x1000
  47. #define RB_BIOS_OFFSET 0xd000
  48. #define RB_BIOS_SIZE 0x1000
  49. #define RB_SOFT_CFG_OFFSET 0xf000
  50. #define RB_SOFT_CFG_SIZE 0x1000
  51. static struct mtd_partition rb922gs_spi_partitions[] = {
  52. {
  53. .name = "routerboot",
  54. .offset = RB_ROUTERBOOT_OFFSET,
  55. .mask_flags = MTD_WRITEABLE,
  56. }, {
  57. .name = "hard_config",
  58. .size = RB_HARD_CFG_SIZE,
  59. .mask_flags = MTD_WRITEABLE,
  60. }, {
  61. .name = "bios",
  62. .offset = RB_BIOS_OFFSET,
  63. .size = RB_BIOS_SIZE,
  64. .mask_flags = MTD_WRITEABLE,
  65. }, {
  66. .name = "soft_config",
  67. .size = RB_SOFT_CFG_SIZE,
  68. }
  69. };
  70. static struct flash_platform_data rb922gs_spi_flash_data = {
  71. .parts = rb922gs_spi_partitions,
  72. .nr_parts = ARRAY_SIZE(rb922gs_spi_partitions),
  73. };
  74. static struct gpio_led rb922gs_leds[] __initdata = {
  75. {
  76. .name = "rb:green:user",
  77. .gpio = RB922_GPIO_LED_USR,
  78. .active_low = 1,
  79. },
  80. };
  81. static struct gpio_keys_button rb922gs_gpio_keys[] __initdata = {
  82. {
  83. .desc = "Reset button",
  84. .type = EV_KEY,
  85. .code = KEY_RESTART,
  86. .debounce_interval = RB922_KEYS_DEBOUNCE_INTERVAL,
  87. .gpio = RB922_GPIO_BTN_RESET,
  88. .active_low = 1,
  89. },
  90. };
  91. static struct at803x_platform_data rb922gs_at803x_data = {
  92. .disable_smarteee = 1,
  93. };
  94. static struct mdio_board_info rb922gs_mdio0_info[] = {
  95. {
  96. .bus_id = "ag71xx-mdio.0",
  97. .phy_addr = RB922_PHY_ADDR,
  98. .platform_data = &rb922gs_at803x_data,
  99. },
  100. };
  101. static void __init rb922gs_init_partitions(const struct rb_info *info)
  102. {
  103. rb922gs_spi_partitions[0].size = info->hard_cfg_offs;
  104. rb922gs_spi_partitions[1].offset = info->hard_cfg_offs;
  105. rb922gs_spi_partitions[3].offset = info->soft_cfg_offs;
  106. }
  107. static void rb922gs_nand_select_chip(int chip_no)
  108. {
  109. switch (chip_no) {
  110. case 0:
  111. gpio_set_value(RB922_GPIO_NAND_NCE, 0);
  112. break;
  113. default:
  114. gpio_set_value(RB922_GPIO_NAND_NCE, 1);
  115. break;
  116. }
  117. ndelay(500);
  118. }
  119. static struct nand_ecclayout rb922gs_nand_ecclayout = {
  120. .eccbytes = 6,
  121. .eccpos = { 8, 9, 10, 13, 14, 15 },
  122. .oobavail = 9,
  123. .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
  124. };
  125. static int rb922gs_nand_scan_fixup(struct mtd_info *mtd)
  126. {
  127. struct nand_chip *chip = mtd->priv;
  128. if (mtd->writesize == 512) {
  129. /*
  130. * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot
  131. * will not be able to find the kernel that we load.
  132. */
  133. chip->ecc.layout = &rb922gs_nand_ecclayout;
  134. }
  135. return 0;
  136. }
  137. static struct mtd_partition rb922gs_nand_partitions[] = {
  138. {
  139. .name = "booter",
  140. .offset = 0,
  141. .size = (256 * 1024),
  142. .mask_flags = MTD_WRITEABLE,
  143. },
  144. {
  145. .name = "kernel",
  146. .offset = (256 * 1024),
  147. .size = (4 * 1024 * 1024) - (256 * 1024),
  148. },
  149. {
  150. .name = "ubi",
  151. .offset = MTDPART_OFS_NXTBLK,
  152. .size = MTDPART_SIZ_FULL,
  153. },
  154. };
  155. static void __init rb922gs_nand_init(void)
  156. {
  157. gpio_request_one(RB922_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE");
  158. ath79_nfc_set_scan_fixup(rb922gs_nand_scan_fixup);
  159. ath79_nfc_set_parts(rb922gs_nand_partitions,
  160. ARRAY_SIZE(rb922gs_nand_partitions));
  161. ath79_nfc_set_select_chip(rb922gs_nand_select_chip);
  162. ath79_nfc_set_swap_dma(true);
  163. ath79_register_nfc();
  164. }
  165. static void __init rb922gs_setup(void)
  166. {
  167. const struct rb_info *info;
  168. char buf[64];
  169. info = rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000);
  170. if (!info)
  171. return;
  172. scnprintf(buf, sizeof(buf), "Mikrotik RouterBOARD %s",
  173. (info->board_name) ? info->board_name : "");
  174. mips_set_machine_name(buf);
  175. rb922gs_init_partitions(info);
  176. ath79_register_m25p80(&rb922gs_spi_flash_data);
  177. rb922gs_nand_init();
  178. ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
  179. ath79_register_mdio(0, 0x0);
  180. mdiobus_register_board_info(rb922gs_mdio0_info,
  181. ARRAY_SIZE(rb922gs_mdio0_info));
  182. ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
  183. ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
  184. ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
  185. ath79_eth0_data.phy_mask = BIT(RB922_PHY_ADDR);
  186. ath79_eth0_pll_data.pll_10 = 0x81001313;
  187. ath79_eth0_pll_data.pll_100 = 0x81000101;
  188. ath79_eth0_pll_data.pll_1000 = 0x8f000000;
  189. ath79_register_eth(0);
  190. ath79_register_pci();
  191. ath79_register_leds_gpio(-1, ARRAY_SIZE(rb922gs_leds), rb922gs_leds);
  192. ath79_register_gpio_keys_polled(-1, RB922_KEYS_POLL_INTERVAL,
  193. ARRAY_SIZE(rb922gs_gpio_keys),
  194. rb922gs_gpio_keys);
  195. /* NOTE:
  196. * This only supports the RB911G-5HPacD board for now. For other boards
  197. * more devices must be registered based on the hardware options which
  198. * can be found in the hardware configuration of RouterBOOT.
  199. */
  200. }
  201. MIPS_MACHINE_NONAME(ATH79_MACH_RB_922GS, "922gs", rb922gs_setup);