mach-sr3200.c 4.9 KB

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  1. /*
  2. * Support for YunCore SR3200 and XD3200 boards
  3. *
  4. * Copyright (C) 2016 Piotr Dymacz <pepe2k@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published
  8. * by the Free Software Foundation.
  9. */
  10. #include <linux/phy.h>
  11. #include <linux/gpio.h>
  12. #include <linux/ar8216_platform.h>
  13. #include <linux/platform_device.h>
  14. #include <asm/mach-ath79/ath79.h>
  15. #include <asm/mach-ath79/ar71xx_regs.h>
  16. #include "common.h"
  17. #include "dev-ap9x-pci.h"
  18. #include "dev-eth.h"
  19. #include "dev-gpio-buttons.h"
  20. #include "dev-leds-gpio.h"
  21. #include "dev-m25p80.h"
  22. #include "dev-usb.h"
  23. #include "dev-wmac.h"
  24. #include "machtypes.h"
  25. #define SR3200_XD3200_GPIO_LED_SYSTEM 1
  26. #define SR3200_XD3200_GPIO_LED_WLAN2G 19
  27. #define SR3200_XD3200_GPIO_BTN_RESET 2
  28. #define SR3200_XD3200_KEYS_POLL_INTERVAL 20
  29. #define SR3200_XD3200_KEYS_DEBOUNCE_INTERVAL \
  30. (3 * SR3200_XD3200_KEYS_POLL_INTERVAL)
  31. static struct gpio_led xd3200_leds_gpio[] __initdata = {
  32. {
  33. .name = "xd3200:green:system",
  34. .gpio = SR3200_XD3200_GPIO_LED_SYSTEM,
  35. .active_low = 1,
  36. },
  37. {
  38. .name = "xd3200:blue:wlan2g",
  39. .gpio = SR3200_XD3200_GPIO_LED_WLAN2G,
  40. .active_low = 1,
  41. },
  42. };
  43. static struct gpio_led sr3200_leds_gpio[] __initdata = {
  44. {
  45. .name = "sr3200:green:system",
  46. .gpio = SR3200_XD3200_GPIO_LED_SYSTEM,
  47. .active_low = 1,
  48. },
  49. {
  50. .name = "sr3200:green:wlan2g",
  51. .gpio = SR3200_XD3200_GPIO_LED_WLAN2G,
  52. .active_low = 1,
  53. },
  54. };
  55. static struct gpio_keys_button sr3200_xd3200_gpio_keys[] __initdata = {
  56. {
  57. .desc = "reset",
  58. .type = EV_KEY,
  59. .code = KEY_RESTART,
  60. .debounce_interval = SR3200_XD3200_KEYS_DEBOUNCE_INTERVAL,
  61. .gpio = SR3200_XD3200_GPIO_BTN_RESET,
  62. .active_low = 1,
  63. },
  64. };
  65. static const struct ar8327_led_info sr3200_leds_qca833x[] = {
  66. AR8327_LED_INFO(PHY0_0, HW, "sr3200:green:lan1"),
  67. AR8327_LED_INFO(PHY1_0, HW, "sr3200:green:lan2"),
  68. AR8327_LED_INFO(PHY2_0, HW, "sr3200:green:lan3"),
  69. AR8327_LED_INFO(PHY3_0, HW, "sr3200:green:lan4"),
  70. AR8327_LED_INFO(PHY4_0, HW, "sr3200:green:wan"),
  71. };
  72. static const struct ar8327_led_info xd3200_leds_qca833x[] = {
  73. AR8327_LED_INFO(PHY1_0, HW, "xd3200:green:lan"),
  74. AR8327_LED_INFO(PHY2_0, HW, "xd3200:green:wan"),
  75. };
  76. /* Blink rate: 1 Gbps -> 8 hz, 100 Mbs -> 4 Hz, 10 Mbps -> 2 Hz */
  77. static struct ar8327_led_cfg sr3200_xd3200_qca833x_led_cfg = {
  78. .led_ctrl0 = 0xcf37cf37,
  79. .led_ctrl1 = 0xcf37cf37,
  80. .led_ctrl2 = 0xcf37cf37,
  81. .led_ctrl3 = 0x0,
  82. .open_drain = true,
  83. };
  84. static struct ar8327_pad_cfg sr3200_xd3200_qca833x_pad0_cfg = {
  85. .mode = AR8327_PAD_MAC_SGMII,
  86. .sgmii_delay_en = true,
  87. };
  88. static struct ar8327_platform_data sr3200_xd3200_qca833x_data = {
  89. .pad0_cfg = &sr3200_xd3200_qca833x_pad0_cfg,
  90. .port0_cfg = {
  91. .force_link = 1,
  92. .speed = AR8327_PORT_SPEED_1000,
  93. .duplex = 1,
  94. .txpause = 1,
  95. .rxpause = 1,
  96. },
  97. .led_cfg = &sr3200_xd3200_qca833x_led_cfg,
  98. };
  99. static struct mdio_board_info sr3200_xd3200_mdio0_info[] = {
  100. {
  101. .bus_id = "ag71xx-mdio.0",
  102. .phy_addr = 0,
  103. .platform_data = &sr3200_xd3200_qca833x_data,
  104. },
  105. };
  106. static void __init sr3200_xd3200_common_setup(void)
  107. {
  108. u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
  109. ath79_register_m25p80(NULL);
  110. ath79_register_mdio(0, 0x0);
  111. mdiobus_register_board_info(sr3200_xd3200_mdio0_info,
  112. ARRAY_SIZE(sr3200_xd3200_mdio0_info));
  113. /* GMAC0 is connected to QCA8334/QCA8337N switch */
  114. ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
  115. ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
  116. ath79_eth0_data.phy_mask = BIT(0);
  117. ath79_eth0_data.speed = SPEED_1000;
  118. ath79_eth0_data.duplex = DUPLEX_FULL;
  119. ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
  120. ath79_register_eth(0);
  121. ath79_register_wmac(mac + 0x1000, NULL);
  122. ap91_pci_init(mac + 0x5000, NULL);
  123. ath79_gpio_direction_select(SR3200_XD3200_GPIO_LED_SYSTEM, true);
  124. ath79_gpio_direction_select(SR3200_XD3200_GPIO_LED_WLAN2G, true);
  125. /* Mute LEDs on boot */
  126. gpio_set_value(SR3200_XD3200_GPIO_LED_SYSTEM, 1);
  127. gpio_set_value(SR3200_XD3200_GPIO_LED_WLAN2G, 1);
  128. ath79_gpio_output_select(SR3200_XD3200_GPIO_LED_SYSTEM, 0);
  129. ath79_gpio_output_select(SR3200_XD3200_GPIO_LED_WLAN2G, 0);
  130. ath79_register_gpio_keys_polled(-1, SR3200_XD3200_KEYS_POLL_INTERVAL,
  131. ARRAY_SIZE(sr3200_xd3200_gpio_keys),
  132. sr3200_xd3200_gpio_keys);
  133. }
  134. static void __init sr3200_setup(void)
  135. {
  136. sr3200_xd3200_qca833x_data.leds = sr3200_leds_qca833x;
  137. sr3200_xd3200_qca833x_data.num_leds = ARRAY_SIZE(sr3200_leds_qca833x);
  138. sr3200_xd3200_common_setup();
  139. ath79_register_leds_gpio(-1, ARRAY_SIZE(sr3200_leds_gpio),
  140. sr3200_leds_gpio);
  141. ath79_register_usb();
  142. }
  143. MIPS_MACHINE(ATH79_MACH_SR3200, "SR3200", "YunCore SR3200", sr3200_setup);
  144. static void __init xd3200_setup(void)
  145. {
  146. sr3200_xd3200_qca833x_data.leds = xd3200_leds_qca833x;
  147. sr3200_xd3200_qca833x_data.num_leds = ARRAY_SIZE(xd3200_leds_qca833x);
  148. sr3200_xd3200_common_setup();
  149. ath79_register_leds_gpio(-1, ARRAY_SIZE(xd3200_leds_gpio),
  150. xd3200_leds_gpio);
  151. }
  152. MIPS_MACHINE(ATH79_MACH_XD3200, "XD3200", "YunCore XD3200", xd3200_setup);