mach-tl-wdr3320-v2.c 3.8 KB

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  1. /*
  2. * TP-LINK TL-WDR3320 v2 board support
  3. *
  4. * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
  5. * Copyright (C) 2015 Weijie Gao <hackpascal@gmail.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published
  9. * by the Free Software Foundation.
  10. */
  11. #include <linux/pci.h>
  12. #include <linux/phy.h>
  13. #include <linux/gpio.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/ath9k_platform.h>
  16. #include <asm/mach-ath79/ar71xx_regs.h>
  17. #include "common.h"
  18. #include "dev-ap9x-pci.h"
  19. #include "dev-eth.h"
  20. #include "dev-gpio-buttons.h"
  21. #include "dev-leds-gpio.h"
  22. #include "dev-m25p80.h"
  23. #include "dev-spi.h"
  24. #include "dev-usb.h"
  25. #include "dev-wmac.h"
  26. #include "machtypes.h"
  27. #define WDR3320_GPIO_LED_WLAN5G 12
  28. #define WDR3320_GPIO_LED_SYSTEM 14
  29. #define WDR3320_GPIO_LED_QSS 15
  30. #define WDR3320_GPIO_LED_WAN 4
  31. #define WDR3320_GPIO_LED_LAN1 18
  32. #define WDR3320_GPIO_LED_LAN2 20
  33. #define WDR3320_GPIO_LED_LAN3 21
  34. #define WDR3320_GPIO_LED_LAN4 22
  35. #define WDR3320_GPIO_BTN_RESET 16
  36. #define WDR3320_KEYS_POLL_INTERVAL 20 /* msecs */
  37. #define WDR3320_KEYS_DEBOUNCE_INTERVAL (3 * WDR3320_KEYS_POLL_INTERVAL)
  38. #define WDR3320_WMAC_CALDATA_OFFSET 0x1000
  39. #define WDR3320_PCIE_CALDATA_OFFSET 0x5000
  40. static const char *wdr3320_part_probes[] = {
  41. "tp-link",
  42. NULL,
  43. };
  44. static struct flash_platform_data wdr3320_flash_data = {
  45. .part_probes = wdr3320_part_probes,
  46. };
  47. static struct gpio_led wdr3320_leds_gpio[] __initdata = {
  48. {
  49. .name = "tp-link:green:qss",
  50. .gpio = WDR3320_GPIO_LED_QSS,
  51. .active_low = 1,
  52. },
  53. {
  54. .name = "tp-link:green:system",
  55. .gpio = WDR3320_GPIO_LED_SYSTEM,
  56. .active_low = 1,
  57. },
  58. {
  59. .name = "tp-link:green:wlan5g",
  60. .gpio = WDR3320_GPIO_LED_WLAN5G,
  61. .active_low = 1,
  62. },
  63. };
  64. static struct gpio_keys_button wdr3320_gpio_keys[] __initdata = {
  65. {
  66. .desc = "reset",
  67. .type = EV_KEY,
  68. .code = KEY_RESTART,
  69. .debounce_interval = WDR3320_KEYS_DEBOUNCE_INTERVAL,
  70. .gpio = WDR3320_GPIO_BTN_RESET,
  71. .active_low = 1,
  72. },
  73. };
  74. static void __init wdr3320_setup(void)
  75. {
  76. u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
  77. u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
  78. u8 tmpmac[ETH_ALEN];
  79. ath79_register_m25p80(&wdr3320_flash_data);
  80. ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr3320_leds_gpio),
  81. wdr3320_leds_gpio);
  82. ath79_register_gpio_keys_polled(-1, WDR3320_KEYS_POLL_INTERVAL,
  83. ARRAY_SIZE(wdr3320_gpio_keys),
  84. wdr3320_gpio_keys);
  85. ath79_init_mac(tmpmac, mac, 0);
  86. ath79_register_wmac(art + WDR3320_WMAC_CALDATA_OFFSET, tmpmac);
  87. ath79_init_mac(tmpmac, mac, -1);
  88. ap9x_pci_setup_wmac_led_pin(0, 0);
  89. ap91_pci_init(art + WDR3320_PCIE_CALDATA_OFFSET, tmpmac);
  90. ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE);
  91. ath79_register_mdio(1, 0x0);
  92. /* LAN */
  93. ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
  94. /* GMAC1 is connected to the internal switch */
  95. ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
  96. ath79_register_eth(1);
  97. /* WAN */
  98. ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
  99. /* GMAC0 is connected to the PHY4 of the internal switch */
  100. ath79_switch_data.phy4_mii_en = 1;
  101. ath79_switch_data.phy_poll_mask = BIT(4);
  102. ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
  103. ath79_eth0_data.phy_mask = BIT(4);
  104. ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
  105. ath79_register_eth(0);
  106. ath79_register_usb();
  107. ath79_gpio_output_select(WDR3320_GPIO_LED_LAN1,
  108. AR934X_GPIO_OUT_LED_LINK0);
  109. ath79_gpio_output_select(WDR3320_GPIO_LED_LAN2,
  110. AR934X_GPIO_OUT_LED_LINK1);
  111. ath79_gpio_output_select(WDR3320_GPIO_LED_LAN3,
  112. AR934X_GPIO_OUT_LED_LINK2);
  113. ath79_gpio_output_select(WDR3320_GPIO_LED_LAN4,
  114. AR934X_GPIO_OUT_LED_LINK3);
  115. ath79_gpio_output_select(WDR3320_GPIO_LED_WAN,
  116. AR934X_GPIO_OUT_LED_LINK4);
  117. }
  118. MIPS_MACHINE(ATH79_MACH_TL_WDR3320_V2, "TL-WDR3320-v2",
  119. "TP-LINK TL-WDR3320 v2",
  120. wdr3320_setup);