mach-domywifi-dw33d.c 4.9 KB

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  1. /*
  2. * DomyWifi DW33D support
  3. *
  4. * Copyright (c) 2012 Qualcomm Atheros
  5. * Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
  6. *
  7. * Permission to use, copy, modify, and/or distribute this software for any
  8. * purpose with or without fee is hereby granted, provided that the above
  9. * copyright notice and this permission notice appear in all copies.
  10. *
  11. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  12. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  13. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  14. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  15. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  16. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  17. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  18. *
  19. */
  20. #include <linux/platform_device.h>
  21. #include <linux/ar8216_platform.h>
  22. #include <linux/mtd/mtd.h>
  23. #include <linux/mtd/nand.h>
  24. #include <linux/platform/ar934x_nfc.h>
  25. #include <asm/mach-ath79/ar71xx_regs.h>
  26. #include "common.h"
  27. #include "pci.h"
  28. #include "dev-ap9x-pci.h"
  29. #include "dev-gpio-buttons.h"
  30. #include "dev-eth.h"
  31. #include "dev-leds-gpio.h"
  32. #include "dev-m25p80.h"
  33. #include "dev-nfc.h"
  34. #include "dev-usb.h"
  35. #include "dev-wmac.h"
  36. #include "machtypes.h"
  37. #define DW33D_GPIO_LED_MMC 4
  38. #define DW33D_GPIO_LED_WLAN_2G 13
  39. #define DW33D_GPIO_LED_STATUS 14
  40. #define DW33D_GPIO_LED_USB 15
  41. #define DW33D_GPIO_LED_INTERNET 22
  42. #define DW33D_GPIO_BTN_RESET 17
  43. #define DW33D_KEYS_POLL_INTERVAL 20 /* msecs */
  44. #define DW33D_KEYS_DEBOUNCE_INTERVAL (3 * DW33D_KEYS_POLL_INTERVAL)
  45. #define DW33D_MAC0_OFFSET 0
  46. #define DW33D_MAC1_OFFSET 6
  47. #define DW33D_WMAC_OFFSET 12
  48. #define DW33D_WMAC_CALDATA_OFFSET 0x1000
  49. #define DW33D_PCIE_CALDATA_OFFSET 0x5000
  50. static struct gpio_led dw33d_leds_gpio[] __initdata = {
  51. {
  52. .name = "dw33d:blue:status",
  53. .gpio = DW33D_GPIO_LED_STATUS,
  54. .active_low = 1,
  55. },
  56. {
  57. .name = "dw33d:blue:mmc",
  58. .gpio = DW33D_GPIO_LED_MMC,
  59. .active_low = 1,
  60. },
  61. {
  62. .name = "dw33d:blue:usb",
  63. .gpio = DW33D_GPIO_LED_USB,
  64. .active_low = 1,
  65. },
  66. {
  67. .name = "dw33d:blue:wlan-2g",
  68. .gpio = DW33D_GPIO_LED_WLAN_2G,
  69. .active_low = 1,
  70. },
  71. {
  72. .name = "dw33d:blue:internet",
  73. .gpio = DW33D_GPIO_LED_INTERNET,
  74. .active_low = 1,
  75. }
  76. };
  77. static struct gpio_keys_button dw33d_gpio_keys[] __initdata = {
  78. {
  79. .desc = "Reset button",
  80. .type = EV_KEY,
  81. .code = KEY_RESTART,
  82. .debounce_interval = DW33D_KEYS_DEBOUNCE_INTERVAL,
  83. .gpio = DW33D_GPIO_BTN_RESET,
  84. .active_low = 1,
  85. }
  86. };
  87. /* GMAC6 of the QCA8337 switch is connected to the QCA9558 SoC via SGMII */
  88. static struct ar8327_pad_cfg dw33d_qca8337_pad6_cfg = {
  89. .mode = AR8327_PAD_MAC_SGMII,
  90. .sgmii_delay_en = true,
  91. };
  92. /* GMAC0 of the QCA8337 switch is connected to the QCA9558 SoC via RGMII */
  93. static struct ar8327_pad_cfg dw33d_qca8337_pad0_cfg = {
  94. .mode = AR8327_PAD_MAC_RGMII,
  95. .txclk_delay_en = true,
  96. .rxclk_delay_en = true,
  97. .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
  98. .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
  99. };
  100. static struct ar8327_platform_data dw33d_qca8337_data = {
  101. .pad0_cfg = &dw33d_qca8337_pad0_cfg,
  102. .pad6_cfg = &dw33d_qca8337_pad6_cfg,
  103. .port0_cfg = {
  104. .force_link = 1,
  105. .speed = AR8327_PORT_SPEED_1000,
  106. .duplex = 1,
  107. .txpause = 1,
  108. .rxpause = 1,
  109. },
  110. .port6_cfg = {
  111. .force_link = 1,
  112. .speed = AR8327_PORT_SPEED_1000,
  113. .duplex = 1,
  114. .txpause = 1,
  115. .rxpause = 1,
  116. },
  117. };
  118. static struct mdio_board_info dw33d_mdio0_info[] = {
  119. {
  120. .bus_id = "ag71xx-mdio.0",
  121. .phy_addr = 0,
  122. .platform_data = &dw33d_qca8337_data,
  123. },
  124. };
  125. static void __init dw33d_setup(void)
  126. {
  127. u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
  128. ath79_register_m25p80(NULL);
  129. ath79_register_leds_gpio(-1, ARRAY_SIZE(dw33d_leds_gpio),
  130. dw33d_leds_gpio);
  131. ath79_register_gpio_keys_polled(-1, DW33D_KEYS_POLL_INTERVAL,
  132. ARRAY_SIZE(dw33d_gpio_keys),
  133. dw33d_gpio_keys);
  134. ath79_register_usb();
  135. ath79_nfc_set_ecc_mode(AR934X_NFC_ECC_HW);
  136. ath79_register_nfc();
  137. ath79_register_pci();
  138. ath79_register_wmac(art + DW33D_WMAC_CALDATA_OFFSET, art + DW33D_WMAC_OFFSET);
  139. ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
  140. ath79_register_mdio(0, 0x0);
  141. ath79_init_mac(ath79_eth0_data.mac_addr, art + DW33D_MAC0_OFFSET, 0);
  142. ath79_init_mac(ath79_eth1_data.mac_addr, art + DW33D_MAC1_OFFSET, 0);
  143. mdiobus_register_board_info(dw33d_mdio0_info,
  144. ARRAY_SIZE(dw33d_mdio0_info));
  145. /* GMAC0 is connected to the RMGII interface */
  146. ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
  147. ath79_eth0_data.phy_mask = BIT(0);
  148. ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
  149. ath79_eth0_pll_data.pll_1000 = 0x56000000;
  150. ath79_register_eth(0);
  151. /* GMAC1 is connected tot eh SGMII interface */
  152. ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
  153. ath79_eth1_data.speed = SPEED_1000;
  154. ath79_eth1_data.duplex = DUPLEX_FULL;
  155. ath79_eth1_pll_data.pll_1000 = 0x03000101;
  156. ath79_register_eth(1);
  157. }
  158. MIPS_MACHINE(ATH79_MACH_DOMYWIFI_DW33D, "DW33D",
  159. "DomyWifi DW33D",
  160. dw33d_setup);