spi-rb4xx-cpld.c 7.3 KB

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  1. /*
  2. * SPI driver for the CPLD chip on the Mikrotik RB4xx boards
  3. *
  4. * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
  5. *
  6. * This file was based on the patches for Linux 2.6.27.39 published by
  7. * MikroTik for their RouterBoard 4xx series devices.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License version 2 as published
  11. * by the Free Software Foundation.
  12. */
  13. #include <linux/types.h>
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/init.h>
  17. #include <linux/module.h>
  18. #include <linux/device.h>
  19. #include <linux/bitops.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/gpio.h>
  22. #include <linux/slab.h>
  23. #include <asm/mach-ath79/rb4xx_cpld.h>
  24. #define DRV_NAME "spi-rb4xx-cpld"
  25. #define DRV_DESC "RB4xx CPLD driver"
  26. #define DRV_VERSION "0.1.0"
  27. #define CPLD_CMD_WRITE_NAND 0x08 /* send cmd, n x send data, send indle */
  28. #define CPLD_CMD_WRITE_CFG 0x09 /* send cmd, n x send cfg */
  29. #define CPLD_CMD_READ_NAND 0x0a /* send cmd, send idle, n x read data */
  30. #define CPLD_CMD_READ_FAST 0x0b /* send cmd, 4 x idle, n x read data */
  31. #define CPLD_CMD_LED5_ON 0x0c /* send cmd */
  32. #define CPLD_CMD_LED5_OFF 0x0d /* send cmd */
  33. struct rb4xx_cpld {
  34. struct spi_device *spi;
  35. struct mutex lock;
  36. struct gpio_chip chip;
  37. unsigned int config;
  38. };
  39. static struct rb4xx_cpld *rb4xx_cpld;
  40. static inline struct rb4xx_cpld *gpio_to_cpld(struct gpio_chip *chip)
  41. {
  42. return container_of(chip, struct rb4xx_cpld, chip);
  43. }
  44. static int rb4xx_cpld_write_cmd(struct rb4xx_cpld *cpld, unsigned char cmd)
  45. {
  46. struct spi_transfer t[1];
  47. struct spi_message m;
  48. unsigned char tx_buf[1];
  49. int err;
  50. spi_message_init(&m);
  51. memset(&t, 0, sizeof(t));
  52. t[0].tx_buf = tx_buf;
  53. t[0].len = sizeof(tx_buf);
  54. spi_message_add_tail(&t[0], &m);
  55. tx_buf[0] = cmd;
  56. err = spi_sync(cpld->spi, &m);
  57. return err;
  58. }
  59. static int rb4xx_cpld_write_cfg(struct rb4xx_cpld *cpld, unsigned char config)
  60. {
  61. struct spi_transfer t[1];
  62. struct spi_message m;
  63. unsigned char cmd[2];
  64. int err;
  65. spi_message_init(&m);
  66. memset(&t, 0, sizeof(t));
  67. t[0].tx_buf = cmd;
  68. t[0].len = sizeof(cmd);
  69. spi_message_add_tail(&t[0], &m);
  70. cmd[0] = CPLD_CMD_WRITE_CFG;
  71. cmd[1] = config;
  72. err = spi_sync(cpld->spi, &m);
  73. return err;
  74. }
  75. static int __rb4xx_cpld_change_cfg(struct rb4xx_cpld *cpld, unsigned mask,
  76. unsigned value)
  77. {
  78. unsigned int config;
  79. int err;
  80. config = cpld->config & ~mask;
  81. config |= value;
  82. if ((cpld->config ^ config) & 0xff) {
  83. err = rb4xx_cpld_write_cfg(cpld, config);
  84. if (err)
  85. return err;
  86. }
  87. if ((cpld->config ^ config) & CPLD_CFG_nLED5) {
  88. err = rb4xx_cpld_write_cmd(cpld, (value) ? CPLD_CMD_LED5_ON :
  89. CPLD_CMD_LED5_OFF);
  90. if (err)
  91. return err;
  92. }
  93. cpld->config = config;
  94. return 0;
  95. }
  96. int rb4xx_cpld_change_cfg(unsigned mask, unsigned value)
  97. {
  98. int ret;
  99. if (rb4xx_cpld == NULL)
  100. return -ENODEV;
  101. mutex_lock(&rb4xx_cpld->lock);
  102. ret = __rb4xx_cpld_change_cfg(rb4xx_cpld, mask, value);
  103. mutex_unlock(&rb4xx_cpld->lock);
  104. return ret;
  105. }
  106. EXPORT_SYMBOL_GPL(rb4xx_cpld_change_cfg);
  107. int rb4xx_cpld_read(unsigned char *rx_buf, unsigned count)
  108. {
  109. static const unsigned char cmd[2] = { CPLD_CMD_READ_NAND, 0 };
  110. struct spi_transfer t[2] = {
  111. {
  112. .tx_buf = &cmd,
  113. .len = 2,
  114. }, {
  115. .rx_buf = rx_buf,
  116. .len = count,
  117. },
  118. };
  119. struct spi_message m;
  120. if (rb4xx_cpld == NULL)
  121. return -ENODEV;
  122. spi_message_init(&m);
  123. spi_message_add_tail(&t[0], &m);
  124. spi_message_add_tail(&t[1], &m);
  125. return spi_sync(rb4xx_cpld->spi, &m);
  126. }
  127. EXPORT_SYMBOL_GPL(rb4xx_cpld_read);
  128. int rb4xx_cpld_write(const unsigned char *buf, unsigned count)
  129. {
  130. static const unsigned char cmd = CPLD_CMD_WRITE_NAND;
  131. struct spi_transfer t[3] = {
  132. {
  133. .tx_buf = &cmd,
  134. .len = 1,
  135. }, {
  136. .tx_buf = buf,
  137. .len = count,
  138. .tx_nbits = SPI_NBITS_DUAL,
  139. }, {
  140. .len = 1,
  141. .tx_nbits = SPI_NBITS_DUAL,
  142. },
  143. };
  144. struct spi_message m;
  145. if (rb4xx_cpld == NULL)
  146. return -ENODEV;
  147. spi_message_init(&m);
  148. spi_message_add_tail(&t[0], &m);
  149. spi_message_add_tail(&t[1], &m);
  150. spi_message_add_tail(&t[2], &m);
  151. return spi_sync(rb4xx_cpld->spi, &m);
  152. }
  153. EXPORT_SYMBOL_GPL(rb4xx_cpld_write);
  154. static int rb4xx_cpld_gpio_get(struct gpio_chip *chip, unsigned offset)
  155. {
  156. struct rb4xx_cpld *cpld = gpio_to_cpld(chip);
  157. int ret;
  158. mutex_lock(&cpld->lock);
  159. ret = (cpld->config >> offset) & 1;
  160. mutex_unlock(&cpld->lock);
  161. return ret;
  162. }
  163. static void rb4xx_cpld_gpio_set(struct gpio_chip *chip, unsigned offset,
  164. int value)
  165. {
  166. struct rb4xx_cpld *cpld = gpio_to_cpld(chip);
  167. mutex_lock(&cpld->lock);
  168. __rb4xx_cpld_change_cfg(cpld, (1 << offset), !!value << offset);
  169. mutex_unlock(&cpld->lock);
  170. }
  171. static int rb4xx_cpld_gpio_direction_input(struct gpio_chip *chip,
  172. unsigned offset)
  173. {
  174. return -EOPNOTSUPP;
  175. }
  176. static int rb4xx_cpld_gpio_direction_output(struct gpio_chip *chip,
  177. unsigned offset,
  178. int value)
  179. {
  180. struct rb4xx_cpld *cpld = gpio_to_cpld(chip);
  181. int ret;
  182. mutex_lock(&cpld->lock);
  183. ret = __rb4xx_cpld_change_cfg(cpld, (1 << offset), !!value << offset);
  184. mutex_unlock(&cpld->lock);
  185. return ret;
  186. }
  187. static int rb4xx_cpld_gpio_init(struct rb4xx_cpld *cpld, unsigned int base)
  188. {
  189. int err;
  190. /* init config */
  191. cpld->config = CPLD_CFG_nLED1 | CPLD_CFG_nLED2 | CPLD_CFG_nLED3 |
  192. CPLD_CFG_nLED4 | CPLD_CFG_nCE;
  193. rb4xx_cpld_write_cfg(cpld, cpld->config);
  194. /* setup GPIO chip */
  195. cpld->chip.label = DRV_NAME;
  196. cpld->chip.get = rb4xx_cpld_gpio_get;
  197. cpld->chip.set = rb4xx_cpld_gpio_set;
  198. cpld->chip.direction_input = rb4xx_cpld_gpio_direction_input;
  199. cpld->chip.direction_output = rb4xx_cpld_gpio_direction_output;
  200. cpld->chip.base = base;
  201. cpld->chip.ngpio = CPLD_NUM_GPIOS;
  202. cpld->chip.can_sleep = 1;
  203. cpld->chip.dev = &cpld->spi->dev;
  204. cpld->chip.owner = THIS_MODULE;
  205. err = gpiochip_add(&cpld->chip);
  206. if (err)
  207. dev_err(&cpld->spi->dev, "adding GPIO chip failed, err=%d\n",
  208. err);
  209. return err;
  210. }
  211. static int rb4xx_cpld_probe(struct spi_device *spi)
  212. {
  213. struct rb4xx_cpld *cpld;
  214. struct rb4xx_cpld_platform_data *pdata;
  215. int err;
  216. pdata = spi->dev.platform_data;
  217. if (!pdata) {
  218. dev_dbg(&spi->dev, "no platform data\n");
  219. return -EINVAL;
  220. }
  221. cpld = kzalloc(sizeof(*cpld), GFP_KERNEL);
  222. if (!cpld) {
  223. dev_err(&spi->dev, "no memory for private data\n");
  224. return -ENOMEM;
  225. }
  226. mutex_init(&cpld->lock);
  227. cpld->spi = spi_dev_get(spi);
  228. dev_set_drvdata(&spi->dev, cpld);
  229. spi->mode = SPI_MODE_0 | SPI_TX_DUAL;
  230. spi->bits_per_word = 8;
  231. err = spi_setup(spi);
  232. if (err) {
  233. dev_err(&spi->dev, "spi_setup failed, err=%d\n", err);
  234. goto err_drvdata;
  235. }
  236. err = rb4xx_cpld_gpio_init(cpld, pdata->gpio_base);
  237. if (err)
  238. goto err_drvdata;
  239. rb4xx_cpld = cpld;
  240. return 0;
  241. err_drvdata:
  242. dev_set_drvdata(&spi->dev, NULL);
  243. kfree(cpld);
  244. return err;
  245. }
  246. static int rb4xx_cpld_remove(struct spi_device *spi)
  247. {
  248. struct rb4xx_cpld *cpld;
  249. rb4xx_cpld = NULL;
  250. cpld = dev_get_drvdata(&spi->dev);
  251. dev_set_drvdata(&spi->dev, NULL);
  252. kfree(cpld);
  253. return 0;
  254. }
  255. static struct spi_driver rb4xx_cpld_driver = {
  256. .driver = {
  257. .name = DRV_NAME,
  258. .bus = &spi_bus_type,
  259. .owner = THIS_MODULE,
  260. },
  261. .probe = rb4xx_cpld_probe,
  262. .remove = rb4xx_cpld_remove,
  263. };
  264. static int __init rb4xx_cpld_init(void)
  265. {
  266. return spi_register_driver(&rb4xx_cpld_driver);
  267. }
  268. module_init(rb4xx_cpld_init);
  269. static void __exit rb4xx_cpld_exit(void)
  270. {
  271. spi_unregister_driver(&rb4xx_cpld_driver);
  272. }
  273. module_exit(rb4xx_cpld_exit);
  274. MODULE_DESCRIPTION(DRV_DESC);
  275. MODULE_VERSION(DRV_VERSION);
  276. MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
  277. MODULE_LICENSE("GPL v2");