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patches-4.4
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022-bcma-from-4.8.patch

022-bcma-from-4.8.patch 1.8 KB
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  1. --- a/drivers/bcma/Kconfig
    2. 

  2. +++ b/drivers/bcma/Kconfig
    3. 

  3. @@ -76,9 +76,16 @@ config BCMA_PFLASH
    4. 

  4.  	default y
    5. 

  5.  
    6. 

  6.  config BCMA_SFLASH
    7. 

  7. -	bool
    8. 

  8. -	depends on BCMA_DRIVER_MIPS
    9. 

  9. +	bool "ChipCommon-attached serial flash support"
    10. 

  10. +	depends on BCMA_HOST_SOC
    11. 

  11.  	default y
    12. 

  12. +	help
    13. 

  13. +	  Some cheap devices have serial flash connected to the ChipCommon
    14. 

  14. +	  instead of independent SPI controller. It requires using a separated
    15. 

  15. +	  driver that implements ChipCommon specific interface communication.
    16. 

  16. +
    17. 

  17. +	  Enabling this symbol will let bcma recognize serial flash and register
    18. 

  18. +	  it as platform device.
    19. 

  19.  
    20. 

  20.  config BCMA_NFLASH
    21. 

  21.  	bool
    22. 

  22. --- a/drivers/bcma/driver_chipcommon_b.c
    23. 

  23. +++ b/drivers/bcma/driver_chipcommon_b.c
    24. 

  24. @@ -33,11 +33,12 @@ static bool bcma_wait_reg(struct bcma_bu
    25. 

  25.  void bcma_chipco_b_mii_write(struct bcma_drv_cc_b *ccb, u32 offset, u32 value)
    26. 

  26.  {
    27. 

  27.  	struct bcma_bus *bus = ccb->core->bus;
    28. 

  28. +	void __iomem *mii = ccb->mii;
    29. 

  29.  
    30. 

  30. -	writel(offset, ccb->mii + 0x00);
    31. 

  31. -	bcma_wait_reg(bus, ccb->mii + 0x00, 0x0100, 0x0000, 100);
    32. 

  32. -	writel(value, ccb->mii + 0x04);
    33. 

  33. -	bcma_wait_reg(bus, ccb->mii + 0x00, 0x0100, 0x0000, 100);
    34. 

  34. +	writel(offset, mii + BCMA_CCB_MII_MNG_CTL);
    35. 

  35. +	bcma_wait_reg(bus, mii + BCMA_CCB_MII_MNG_CTL, 0x0100, 0x0000, 100);
    36. 

  36. +	writel(value, mii + BCMA_CCB_MII_MNG_CMD_DATA);
    37. 

  37. +	bcma_wait_reg(bus, mii + BCMA_CCB_MII_MNG_CTL, 0x0100, 0x0000, 100);
    38. 

  38.  }
    39. 

  39.  EXPORT_SYMBOL_GPL(bcma_chipco_b_mii_write);
    40. 

  40.  
    41. 

  41. --- a/include/linux/bcma/bcma_driver_chipcommon.h
    42. 

  42. +++ b/include/linux/bcma/bcma_driver_chipcommon.h
    43. 

  43. @@ -504,6 +504,9 @@
    44. 

  44.  #define BCMA_CC_PMU1_PLL0_PC2_NDIV_INT_MASK	0x1ff00000
    45. 

  45.  #define BCMA_CC_PMU1_PLL0_PC2_NDIV_INT_SHIFT	20
    46. 

  46.  
    47. 

  47. +#define BCMA_CCB_MII_MNG_CTL		0x0000
    48. 

  48. +#define BCMA_CCB_MII_MNG_CMD_DATA	0x0004
    49. 

  49. +
    50. 

  50.  /* BCM4331 ChipControl numbers. */
    51. 

  51.  #define BCMA_CHIPCTL_4331_BT_COEXIST		BIT(0)	/* 0 disable */
    52. 

  52.  #define BCMA_CHIPCTL_4331_SECI			BIT(1)	/* 0 SECI is disabled (JATG functional) */
    53.