ArcherMR200.dts 2.9 KB

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  1. /dts-v1/;
  2. #include "mt7620a.dtsi"
  3. #include <dt-bindings/input/input.h>
  4. #include <dt-bindings/gpio/gpio.h>
  5. / {
  6. compatible = "ralink,mt7620a-soc";
  7. model = "TP-Link Archer MR200";
  8. chosen {
  9. bootargs = "console=ttyS0,115200";
  10. };
  11. gpio-leds {
  12. compatible = "gpio-leds";
  13. lan {
  14. label = "mr200:white:lan";
  15. gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  16. };
  17. wan {
  18. label = "mr200:white:wan";
  19. gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
  20. };
  21. power {
  22. label = "mr200:white:power";
  23. gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  24. };
  25. 4g {
  26. label = "mr200:white:4g";
  27. gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
  28. };
  29. wps {
  30. label = "mr200:white:wps";
  31. gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  32. };
  33. signal1 {
  34. label = "mr200:white:signal1";
  35. gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
  36. };
  37. signal2 {
  38. label = "mr200:white:signal2";
  39. gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
  40. };
  41. signal3 {
  42. label = "mr200:white:signal3";
  43. gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
  44. };
  45. signal4 {
  46. label = "mr200:white:signal4";
  47. gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
  48. };
  49. wlan {
  50. label = "mr200:white:wlan";
  51. gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  52. };
  53. };
  54. gpio-keys {
  55. compatible = "gpio-keys";
  56. #address-cells = <1>;
  57. #size-cells = <0>;
  58. reset {
  59. label = "reset";
  60. gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
  61. linux,code = <KEY_RESTART>;
  62. };
  63. rfkill {
  64. label = "rfkill";
  65. gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
  66. linux,code = <KEY_RFKILL>;
  67. };
  68. };
  69. gpio_export {
  70. compatible = "gpio-export";
  71. #size-cells = <0>;
  72. power_usb {
  73. gpio-export,name = "power_usb1";
  74. gpio-export,output = <1>;
  75. gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
  76. };
  77. };
  78. };
  79. &gpio1 {
  80. status = "okay";
  81. };
  82. &gpio2 {
  83. status = "okay";
  84. };
  85. &gpio3 {
  86. status = "okay";
  87. };
  88. &spi0 {
  89. status = "okay";
  90. m25p80@0 {
  91. #address-cells = <1>;
  92. #size-cells = <1>;
  93. compatible = "jedec,spi-nor";
  94. reg = <0>;
  95. linux,modalias = "m25p80", "mx25l6405d";
  96. spi-max-frequency = <10000000>;
  97. partition@0 {
  98. label = "u-boot";
  99. reg = <0x0 0x20000>;
  100. read-only;
  101. };
  102. partition@20000 {
  103. label = "firmware";
  104. reg = <0x20000 0x7b0000>;
  105. };
  106. rom: partition@7d0000 {
  107. label = "rom";
  108. reg = <0x7d0000 0x10000>;
  109. read-only;
  110. };
  111. partition@7e0000 {
  112. label = "romfile";
  113. reg = <0x7e0000 0x10000>;
  114. read-only;
  115. };
  116. radio: partition@7f0000 {
  117. label = "radio";
  118. reg = <0x7f0000 0x10000>;
  119. read-only;
  120. };
  121. };
  122. };
  123. &pinctrl {
  124. state_default: pinctrl0 {
  125. gpio {
  126. ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "ephy", "spi refclk";
  127. ralink,function = "gpio";
  128. };
  129. };
  130. };
  131. &ethernet {
  132. mtd-mac-address = <&rom 0xf100>;
  133. mediatek,portmap = "llll";
  134. };
  135. &ehci {
  136. status = "okay";
  137. };
  138. &ohci {
  139. status = "okay";
  140. };
  141. &gsw {
  142. mediatek,port4 = "ephy";
  143. };
  144. &wmac {
  145. ralink,mtd-eeprom = <&radio 0>;
  146. };
  147. &pcie {
  148. status = "okay";
  149. pcie-bridge {
  150. mt76@0,0 {
  151. reg = <0x0000 0 0 0 0>;
  152. device_type = "pci";
  153. mediatek,mtd-eeprom = <&radio 32768>;
  154. mediatek,2ghz = <0>;
  155. };
  156. };
  157. };