1
0

0038-mtd-ralink-add-mt7620-nand-driver.patch 61 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408
  1. From fb6e1578cd73d7d81f675e75247a676423f32412 Mon Sep 17 00:00:00 2001
  2. From: John Crispin <blogic@openwrt.org>
  3. Date: Sun, 17 Nov 2013 17:41:46 +0100
  4. Subject: [PATCH 38/53] mtd: ralink: add mt7620 nand driver
  5. Signed-off-by: John Crispin <blogic@openwrt.org>
  6. ---
  7. drivers/mtd/maps/Kconfig | 4 +
  8. drivers/mtd/maps/Makefile | 2 +
  9. drivers/mtd/maps/ralink_nand.c | 2136 ++++++++++++++++++++++++++++++++++++++++
  10. drivers/mtd/maps/ralink_nand.h | 232 +++++
  11. 4 files changed, 2374 insertions(+)
  12. create mode 100644 drivers/mtd/maps/ralink_nand.c
  13. create mode 100644 drivers/mtd/maps/ralink_nand.h
  14. --- a/drivers/mtd/maps/Kconfig
  15. +++ b/drivers/mtd/maps/Kconfig
  16. @@ -399,4 +399,8 @@ config MTD_LATCH_ADDR
  17. If compiled as a module, it will be called latch-addr-flash.
  18. +config MTD_NAND_MT7620
  19. + tristate "Support for NAND on Mediatek MT7620"
  20. + depends on RALINK && SOC_MT7620
  21. +
  22. endmenu
  23. --- a/drivers/mtd/maps/Makefile
  24. +++ b/drivers/mtd/maps/Makefile
  25. @@ -43,3 +43,5 @@ obj-$(CONFIG_MTD_VMU) += vmu-flash.o
  26. obj-$(CONFIG_MTD_GPIO_ADDR) += gpio-addr-flash.o
  27. obj-$(CONFIG_MTD_LATCH_ADDR) += latch-addr-flash.o
  28. obj-$(CONFIG_MTD_LANTIQ) += lantiq-flash.o
  29. +obj-$(CONFIG_MTD_NAND_MT7620) += ralink_nand.o
  30. +
  31. --- /dev/null
  32. +++ b/drivers/mtd/maps/ralink_nand.c
  33. @@ -0,0 +1,2136 @@
  34. +#define DEBUG
  35. +#include <linux/device.h>
  36. +#undef DEBUG
  37. +#include <linux/slab.h>
  38. +#include <linux/mtd/mtd.h>
  39. +#include <linux/delay.h>
  40. +#include <linux/module.h>
  41. +#include <linux/interrupt.h>
  42. +#include <linux/dma-mapping.h>
  43. +#include <linux/mtd/partitions.h>
  44. +#include <asm/io.h>
  45. +#include <linux/delay.h>
  46. +#include <linux/sched.h>
  47. +#include <linux/of.h>
  48. +#include <linux/platform_device.h>
  49. +
  50. +#include "ralink_nand.h"
  51. +#ifdef RANDOM_GEN_BAD_BLOCK
  52. +#include <linux/random.h>
  53. +#endif
  54. +
  55. +#define LARGE_MTD_BOOT_PART_SIZE (CFG_BLOCKSIZE<<2)
  56. +#define LARGE_MTD_CONFIG_PART_SIZE (CFG_BLOCKSIZE<<2)
  57. +#define LARGE_MTD_FACTORY_PART_SIZE (CFG_BLOCKSIZE<<1)
  58. +
  59. +
  60. +#define BLOCK_ALIGNED(a) ((a) & (CFG_BLOCKSIZE - 1))
  61. +
  62. +#define READ_STATUS_RETRY 1000
  63. +
  64. +struct mtd_info *ranfc_mtd = NULL;
  65. +
  66. +int skipbbt = 0;
  67. +int ranfc_debug = 1;
  68. +static int ranfc_bbt = 1;
  69. +#if defined (WORKAROUND_RX_BUF_OV)
  70. +static int ranfc_verify = 1;
  71. +#endif
  72. +static u32 nand_addrlen;
  73. +
  74. +#if 0
  75. +module_param(ranfc_debug, int, 0644);
  76. +module_param(ranfc_bbt, int, 0644);
  77. +module_param(ranfc_verify, int, 0644);
  78. +#endif
  79. +
  80. +#if 0
  81. +#define ra_dbg(args...) do { if (ranfc_debug) printk(args); } while(0)
  82. +#else
  83. +#define ra_dbg(args...)
  84. +#endif
  85. +
  86. +#define CLEAR_INT_STATUS() ra_outl(NFC_INT_ST, ra_inl(NFC_INT_ST))
  87. +#define NFC_TRANS_DONE() (ra_inl(NFC_INT_ST) & INT_ST_ND_DONE)
  88. +
  89. +int is_nand_page_2048 = 0;
  90. +const unsigned int nand_size_map[2][3] = {{25, 30, 30}, {20, 27, 30}};
  91. +
  92. +static int nfc_wait_ready(int snooze_ms);
  93. +
  94. +static const char * const mtk_probe_types[] = { "cmdlinepart", "ofpart", NULL };
  95. +
  96. +/**
  97. + * reset nand chip
  98. + */
  99. +static int nfc_chip_reset(void)
  100. +{
  101. + int status;
  102. +
  103. + //ra_dbg("%s:\n", __func__);
  104. +
  105. + // reset nand flash
  106. + ra_outl(NFC_CMD1, 0x0);
  107. + ra_outl(NFC_CMD2, 0xff);
  108. + ra_outl(NFC_ADDR, 0x0);
  109. + ra_outl(NFC_CONF, 0x0411);
  110. +
  111. + status = nfc_wait_ready(5); //erase wait 5us
  112. + if (status & NAND_STATUS_FAIL) {
  113. + printk("%s: fail \n", __func__);
  114. + }
  115. +
  116. + return (int)(status & NAND_STATUS_FAIL);
  117. +
  118. +}
  119. +
  120. +
  121. +
  122. +/**
  123. + * clear NFC and flash chip.
  124. + */
  125. +static int nfc_all_reset(void)
  126. +{
  127. + int retry;
  128. +
  129. + ra_dbg("%s: \n", __func__);
  130. +
  131. + // reset controller
  132. + ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) | 0x02); //clear data buffer
  133. + ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) & ~0x02); //clear data buffer
  134. +
  135. + CLEAR_INT_STATUS();
  136. +
  137. + retry = READ_STATUS_RETRY;
  138. + while ((ra_inl(NFC_INT_ST) & 0x02) != 0x02 && retry--);
  139. + if (retry <= 0) {
  140. + printk("nfc_all_reset: clean buffer fail \n");
  141. + return -1;
  142. + }
  143. +
  144. + retry = READ_STATUS_RETRY;
  145. + while ((ra_inl(NFC_STATUS) & 0x1) != 0x0 && retry--) { //fixme, controller is busy ?
  146. + udelay(1);
  147. + }
  148. +
  149. + nfc_chip_reset();
  150. +
  151. + return 0;
  152. +}
  153. +
  154. +/** NOTICE: only called by nfc_wait_ready().
  155. + * @return -1, nfc can not get transction done
  156. + * @return 0, ok.
  157. + */
  158. +static int _nfc_read_status(char *status)
  159. +{
  160. + unsigned long cmd1, conf;
  161. + int int_st, nfc_st;
  162. + int retry;
  163. +
  164. + cmd1 = 0x70;
  165. + conf = 0x000101 | (1 << 20);
  166. +
  167. + //fixme, should we check nfc status?
  168. + CLEAR_INT_STATUS();
  169. +
  170. + ra_outl(NFC_CMD1, cmd1);
  171. + ra_outl(NFC_CONF, conf);
  172. +
  173. + /* FIXME,
  174. + * 1. since we have no wired ready signal, directly
  175. + * calling this function is not gurantee to read right status under ready state.
  176. + * 2. the other side, we can not determine how long to become ready, this timeout retry is nonsense.
  177. + * 3. SUGGESTION: call nfc_read_status() from nfc_wait_ready(),
  178. + * that is aware about caller (in sementics) and has snooze plused nfc ND_DONE.
  179. + */
  180. + retry = READ_STATUS_RETRY;
  181. + do {
  182. + nfc_st = ra_inl(NFC_STATUS);
  183. + int_st = ra_inl(NFC_INT_ST);
  184. +
  185. + ndelay(10);
  186. + } while (!(int_st & INT_ST_RX_BUF_RDY) && retry--);
  187. +
  188. + if (!(int_st & INT_ST_RX_BUF_RDY)) {
  189. + printk("nfc_read_status: NFC fail, int_st(%x), retry:%x. nfc:%x, reset nfc and flash. \n",
  190. + int_st, retry, nfc_st);
  191. + nfc_all_reset();
  192. + *status = NAND_STATUS_FAIL;
  193. + return -1;
  194. + }
  195. +
  196. + *status = (char)(le32_to_cpu(ra_inl(NFC_DATA)) & 0x0ff);
  197. + return 0;
  198. +}
  199. +
  200. +/**
  201. + * @return !0, chip protect.
  202. + * @return 0, chip not protected.
  203. + */
  204. +static int nfc_check_wp(void)
  205. +{
  206. + /* Check the WP bit */
  207. +#if !defined CONFIG_NOT_SUPPORT_WP
  208. + return !!(ra_inl(NFC_CTRL) & 0x01);
  209. +#else
  210. + char result = 0;
  211. + int ret;
  212. +
  213. + ret = _nfc_read_status(&result);
  214. + //FIXME, if ret < 0
  215. +
  216. + return !(result & NAND_STATUS_WP);
  217. +#endif
  218. +}
  219. +
  220. +#if !defined CONFIG_NOT_SUPPORT_RB
  221. +/*
  222. + * @return !0, chip ready.
  223. + * @return 0, chip busy.
  224. + */
  225. +static int nfc_device_ready(void)
  226. +{
  227. + /* Check the ready */
  228. + return !!(ra_inl(NFC_STATUS) & 0x04);
  229. +}
  230. +#endif
  231. +
  232. +
  233. +/**
  234. + * generic function to get data from flash.
  235. + * @return data length reading from flash.
  236. + */
  237. +static int _ra_nand_pull_data(char *buf, int len, int use_gdma)
  238. +{
  239. +#ifdef RW_DATA_BY_BYTE
  240. + char *p = buf;
  241. +#else
  242. + __u32 *p = (__u32 *)buf;
  243. +#endif
  244. + int retry, int_st;
  245. + unsigned int ret_data;
  246. + int ret_size;
  247. +
  248. + // receive data by use_gdma
  249. + if (use_gdma) {
  250. + //if (_ra_nand_dma_pull((unsigned long)p, len)) {
  251. + if (1) {
  252. + printk("%s: fail \n", __func__);
  253. + len = -1; //return error
  254. + }
  255. +
  256. + return len;
  257. + }
  258. +
  259. + //fixme: retry count size?
  260. + retry = READ_STATUS_RETRY;
  261. + // no gdma
  262. + while (len > 0) {
  263. + int_st = ra_inl(NFC_INT_ST);
  264. + if (int_st & INT_ST_RX_BUF_RDY) {
  265. +
  266. + ret_data = ra_inl(NFC_DATA);
  267. + ra_outl(NFC_INT_ST, INT_ST_RX_BUF_RDY);
  268. +#ifdef RW_DATA_BY_BYTE
  269. + ret_size = sizeof(unsigned int);
  270. + ret_size = min(ret_size, len);
  271. + len -= ret_size;
  272. + while (ret_size-- > 0) {
  273. + //nfc is little endian
  274. + *p++ = ret_data & 0x0ff;
  275. + ret_data >>= 8;
  276. + }
  277. +#else
  278. + ret_size = min(len, 4);
  279. + len -= ret_size;
  280. + if (ret_size == 4)
  281. + *p++ = ret_data;
  282. + else {
  283. + __u8 *q = (__u8 *)p;
  284. + while (ret_size-- > 0) {
  285. + *q++ = ret_data & 0x0ff;
  286. + ret_data >>= 8;
  287. + }
  288. + p = (__u32 *)q;
  289. + }
  290. +#endif
  291. + retry = READ_STATUS_RETRY;
  292. + }
  293. + else if (int_st & INT_ST_ND_DONE) {
  294. + break;
  295. + }
  296. + else {
  297. + udelay(1);
  298. + if (retry-- < 0)
  299. + break;
  300. + }
  301. + }
  302. +
  303. +#ifdef RW_DATA_BY_BYTE
  304. + return (int)(p - buf);
  305. +#else
  306. + return ((int)p - (int)buf);
  307. +#endif
  308. +}
  309. +
  310. +/**
  311. + * generic function to put data into flash.
  312. + * @return data length writing into flash.
  313. + */
  314. +static int _ra_nand_push_data(char *buf, int len, int use_gdma)
  315. +{
  316. +#ifdef RW_DATA_BY_BYTE
  317. + char *p = buf;
  318. +#else
  319. + __u32 *p = (__u32 *)buf;
  320. +#endif
  321. + int retry, int_st;
  322. + unsigned int tx_data = 0;
  323. + int tx_size, iter = 0;
  324. +
  325. + // receive data by use_gdma
  326. + if (use_gdma) {
  327. + //if (_ra_nand_dma_push((unsigned long)p, len))
  328. + if (1)
  329. + len = 0;
  330. + printk("%s: fail \n", __func__);
  331. + return len;
  332. + }
  333. +
  334. + // no gdma
  335. + retry = READ_STATUS_RETRY;
  336. + while (len > 0) {
  337. + int_st = ra_inl(NFC_INT_ST);
  338. + if (int_st & INT_ST_TX_BUF_RDY) {
  339. +#ifdef RW_DATA_BY_BYTE
  340. + tx_size = min(len, (int)sizeof(unsigned long));
  341. + for (iter = 0; iter < tx_size; iter++) {
  342. + tx_data |= (*p++ << (8*iter));
  343. + }
  344. +#else
  345. + tx_size = min(len, 4);
  346. + if (tx_size == 4)
  347. + tx_data = (*p++);
  348. + else {
  349. + __u8 *q = (__u8 *)p;
  350. + for (iter = 0; iter < tx_size; iter++)
  351. + tx_data |= (*q++ << (8*iter));
  352. + p = (__u32 *)q;
  353. + }
  354. +#endif
  355. + ra_outl(NFC_INT_ST, INT_ST_TX_BUF_RDY);
  356. + ra_outl(NFC_DATA, tx_data);
  357. + len -= tx_size;
  358. + retry = READ_STATUS_RETRY;
  359. + }
  360. + else if (int_st & INT_ST_ND_DONE) {
  361. + break;
  362. + }
  363. + else {
  364. + udelay(1);
  365. + if (retry-- < 0) {
  366. + ra_dbg("%s p:%p buf:%p \n", __func__, p, buf);
  367. + break;
  368. + }
  369. + }
  370. + }
  371. +
  372. +
  373. +#ifdef RW_DATA_BY_BYTE
  374. + return (int)(p - buf);
  375. +#else
  376. + return ((int)p - (int)buf);
  377. +#endif
  378. +
  379. +}
  380. +
  381. +static int nfc_select_chip(struct ra_nand_chip *ra, int chipnr)
  382. +{
  383. +#if (CONFIG_NUMCHIPS == 1)
  384. + if (!(chipnr < CONFIG_NUMCHIPS))
  385. + return -1;
  386. + return 0;
  387. +#else
  388. + BUG();
  389. +#endif
  390. +}
  391. +
  392. +/** @return -1: chip_select fail
  393. + * 0 : both CE and WP==0 are OK
  394. + * 1 : CE OK and WP==1
  395. + */
  396. +static int nfc_enable_chip(struct ra_nand_chip *ra, unsigned int offs, int read_only)
  397. +{
  398. + int chipnr = offs >> ra->chip_shift;
  399. +
  400. + ra_dbg("%s: offs:%x read_only:%x \n", __func__, offs, read_only);
  401. +
  402. + chipnr = nfc_select_chip(ra, chipnr);
  403. + if (chipnr < 0) {
  404. + printk("%s: chip select error, offs(%x)\n", __func__, offs);
  405. + return -1;
  406. + }
  407. +
  408. + if (!read_only)
  409. + return nfc_check_wp();
  410. +
  411. + return 0;
  412. +}
  413. +
  414. +/** wait nand chip becomeing ready and return queried status.
  415. + * @param snooze: sleep time in ms unit before polling device ready.
  416. + * @return status of nand chip
  417. + * @return NAN_STATUS_FAIL if something unexpected.
  418. + */
  419. +static int nfc_wait_ready(int snooze_ms)
  420. +{
  421. + int retry;
  422. + char status;
  423. +
  424. + // wait nfc idle,
  425. + if (snooze_ms == 0)
  426. + snooze_ms = 1;
  427. + else
  428. + schedule_timeout(snooze_ms * HZ / 1000);
  429. +
  430. + snooze_ms = retry = snooze_ms *1000000 / 100 ; // ndelay(100)
  431. +
  432. + while (!NFC_TRANS_DONE() && retry--) {
  433. + if (!cond_resched())
  434. + ndelay(100);
  435. + }
  436. +
  437. + if (!NFC_TRANS_DONE()) {
  438. + printk("nfc_wait_ready: no transaction done \n");
  439. + return NAND_STATUS_FAIL;
  440. + }
  441. +
  442. +#if !defined (CONFIG_NOT_SUPPORT_RB)
  443. + //fixme
  444. + while(!(status = nfc_device_ready()) && retry--) {
  445. + ndelay(100);
  446. + }
  447. +
  448. + if (status == 0) {
  449. + printk("nfc_wait_ready: no device ready. \n");
  450. + return NAND_STATUS_FAIL;
  451. + }
  452. +
  453. + _nfc_read_status(&status);
  454. + return status;
  455. +#else
  456. +
  457. + while(retry--) {
  458. + _nfc_read_status(&status);
  459. + if (status & NAND_STATUS_READY)
  460. + break;
  461. + ndelay(100);
  462. + }
  463. + if (retry<0)
  464. + printk("nfc_wait_ready 2: no device ready, status(%x). \n", status);
  465. +
  466. + return status;
  467. +#endif
  468. +}
  469. +
  470. +/**
  471. + * return 0: erase OK
  472. + * return -EIO: fail
  473. + */
  474. +int nfc_erase_block(struct ra_nand_chip *ra, int row_addr)
  475. +{
  476. + unsigned long cmd1, cmd2, bus_addr, conf;
  477. + char status;
  478. +
  479. + cmd1 = 0x60;
  480. + cmd2 = 0xd0;
  481. + bus_addr = row_addr;
  482. + conf = 0x00511 | ((CFG_ROW_ADDR_CYCLE)<<16);
  483. +
  484. + // set NFC
  485. + ra_dbg("%s: cmd1: %lx, cmd2:%lx bus_addr: %lx, conf: %lx \n",
  486. + __func__, cmd1, cmd2, bus_addr, conf);
  487. +
  488. + //fixme, should we check nfc status?
  489. + CLEAR_INT_STATUS();
  490. +
  491. + ra_outl(NFC_CMD1, cmd1);
  492. + ra_outl(NFC_CMD2, cmd2);
  493. + ra_outl(NFC_ADDR, bus_addr);
  494. + ra_outl(NFC_CONF, conf);
  495. +
  496. + status = nfc_wait_ready(3); //erase wait 3ms
  497. + if (status & NAND_STATUS_FAIL) {
  498. + printk("%s: fail \n", __func__);
  499. + return -EIO;
  500. + }
  501. +
  502. + return 0;
  503. +
  504. +}
  505. +
  506. +static inline int _nfc_read_raw_data(int cmd1, int cmd2, int bus_addr, int bus_addr2, int conf, char *buf, int len, int flags)
  507. +{
  508. + int ret;
  509. +
  510. + CLEAR_INT_STATUS();
  511. + ra_outl(NFC_CMD1, cmd1);
  512. + ra_outl(NFC_CMD2, cmd2);
  513. + ra_outl(NFC_ADDR, bus_addr);
  514. +#if defined (CONFIG_RALINK_RT6855) || defined (CONFIG_RALINK_RT6855A) || \
  515. + defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_MT7621)
  516. + ra_outl(NFC_ADDR2, bus_addr2);
  517. +#endif
  518. + ra_outl(NFC_CONF, conf);
  519. +
  520. + ret = _ra_nand_pull_data(buf, len, 0);
  521. + if (ret != len) {
  522. + ra_dbg("%s: ret:%x (%x) \n", __func__, ret, len);
  523. + return NAND_STATUS_FAIL;
  524. + }
  525. +
  526. + //FIXME, this section is not necessary
  527. + ret = nfc_wait_ready(0); //wait ready
  528. + /* to prevent the DATA FIFO 's old data from next operation */
  529. + ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) | 0x02); //clear data buffer
  530. + ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) & ~0x02); //clear data buffer
  531. +
  532. + if (ret & NAND_STATUS_FAIL) {
  533. + printk("%s: fail \n", __func__);
  534. + return NAND_STATUS_FAIL;
  535. + }
  536. +
  537. + return 0;
  538. +}
  539. +
  540. +static inline int _nfc_write_raw_data(int cmd1, int cmd3, int bus_addr, int bus_addr2, int conf, char *buf, int len, int flags)
  541. +{
  542. + int ret;
  543. +
  544. + CLEAR_INT_STATUS();
  545. + ra_outl(NFC_CMD1, cmd1);
  546. + ra_outl(NFC_CMD3, cmd3);
  547. + ra_outl(NFC_ADDR, bus_addr);
  548. +#if defined (CONFIG_RALINK_RT6855) || defined (CONFIG_RALINK_RT6855A) || \
  549. + defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_MT7621)
  550. + ra_outl(NFC_ADDR2, bus_addr2);
  551. +#endif
  552. + ra_outl(NFC_CONF, conf);
  553. +
  554. + ret = _ra_nand_push_data(buf, len, 0);
  555. + if (ret != len) {
  556. + ra_dbg("%s: ret:%x (%x) \n", __func__, ret, len);
  557. + return NAND_STATUS_FAIL;
  558. + }
  559. +
  560. + ret = nfc_wait_ready(1); //write wait 1ms
  561. + /* to prevent the DATA FIFO 's old data from next operation */
  562. + ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) | 0x02); //clear data buffer
  563. + ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) & ~0x02); //clear data buffer
  564. +
  565. + if (ret & NAND_STATUS_FAIL) {
  566. + printk("%s: fail \n", __func__);
  567. + return NAND_STATUS_FAIL;
  568. + }
  569. +
  570. + return 0;
  571. +}
  572. +
  573. +/**
  574. + * @return !0: fail
  575. + * @return 0: OK
  576. + */
  577. +int nfc_read_oob(struct ra_nand_chip *ra, int page, unsigned int offs, char *buf, int len, int flags)
  578. +{
  579. + unsigned int cmd1 = 0, cmd2 = 0, conf = 0;
  580. + unsigned int bus_addr = 0, bus_addr2 = 0;
  581. + unsigned int ecc_en;
  582. + int use_gdma;
  583. + int status;
  584. +
  585. + int pages_perblock = 1<<(ra->erase_shift - ra->page_shift);
  586. + // constrain of nfc read function
  587. +
  588. +#if defined (WORKAROUND_RX_BUF_OV)
  589. + BUG_ON (len > 60); //problem of rx-buffer overrun
  590. +#endif
  591. + BUG_ON (offs >> ra->oob_shift); //page boundry
  592. + BUG_ON ((unsigned int)(((offs + len) >> ra->oob_shift) + page) >
  593. + ((page + pages_perblock) & ~(pages_perblock-1))); //block boundry
  594. +
  595. + use_gdma = flags & FLAG_USE_GDMA;
  596. + ecc_en = flags & FLAG_ECC_EN;
  597. + bus_addr = (page << (CFG_COLUMN_ADDR_CYCLE*8)) | (offs & ((1<<CFG_COLUMN_ADDR_CYCLE*8) - 1));
  598. +
  599. + if (is_nand_page_2048) {
  600. + bus_addr += CFG_PAGESIZE;
  601. + bus_addr2 = page >> (CFG_COLUMN_ADDR_CYCLE*8);
  602. + cmd1 = 0x0;
  603. + cmd2 = 0x30;
  604. + conf = 0x000511| ((CFG_ADDR_CYCLE)<<16) | (len << 20);
  605. + }
  606. + else {
  607. + cmd1 = 0x50;
  608. + conf = 0x000141| ((CFG_ADDR_CYCLE)<<16) | (len << 20);
  609. + }
  610. + if (ecc_en)
  611. + conf |= (1<<3);
  612. + if (use_gdma)
  613. + conf |= (1<<2);
  614. +
  615. + ra_dbg("%s: cmd1:%x, bus_addr:%x, conf:%x, len:%x, flag:%x\n",
  616. + __func__, cmd1, bus_addr, conf, len, flags);
  617. +
  618. + status = _nfc_read_raw_data(cmd1, cmd2, bus_addr, bus_addr2, conf, buf, len, flags);
  619. + if (status & NAND_STATUS_FAIL) {
  620. + printk("%s: fail\n", __func__);
  621. + return -EIO;
  622. + }
  623. +
  624. + return 0;
  625. +}
  626. +
  627. +/**
  628. + * @return !0: fail
  629. + * @return 0: OK
  630. + */
  631. +int nfc_write_oob(struct ra_nand_chip *ra, int page, unsigned int offs, char *buf, int len, int flags)
  632. +{
  633. + unsigned int cmd1 = 0, cmd3=0, conf = 0;
  634. + unsigned int bus_addr = 0, bus_addr2 = 0;
  635. + int use_gdma;
  636. + int status;
  637. +
  638. + int pages_perblock = 1<<(ra->erase_shift - ra->page_shift);
  639. + // constrain of nfc read function
  640. +
  641. + BUG_ON (offs >> ra->oob_shift); //page boundry
  642. + BUG_ON ((unsigned int)(((offs + len) >> ra->oob_shift) + page) >
  643. + ((page + pages_perblock) & ~(pages_perblock-1))); //block boundry
  644. +
  645. + use_gdma = flags & FLAG_USE_GDMA;
  646. + bus_addr = (page << (CFG_COLUMN_ADDR_CYCLE*8)) | (offs & ((1<<CFG_COLUMN_ADDR_CYCLE*8) - 1));
  647. +
  648. + if (is_nand_page_2048) {
  649. + cmd1 = 0x80;
  650. + cmd3 = 0x10;
  651. + bus_addr += CFG_PAGESIZE;
  652. + bus_addr2 = page >> (CFG_COLUMN_ADDR_CYCLE*8);
  653. + conf = 0x001123 | ((CFG_ADDR_CYCLE)<<16) | ((len) << 20);
  654. + }
  655. + else {
  656. + cmd1 = 0x08050;
  657. + cmd3 = 0x10;
  658. + conf = 0x001223 | ((CFG_ADDR_CYCLE)<<16) | ((len) << 20);
  659. + }
  660. + if (use_gdma)
  661. + conf |= (1<<2);
  662. +
  663. + // set NFC
  664. + ra_dbg("%s: cmd1: %x, cmd3: %x bus_addr: %x, conf: %x, len:%x\n",
  665. + __func__, cmd1, cmd3, bus_addr, conf, len);
  666. +
  667. + status = _nfc_write_raw_data(cmd1, cmd3, bus_addr, bus_addr2, conf, buf, len, flags);
  668. + if (status & NAND_STATUS_FAIL) {
  669. + printk("%s: fail \n", __func__);
  670. + return -EIO;
  671. + }
  672. +
  673. + return 0;
  674. +}
  675. +
  676. +
  677. +int nfc_read_page(struct ra_nand_chip *ra, char *buf, int page, int flags);
  678. +int nfc_write_page(struct ra_nand_chip *ra, char *buf, int page, int flags);
  679. +
  680. +
  681. +#if !defined (WORKAROUND_RX_BUF_OV)
  682. +static int one_bit_correction(char *ecc, char *expected, int *bytes, int *bits);
  683. +int nfc_ecc_verify(struct ra_nand_chip *ra, char *buf, int page, int mode)
  684. +{
  685. + int ret, i;
  686. + char *p, *e;
  687. + int ecc;
  688. +
  689. + //ra_dbg("%s, page:%x mode:%d\n", __func__, page, mode);
  690. +
  691. + if (mode == FL_WRITING) {
  692. + int len = CFG_PAGESIZE + CFG_PAGE_OOBSIZE;
  693. + int conf = 0x000141| ((CFG_ADDR_CYCLE)<<16) | (len << 20);
  694. + conf |= (1<<3); //(ecc_en)
  695. + //conf |= (1<<2); // (use_gdma)
  696. +
  697. + p = ra->readback_buffers;
  698. + ret = nfc_read_page(ra, ra->readback_buffers, page, FLAG_ECC_EN);
  699. + if (ret == 0)
  700. + goto ecc_check;
  701. +
  702. + //FIXME, double comfirm
  703. + printk("%s: read back fail, try again \n",__func__);
  704. + ret = nfc_read_page(ra, ra->readback_buffers, page, FLAG_ECC_EN);
  705. + if (ret != 0) {
  706. + printk("\t%s: read back fail agian \n",__func__);
  707. + goto bad_block;
  708. + }
  709. + }
  710. + else if (mode == FL_READING) {
  711. + p = buf;
  712. + }
  713. + else
  714. + return -2;
  715. +
  716. +ecc_check:
  717. + p += CFG_PAGESIZE;
  718. + if (!is_nand_page_2048) {
  719. + ecc = ra_inl(NFC_ECC);
  720. + if (ecc == 0) //clean page.
  721. + return 0;
  722. + e = (char*)&ecc;
  723. + for (i=0; i<CONFIG_ECC_BYTES; i++) {
  724. + int eccpos = CONFIG_ECC_OFFSET + i;
  725. + if (*(p + eccpos) != (char)0xff)
  726. + break;
  727. + if (i == CONFIG_ECC_BYTES - 1) {
  728. + printk("skip ecc 0xff at page %x\n", page);
  729. + return 0;
  730. + }
  731. + }
  732. + for (i=0; i<CONFIG_ECC_BYTES; i++) {
  733. + int eccpos = CONFIG_ECC_OFFSET + i;
  734. + if (*(p + eccpos) != *(e + i)) {
  735. + printk("%s mode:%s, invalid ecc, page: %x read:%x %x %x, ecc:%x \n",
  736. + __func__, (mode == FL_READING)?"read":"write", page,
  737. + *(p+ CONFIG_ECC_OFFSET), *(p+ CONFIG_ECC_OFFSET+1), *(p+ CONFIG_ECC_OFFSET +2), ecc);
  738. + return -1;
  739. + }
  740. + }
  741. + }
  742. +#if defined (CONFIG_RALINK_RT6855) || defined (CONFIG_RALINK_RT6855A) || \
  743. + defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_MT7621)
  744. + else {
  745. + int ecc2, ecc3, ecc4, qsz;
  746. + char *e2, *e3, *e4;
  747. + int correction_flag = 0;
  748. + ecc = ra_inl(NFC_ECC_P1);
  749. + ecc2 = ra_inl(NFC_ECC_P2);
  750. + ecc3 = ra_inl(NFC_ECC_P3);
  751. + ecc4 = ra_inl(NFC_ECC_P4);
  752. + e = (char*)&ecc;
  753. + e2 = (char*)&ecc2;
  754. + e3 = (char*)&ecc3;
  755. + e4 = (char*)&ecc4;
  756. + qsz = CFG_PAGE_OOBSIZE / 4;
  757. + if (ecc == 0 && ecc2 == 0 && ecc3 == 0 && ecc4 == 0)
  758. + return 0;
  759. + for (i=0; i<CONFIG_ECC_BYTES; i++) {
  760. + int eccpos = CONFIG_ECC_OFFSET + i;
  761. + if (*(p + eccpos) != (char)0xff)
  762. + break;
  763. + else if (*(p + eccpos + qsz) != (char)0xff)
  764. + break;
  765. + else if (*(p + eccpos + qsz*2) != (char)0xff)
  766. + break;
  767. + else if (*(p + eccpos + qsz*3) != (char)0xff)
  768. + break;
  769. + if (i == CONFIG_ECC_BYTES - 1) {
  770. + printk("skip ecc 0xff at page %x\n", page);
  771. + return 0;
  772. + }
  773. + }
  774. + for (i=0; i<CONFIG_ECC_BYTES; i++) {
  775. + int eccpos = CONFIG_ECC_OFFSET + i;
  776. + if (*(p + eccpos) != *(e + i)) {
  777. + printk("%s mode:%s, invalid ecc, page: %x read:%x %x %x, ecc:%x \n",
  778. + __func__, (mode == FL_READING)?"read":"write", page,
  779. + *(p+ CONFIG_ECC_OFFSET), *(p+ CONFIG_ECC_OFFSET+1), *(p+ CONFIG_ECC_OFFSET +2), ecc);
  780. + correction_flag |= 0x1;
  781. + }
  782. + if (*(p + eccpos + qsz) != *(e2 + i)) {
  783. + printk("%s mode:%s, invalid ecc2, page: %x read:%x %x %x, ecc2:%x \n",
  784. + __func__, (mode == FL_READING)?"read":"write", page,
  785. + *(p+CONFIG_ECC_OFFSET+qsz), *(p+ CONFIG_ECC_OFFSET+1+qsz), *(p+ CONFIG_ECC_OFFSET+2+qsz), ecc2);
  786. + correction_flag |= 0x2;
  787. + }
  788. + if (*(p + eccpos + qsz*2) != *(e3 + i)) {
  789. + printk("%s mode:%s, invalid ecc3, page: %x read:%x %x %x, ecc3:%x \n",
  790. + __func__, (mode == FL_READING)?"read":"write", page,
  791. + *(p+CONFIG_ECC_OFFSET+qsz*2), *(p+ CONFIG_ECC_OFFSET+1+qsz*2), *(p+ CONFIG_ECC_OFFSET+2+qsz*2), ecc3);
  792. + correction_flag |= 0x4;
  793. + }
  794. + if (*(p + eccpos + qsz*3) != *(e4 + i)) {
  795. + printk("%s mode:%s, invalid ecc4, page: %x read:%x %x %x, ecc4:%x \n",
  796. + __func__, (mode == FL_READING)?"read":"write", page,
  797. + *(p+CONFIG_ECC_OFFSET+qsz*3), *(p+ CONFIG_ECC_OFFSET+1+qsz*3), *(p+ CONFIG_ECC_OFFSET+2+qsz*3), ecc4);
  798. + correction_flag |= 0x8;
  799. + }
  800. + }
  801. +
  802. + if (correction_flag)
  803. + {
  804. + printk("trying to do correction!\n");
  805. + if (correction_flag & 0x1)
  806. + {
  807. + int bytes, bits;
  808. + char *pBuf = p - CFG_PAGESIZE;
  809. +
  810. + if (one_bit_correction(p + CONFIG_ECC_OFFSET, e, &bytes, &bits) == 0)
  811. + {
  812. + pBuf[bytes] = pBuf[bytes] ^ (1 << bits);
  813. + printk("1. correct byte %d, bit %d!\n", bytes, bits);
  814. + }
  815. + else
  816. + {
  817. + printk("failed to correct!\n");
  818. + return -1;
  819. + }
  820. + }
  821. +
  822. + if (correction_flag & 0x2)
  823. + {
  824. + int bytes, bits;
  825. + char *pBuf = (p - CFG_PAGESIZE) + CFG_PAGESIZE/4;
  826. +
  827. + if (one_bit_correction((p + CONFIG_ECC_OFFSET + qsz), e2, &bytes, &bits) == 0)
  828. + {
  829. + pBuf[bytes] = pBuf[bytes] ^ (1 << bits);
  830. + printk("2. correct byte %d, bit %d!\n", bytes, bits);
  831. + }
  832. + else
  833. + {
  834. + printk("failed to correct!\n");
  835. + return -1;
  836. + }
  837. + }
  838. + if (correction_flag & 0x4)
  839. + {
  840. + int bytes, bits;
  841. + char *pBuf = (p - CFG_PAGESIZE) + CFG_PAGESIZE/2;
  842. +
  843. + if (one_bit_correction((p + CONFIG_ECC_OFFSET + qsz * 2), e3, &bytes, &bits) == 0)
  844. + {
  845. + pBuf[bytes] = pBuf[bytes] ^ (1 << bits);
  846. + printk("3. correct byte %d, bit %d!\n", bytes, bits);
  847. + }
  848. + else
  849. + {
  850. + printk("failed to correct!\n");
  851. + return -1;
  852. + }
  853. + }
  854. + if (correction_flag & 0x8)
  855. + {
  856. + int bytes, bits;
  857. + char *pBuf = (p - CFG_PAGESIZE) + CFG_PAGESIZE*3/4;
  858. +
  859. + if (one_bit_correction((p + CONFIG_ECC_OFFSET + qsz * 3), e4, &bytes, &bits) == 0)
  860. + {
  861. + pBuf[bytes] = pBuf[bytes] ^ (1 << bits);
  862. + printk("4. correct byte %d, bit %d!\n", bytes, bits);
  863. + }
  864. + else
  865. + {
  866. + printk("failed to correct!\n");
  867. + return -1;
  868. + }
  869. + }
  870. + }
  871. +
  872. + }
  873. +#endif
  874. + return 0;
  875. +
  876. +bad_block:
  877. + return -1;
  878. +}
  879. +
  880. +#else
  881. +
  882. +void ranfc_dump(void)
  883. +{
  884. + int i;
  885. + for (i=0; i<11; i++) {
  886. + if (i==6)
  887. + continue;
  888. + printk("%x: %x \n", NFC_BASE + i*4, ra_inl(NFC_BASE + i*4));
  889. + }
  890. +}
  891. +
  892. +/**
  893. + * @return 0, ecc OK or corrected.
  894. + * @return NAND_STATUS_FAIL, ecc fail.
  895. + */
  896. +
  897. +int nfc_ecc_verify(struct ra_nand_chip *ra, char *buf, int page, int mode)
  898. +{
  899. + int ret, i;
  900. + char *p, *e;
  901. + int ecc;
  902. +
  903. + if (ranfc_verify == 0)
  904. + return 0;
  905. +
  906. + ra_dbg("%s, page:%x mode:%d\n", __func__, page, mode);
  907. +
  908. + if (mode == FL_WRITING) { // read back and memcmp
  909. + ret = nfc_read_page(ra, ra->readback_buffers, page, FLAG_NONE);
  910. + if (ret != 0) //double comfirm
  911. + ret = nfc_read_page(ra, ra->readback_buffers, page, FLAG_NONE);
  912. +
  913. + if (ret != 0) {
  914. + printk("%s: mode:%x read back fail \n", __func__, mode);
  915. + return -1;
  916. + }
  917. + return memcmp(buf, ra->readback_buffers, 1<<ra->page_shift);
  918. + }
  919. +
  920. + if (mode == FL_READING) {
  921. +#if 0
  922. + if (ra->sandbox_page == 0)
  923. + return 0;
  924. +
  925. + ret = nfc_write_page(ra, buf, ra->sandbox_page, FLAG_USE_GDMA | FLAG_ECC_EN);
  926. + if (ret != 0) {
  927. + printk("%s, fail write sandbox_page \n", __func__);
  928. + return -1;
  929. + }
  930. +#else
  931. + /** @note:
  932. + * The following command is actually not 'write' command to drive NFC to write flash.
  933. + * However, it can make NFC to calculate ECC, that will be used to compare with original ones.
  934. + * --YT
  935. + */
  936. + unsigned int conf = 0x001223| (CFG_ADDR_CYCLE<<16) | (0x200 << 20) | (1<<3) | (1<<2);
  937. + _nfc_write_raw_data(0xff, 0xff, ra->sandbox_page<<ra->page_shift, conf, buf, 0x200, FLAG_USE_GDMA);
  938. +#endif
  939. +
  940. + ecc = ra_inl(NFC_ECC);
  941. + if (ecc == 0) //clean page.
  942. + return 0;
  943. + e = (char*)&ecc;
  944. + p = buf + (1<<ra->page_shift);
  945. + for (i=0; i<CONFIG_ECC_BYTES; i++) {
  946. + int eccpos = CONFIG_ECC_OFFSET + i;
  947. + if (*(p + eccpos) != *(e + i)) {
  948. + printk("%s mode:%s, invalid ecc, page: %x read:%x %x %x, write:%x \n",
  949. + __func__, (mode == FL_READING)?"read":"write", page,
  950. + *(p+ CONFIG_ECC_OFFSET), *(p+ CONFIG_ECC_OFFSET+1), *(p+ CONFIG_ECC_OFFSET +2), ecc);
  951. +
  952. + for (i=0; i<528; i++)
  953. + printk("%-2x \n", *(buf + i));
  954. + return -1;
  955. + }
  956. + }
  957. + return 0;
  958. + }
  959. +
  960. + return -1;
  961. +
  962. +}
  963. +
  964. +#endif
  965. +
  966. +
  967. +/**
  968. + * @return -EIO, writing size is less than a page
  969. + * @return 0, OK
  970. + */
  971. +int nfc_read_page(struct ra_nand_chip *ra, char *buf, int page, int flags)
  972. +{
  973. + unsigned int cmd1 = 0, cmd2 = 0, conf = 0;
  974. + unsigned int bus_addr = 0, bus_addr2 = 0;
  975. + unsigned int ecc_en;
  976. + int use_gdma;
  977. + int size, offs;
  978. + int status = 0;
  979. +
  980. + use_gdma = flags & FLAG_USE_GDMA;
  981. + ecc_en = flags & FLAG_ECC_EN;
  982. +
  983. + page = page & (CFG_CHIPSIZE - 1); // chip boundary
  984. + size = CFG_PAGESIZE + CFG_PAGE_OOBSIZE; //add oobsize
  985. + offs = 0;
  986. +
  987. + while (size > 0) {
  988. + int len;
  989. +#if defined (WORKAROUND_RX_BUF_OV)
  990. + len = min(60, size);
  991. +#else
  992. + len = size;
  993. +#endif
  994. + bus_addr = (page << (CFG_COLUMN_ADDR_CYCLE*8)) | (offs & ((1<<CFG_COLUMN_ADDR_CYCLE*8)-1));
  995. + if (is_nand_page_2048) {
  996. + bus_addr2 = page >> (CFG_COLUMN_ADDR_CYCLE*8);
  997. + cmd1 = 0x0;
  998. + cmd2 = 0x30;
  999. + conf = 0x000511| ((CFG_ADDR_CYCLE)<<16) | (len << 20);
  1000. + }
  1001. + else {
  1002. + if (offs & ~(CFG_PAGESIZE-1))
  1003. + cmd1 = 0x50;
  1004. + else if (offs & ~((1<<CFG_COLUMN_ADDR_CYCLE*8)-1))
  1005. + cmd1 = 0x01;
  1006. + else
  1007. + cmd1 = 0;
  1008. +
  1009. + conf = 0x000141| ((CFG_ADDR_CYCLE)<<16) | (len << 20);
  1010. + }
  1011. +#if !defined (WORKAROUND_RX_BUF_OV)
  1012. + if (ecc_en)
  1013. + conf |= (1<<3);
  1014. +#endif
  1015. + if (use_gdma)
  1016. + conf |= (1<<2);
  1017. +
  1018. + status = _nfc_read_raw_data(cmd1, cmd2, bus_addr, bus_addr2, conf, buf+offs, len, flags);
  1019. + if (status & NAND_STATUS_FAIL) {
  1020. + printk("%s: fail \n", __func__);
  1021. + return -EIO;
  1022. + }
  1023. +
  1024. + offs += len;
  1025. + size -= len;
  1026. + }
  1027. +
  1028. + // verify and correct ecc
  1029. + if ((flags & (FLAG_VERIFY | FLAG_ECC_EN)) == (FLAG_VERIFY | FLAG_ECC_EN)) {
  1030. + status = nfc_ecc_verify(ra, buf, page, FL_READING);
  1031. + if (status != 0) {
  1032. + printk("%s: fail, buf:%x, page:%x, flag:%x\n",
  1033. + __func__, (unsigned int)buf, page, flags);
  1034. + return -EBADMSG;
  1035. + }
  1036. + }
  1037. + else {
  1038. + // fix,e not yet support
  1039. + ra->buffers_page = -1; //cached
  1040. + }
  1041. +
  1042. + return 0;
  1043. +}
  1044. +
  1045. +
  1046. +/**
  1047. + * @return -EIO, fail to write
  1048. + * @return 0, OK
  1049. + */
  1050. +int nfc_write_page(struct ra_nand_chip *ra, char *buf, int page, int flags)
  1051. +{
  1052. + unsigned int cmd1 = 0, cmd3, conf = 0;
  1053. + unsigned int bus_addr = 0, bus_addr2 = 0;
  1054. + unsigned int ecc_en;
  1055. + int use_gdma;
  1056. + int size;
  1057. + char status;
  1058. + uint8_t *oob = buf + (1<<ra->page_shift);
  1059. +
  1060. + use_gdma = flags & FLAG_USE_GDMA;
  1061. + ecc_en = flags & FLAG_ECC_EN;
  1062. +
  1063. + oob[ra->badblockpos] = 0xff; //tag as good block.
  1064. + ra->buffers_page = -1; //cached
  1065. +
  1066. + page = page & (CFG_CHIPSIZE-1); //chip boundary
  1067. + size = CFG_PAGESIZE + CFG_PAGE_OOBSIZE; //add oobsize
  1068. + bus_addr = (page << (CFG_COLUMN_ADDR_CYCLE*8)); //write_page always write from offset 0.
  1069. +
  1070. + if (is_nand_page_2048) {
  1071. + bus_addr2 = page >> (CFG_COLUMN_ADDR_CYCLE*8);
  1072. + cmd1 = 0x80;
  1073. + cmd3 = 0x10;
  1074. + conf = 0x001123| ((CFG_ADDR_CYCLE)<<16) | (size << 20);
  1075. + }
  1076. + else {
  1077. + cmd1 = 0x8000;
  1078. + cmd3 = 0x10;
  1079. + conf = 0x001223| ((CFG_ADDR_CYCLE)<<16) | (size << 20);
  1080. +}
  1081. + if (ecc_en)
  1082. + conf |= (1<<3); //enable ecc
  1083. + if (use_gdma)
  1084. + conf |= (1<<2);
  1085. +
  1086. + // set NFC
  1087. + ra_dbg("nfc_write_page: cmd1: %x, cmd3: %x bus_addr: %x, conf: %x, len:%x\n",
  1088. + cmd1, cmd3, bus_addr, conf, size);
  1089. +
  1090. + status = _nfc_write_raw_data(cmd1, cmd3, bus_addr, bus_addr2, conf, buf, size, flags);
  1091. + if (status & NAND_STATUS_FAIL) {
  1092. + printk("%s: fail \n", __func__);
  1093. + return -EIO;
  1094. + }
  1095. +
  1096. +
  1097. + if (flags & FLAG_VERIFY) { // verify and correct ecc
  1098. + status = nfc_ecc_verify(ra, buf, page, FL_WRITING);
  1099. +
  1100. +#ifdef RANDOM_GEN_BAD_BLOCK
  1101. + if (((random32() & 0x1ff) == 0x0) && (page >= 0x100)) // randomly create bad block
  1102. + {
  1103. + printk("hmm... create a bad block at page %x\n", (bus_addr >> 16));
  1104. + status = -1;
  1105. + }
  1106. +#endif
  1107. +
  1108. + if (status != 0) {
  1109. + printk("%s: ecc_verify fail: ret:%x \n", __func__, status);
  1110. + oob[ra->badblockpos] = 0x33;
  1111. + page -= page % (CFG_BLOCKSIZE/CFG_PAGESIZE);
  1112. + printk("create a bad block at page %x\n", page);
  1113. + if (!is_nand_page_2048)
  1114. + status = nfc_write_oob(ra, page, ra->badblockpos, oob+ra->badblockpos, 1, flags);
  1115. + else
  1116. + {
  1117. + status = _nfc_write_raw_data(cmd1, cmd3, bus_addr, bus_addr2, conf, buf, size, flags);
  1118. + nfc_write_oob(ra, page, 0, oob, 16, FLAG_NONE);
  1119. + }
  1120. + return -EBADMSG;
  1121. + }
  1122. + }
  1123. +
  1124. +
  1125. + ra->buffers_page = page; //cached
  1126. + return 0;
  1127. +}
  1128. +
  1129. +
  1130. +
  1131. +/*************************************************************
  1132. + * nand internal process
  1133. + *************************************************************/
  1134. +
  1135. +/**
  1136. + * nand_release_device - [GENERIC] release chip
  1137. + * @mtd: MTD device structure
  1138. + *
  1139. + * Deselect, release chip lock and wake up anyone waiting on the device
  1140. + */
  1141. +static void nand_release_device(struct ra_nand_chip *ra)
  1142. +{
  1143. + /* De-select the NAND device */
  1144. + nfc_select_chip(ra, -1);
  1145. +
  1146. + /* Release the controller and the chip */
  1147. + ra->state = FL_READY;
  1148. +
  1149. + mutex_unlock(ra->controller);
  1150. +}
  1151. +
  1152. +/**
  1153. + * nand_get_device - [GENERIC] Get chip for selected access
  1154. + * @chip: the nand chip descriptor
  1155. + * @mtd: MTD device structure
  1156. + * @new_state: the state which is requested
  1157. + *
  1158. + * Get the device and lock it for exclusive access
  1159. + */
  1160. +static int
  1161. +nand_get_device(struct ra_nand_chip *ra, int new_state)
  1162. +{
  1163. + int ret = 0;
  1164. +
  1165. + ret = mutex_lock_interruptible(ra->controller);
  1166. + if (!ret)
  1167. + ra->state = new_state;
  1168. +
  1169. + return ret;
  1170. +
  1171. +}
  1172. +
  1173. +
  1174. +
  1175. +/*************************************************************
  1176. + * nand internal process
  1177. + *************************************************************/
  1178. +
  1179. +int nand_bbt_get(struct ra_nand_chip *ra, int block)
  1180. +{
  1181. + int byte, bits;
  1182. + bits = block * BBTTAG_BITS;
  1183. +
  1184. + byte = bits / 8;
  1185. + bits = bits % 8;
  1186. +
  1187. + return (ra->bbt[byte] >> bits) & BBTTAG_BITS_MASK;
  1188. +}
  1189. +
  1190. +int nand_bbt_set(struct ra_nand_chip *ra, int block, int tag)
  1191. +{
  1192. + int byte, bits;
  1193. + bits = block * BBTTAG_BITS;
  1194. +
  1195. + byte = bits / 8;
  1196. + bits = bits % 8;
  1197. +
  1198. + // If previous tag is bad, dont overwrite it
  1199. + if (((ra->bbt[byte] >> bits) & BBTTAG_BITS_MASK) == BBT_TAG_BAD)
  1200. + {
  1201. + return BBT_TAG_BAD;
  1202. + }
  1203. +
  1204. + ra->bbt[byte] = (ra->bbt[byte] & ~(BBTTAG_BITS_MASK << bits)) | ((tag & BBTTAG_BITS_MASK) << bits);
  1205. +
  1206. + return tag;
  1207. +}
  1208. +
  1209. +/**
  1210. + * nand_block_checkbad - [GENERIC] Check if a block is marked bad
  1211. + * @mtd: MTD device structure
  1212. + * @ofs: offset from device start
  1213. + *
  1214. + * Check, if the block is bad. Either by reading the bad block table or
  1215. + * calling of the scan function.
  1216. + */
  1217. +int nand_block_checkbad(struct ra_nand_chip *ra, loff_t offs)
  1218. +{
  1219. + int page, block;
  1220. + int ret = 4;
  1221. + unsigned int tag;
  1222. + char *str[]= {"UNK", "RES", "BAD", "GOOD"};
  1223. +
  1224. + if (ranfc_bbt == 0)
  1225. + return 0;
  1226. +
  1227. + {
  1228. + // align with chip
  1229. +
  1230. + offs = offs & ((1<<ra->chip_shift) -1);
  1231. +
  1232. + page = offs >> ra->page_shift;
  1233. + block = offs >> ra->erase_shift;
  1234. + }
  1235. +
  1236. + tag = nand_bbt_get(ra, block);
  1237. +
  1238. + if (tag == BBT_TAG_UNKNOWN) {
  1239. + ret = nfc_read_oob(ra, page, ra->badblockpos, (char*)&tag, 1, FLAG_NONE);
  1240. + if (ret == 0)
  1241. + tag = ((le32_to_cpu(tag) & 0x0ff) == 0x0ff) ? BBT_TAG_GOOD : BBT_TAG_BAD;
  1242. + else
  1243. + tag = BBT_TAG_BAD;
  1244. +
  1245. + nand_bbt_set(ra, block, tag);
  1246. + }
  1247. +
  1248. + if (tag != BBT_TAG_GOOD) {
  1249. + printk("%s: offs:%x tag: %s \n", __func__, (unsigned int)offs, str[tag]);
  1250. + return 1;
  1251. + }
  1252. + else
  1253. + return 0;
  1254. +
  1255. +}
  1256. +
  1257. +
  1258. +
  1259. +/**
  1260. + * nand_block_markbad -
  1261. + */
  1262. +int nand_block_markbad(struct ra_nand_chip *ra, loff_t offs)
  1263. +{
  1264. + int page, block;
  1265. + int ret = 4;
  1266. + unsigned int tag;
  1267. + char *ecc;
  1268. +
  1269. + // align with chip
  1270. + ra_dbg("%s offs: %x \n", __func__, (int)offs);
  1271. +
  1272. + offs = offs & ((1<<ra->chip_shift) -1);
  1273. +
  1274. + page = offs >> ra->page_shift;
  1275. + block = offs >> ra->erase_shift;
  1276. +
  1277. + tag = nand_bbt_get(ra, block);
  1278. +
  1279. + if (tag == BBT_TAG_BAD) {
  1280. + printk("%s: mark repeatedly \n", __func__);
  1281. + return 0;
  1282. + }
  1283. +
  1284. + // new tag as bad
  1285. + tag =BBT_TAG_BAD;
  1286. + ret = nfc_read_page(ra, ra->buffers, page, FLAG_NONE);
  1287. + if (ret != 0) {
  1288. + printk("%s: fail to read bad block tag \n", __func__);
  1289. + goto tag_bbt;
  1290. + }
  1291. +
  1292. + ecc = &ra->buffers[(1<<ra->page_shift)+ra->badblockpos];
  1293. + if (*ecc == (char)0x0ff) {
  1294. + //tag into flash
  1295. + *ecc = (char)tag;
  1296. + ret = nfc_write_page(ra, ra->buffers, page, FLAG_USE_GDMA);
  1297. + if (ret)
  1298. + printk("%s: fail to write bad block tag \n", __func__);
  1299. +
  1300. + }
  1301. +
  1302. +tag_bbt:
  1303. + //update bbt
  1304. + nand_bbt_set(ra, block, tag);
  1305. +
  1306. + return 0;
  1307. +}
  1308. +
  1309. +
  1310. +#if defined (WORKAROUND_RX_BUF_OV)
  1311. +/**
  1312. + * to find a bad block for ecc verify of read_page
  1313. + */
  1314. +unsigned int nand_bbt_find_sandbox(struct ra_nand_chip *ra)
  1315. +{
  1316. + loff_t offs = 0;
  1317. + int chipsize = 1 << ra->chip_shift;
  1318. + int blocksize = 1 << ra->erase_shift;
  1319. +
  1320. +
  1321. + while (offs < chipsize) {
  1322. + if (nand_block_checkbad(ra, offs)) //scan and verify the unknown tag
  1323. + break;
  1324. + offs += blocksize;
  1325. + }
  1326. +
  1327. + if (offs >= chipsize) {
  1328. + offs = chipsize - blocksize;
  1329. + }
  1330. +
  1331. + nand_bbt_set(ra, (unsigned int)offs>>ra->erase_shift, BBT_TAG_RES); // tag bbt only, instead of update badblockpos of flash.
  1332. + return (offs >> ra->page_shift);
  1333. +}
  1334. +#endif
  1335. +
  1336. +
  1337. +
  1338. +/**
  1339. + * nand_erase_nand - [Internal] erase block(s)
  1340. + * @mtd: MTD device structure
  1341. + * @instr: erase instruction
  1342. + * @allowbbt: allow erasing the bbt area
  1343. + *
  1344. + * Erase one ore more blocks
  1345. + */
  1346. +int _nand_erase_nand(struct ra_nand_chip *ra, struct erase_info *instr)
  1347. +{
  1348. + int page, len, status, ret;
  1349. + unsigned int addr, blocksize = 1<<ra->erase_shift;
  1350. +
  1351. + ra_dbg("%s: start:%x, len:%x \n", __func__,
  1352. + (unsigned int)instr->addr, (unsigned int)instr->len);
  1353. +
  1354. +//#define BLOCK_ALIGNED(a) ((a) & (blocksize - 1)) // already defined
  1355. +
  1356. + if (BLOCK_ALIGNED(instr->addr) || BLOCK_ALIGNED(instr->len)) {
  1357. + ra_dbg("%s: erase block not aligned, addr:%x len:%x\n", __func__, instr->addr, instr->len);
  1358. + return -EINVAL;
  1359. + }
  1360. +
  1361. + instr->fail_addr = 0xffffffff;
  1362. +
  1363. + len = instr->len;
  1364. + addr = instr->addr;
  1365. + instr->state = MTD_ERASING;
  1366. +
  1367. + while (len) {
  1368. +
  1369. + page = (int)(addr >> ra->page_shift);
  1370. +
  1371. + /* select device and check wp */
  1372. + if (nfc_enable_chip(ra, addr, 0)) {
  1373. + printk("%s: nand is write protected \n", __func__);
  1374. + instr->state = MTD_ERASE_FAILED;
  1375. + goto erase_exit;
  1376. + }
  1377. +
  1378. + /* if we have a bad block, we do not erase bad blocks */
  1379. + if (nand_block_checkbad(ra, addr)) {
  1380. + printk(KERN_WARNING "nand_erase: attempt to erase a "
  1381. + "bad block at 0x%08x\n", addr);
  1382. + instr->state = MTD_ERASE_FAILED;
  1383. + goto erase_exit;
  1384. + }
  1385. +
  1386. + /*
  1387. + * Invalidate the page cache, if we erase the block which
  1388. + * contains the current cached page
  1389. + */
  1390. + if (BLOCK_ALIGNED(addr) == BLOCK_ALIGNED(ra->buffers_page << ra->page_shift))
  1391. + ra->buffers_page = -1;
  1392. +
  1393. + status = nfc_erase_block(ra, page);
  1394. + /* See if block erase succeeded */
  1395. + if (status) {
  1396. + printk("%s: failed erase, page 0x%08x\n", __func__, page);
  1397. + instr->state = MTD_ERASE_FAILED;
  1398. + instr->fail_addr = (page << ra->page_shift);
  1399. + goto erase_exit;
  1400. + }
  1401. +
  1402. +
  1403. + /* Increment page address and decrement length */
  1404. + len -= blocksize;
  1405. + addr += blocksize;
  1406. +
  1407. + }
  1408. + instr->state = MTD_ERASE_DONE;
  1409. +
  1410. +erase_exit:
  1411. +
  1412. + ret = ((instr->state == MTD_ERASE_DONE) ? 0 : -EIO);
  1413. + /* Do call back function */
  1414. + if (!ret)
  1415. + mtd_erase_callback(instr);
  1416. +
  1417. + if (ret) {
  1418. + nand_bbt_set(ra, addr >> ra->erase_shift, BBT_TAG_BAD);
  1419. + }
  1420. +
  1421. + /* Return more or less happy */
  1422. + return ret;
  1423. +}
  1424. +
  1425. +static int
  1426. +nand_write_oob_buf(struct ra_nand_chip *ra, uint8_t *buf, uint8_t *oob, size_t size,
  1427. + int mode, int ooboffs)
  1428. +{
  1429. + size_t oobsize = 1<<ra->oob_shift;
  1430. + struct nand_oobfree *free;
  1431. + uint32_t woffs = ooboffs;
  1432. + int retsize = 0;
  1433. +
  1434. + ra_dbg("%s: size:%x, mode:%x, offs:%x \n", __func__, size, mode, ooboffs);
  1435. +
  1436. + switch(mode) {
  1437. + case MTD_OPS_PLACE_OOB:
  1438. + case MTD_OPS_RAW:
  1439. + if (ooboffs > oobsize)
  1440. + return -1;
  1441. +
  1442. + size = min(size, oobsize - ooboffs);
  1443. + memcpy(buf + ooboffs, oob, size);
  1444. + retsize = size;
  1445. + break;
  1446. +
  1447. + case MTD_OPS_AUTO_OOB:
  1448. + if (ooboffs > ra->oob->oobavail)
  1449. + return -1;
  1450. +
  1451. + while (size) {
  1452. + for(free = ra->oob->oobfree; free->length && size; free++) {
  1453. + int wlen = free->length - woffs;
  1454. + int bytes = 0;
  1455. +
  1456. + /* Write request not from offset 0 ? */
  1457. + if (wlen <= 0) {
  1458. + woffs = -wlen;
  1459. + continue;
  1460. + }
  1461. +
  1462. + bytes = min_t(size_t, size, wlen);
  1463. + memcpy (buf + free->offset + woffs, oob, bytes);
  1464. + woffs = 0;
  1465. + oob += bytes;
  1466. + size -= bytes;
  1467. + retsize += bytes;
  1468. + }
  1469. + buf += oobsize;
  1470. + }
  1471. + break;
  1472. +
  1473. + default:
  1474. + BUG();
  1475. + }
  1476. +
  1477. + return retsize;
  1478. +}
  1479. +
  1480. +static int nand_read_oob_buf(struct ra_nand_chip *ra, uint8_t *oob, size_t size,
  1481. + int mode, int ooboffs)
  1482. +{
  1483. + size_t oobsize = 1<<ra->oob_shift;
  1484. + uint8_t *buf = ra->buffers + (1<<ra->page_shift);
  1485. + int retsize=0;
  1486. +
  1487. + ra_dbg("%s: size:%x, mode:%x, offs:%x \n", __func__, size, mode, ooboffs);
  1488. +
  1489. + switch(mode) {
  1490. + case MTD_OPS_PLACE_OOB:
  1491. + case MTD_OPS_RAW:
  1492. + if (ooboffs > oobsize)
  1493. + return -1;
  1494. +
  1495. + size = min(size, oobsize - ooboffs);
  1496. + memcpy(oob, buf + ooboffs, size);
  1497. + return size;
  1498. +
  1499. + case MTD_OPS_AUTO_OOB: {
  1500. + struct nand_oobfree *free;
  1501. + uint32_t woffs = ooboffs;
  1502. +
  1503. + if (ooboffs > ra->oob->oobavail)
  1504. + return -1;
  1505. +
  1506. + size = min(size, ra->oob->oobavail - ooboffs);
  1507. + for(free = ra->oob->oobfree; free->length && size; free++) {
  1508. + int wlen = free->length - woffs;
  1509. + int bytes = 0;
  1510. +
  1511. + /* Write request not from offset 0 ? */
  1512. + if (wlen <= 0) {
  1513. + woffs = -wlen;
  1514. + continue;
  1515. + }
  1516. +
  1517. + bytes = min_t(size_t, size, wlen);
  1518. + memcpy (oob, buf + free->offset + woffs, bytes);
  1519. + woffs = 0;
  1520. + oob += bytes;
  1521. + size -= bytes;
  1522. + retsize += bytes;
  1523. + }
  1524. + return retsize;
  1525. + }
  1526. + default:
  1527. + BUG();
  1528. + }
  1529. +
  1530. + return -1;
  1531. +}
  1532. +
  1533. +/**
  1534. + * nand_do_write_ops - [Internal] NAND write with ECC
  1535. + * @mtd: MTD device structure
  1536. + * @to: offset to write to
  1537. + * @ops: oob operations description structure
  1538. + *
  1539. + * NAND write with ECC
  1540. + */
  1541. +static int nand_do_write_ops(struct ra_nand_chip *ra, loff_t to,
  1542. + struct mtd_oob_ops *ops)
  1543. +{
  1544. + int page;
  1545. + uint32_t datalen = ops->len;
  1546. + uint32_t ooblen = ops->ooblen;
  1547. + uint8_t *oob = ops->oobbuf;
  1548. + uint8_t *data = ops->datbuf;
  1549. + int pagesize = (1<<ra->page_shift);
  1550. + int pagemask = (pagesize -1);
  1551. + int oobsize = 1<<ra->oob_shift;
  1552. + loff_t addr = to;
  1553. + //int i = 0; //for ra_dbg only
  1554. +
  1555. + ra_dbg("%s: to:%x, ops data:%p, oob:%p datalen:%x ooblen:%x, ooboffs:%x oobmode:%x \n",
  1556. + __func__, (unsigned int)to, data, oob, datalen, ooblen, ops->ooboffs, ops->mode);
  1557. +
  1558. + ops->retlen = 0;
  1559. + ops->oobretlen = 0;
  1560. +
  1561. +
  1562. + /* Invalidate the page cache, when we write to the cached page */
  1563. + ra->buffers_page = -1;
  1564. +
  1565. +
  1566. + if (data ==0)
  1567. + datalen = 0;
  1568. +
  1569. + // oob sequential (burst) write
  1570. + if (datalen == 0 && ooblen) {
  1571. + int len = ((ooblen + ops->ooboffs) + (ra->oob->oobavail - 1)) / ra->oob->oobavail * oobsize;
  1572. +
  1573. + /* select chip, and check if it is write protected */
  1574. + if (nfc_enable_chip(ra, addr, 0))
  1575. + return -EIO;
  1576. +
  1577. + //FIXME, need sanity check of block boundary
  1578. + page = (int)((to & ((1<<ra->chip_shift)-1)) >> ra->page_shift); //chip boundary
  1579. + memset(ra->buffers, 0x0ff, pagesize);
  1580. + //fixme, should we reserve the original content?
  1581. + if (ops->mode == MTD_OPS_AUTO_OOB) {
  1582. + nfc_read_oob(ra, page, 0, ra->buffers, len, FLAG_NONE);
  1583. + }
  1584. + //prepare buffers
  1585. + if (ooblen != 8)
  1586. + {
  1587. + nand_write_oob_buf(ra, ra->buffers, oob, ooblen, ops->mode, ops->ooboffs);
  1588. + // write out buffer to chip
  1589. + nfc_write_oob(ra, page, 0, ra->buffers, len, FLAG_USE_GDMA);
  1590. + }
  1591. +
  1592. + ops->oobretlen = ooblen;
  1593. + ooblen = 0;
  1594. + }
  1595. +
  1596. + // data sequential (burst) write
  1597. + if (datalen && ooblen == 0) {
  1598. + // ranfc can not support write_data_burst, since hw-ecc and fifo constraints..
  1599. + }
  1600. +
  1601. + // page write
  1602. + while(datalen || ooblen) {
  1603. + int len;
  1604. + int ret;
  1605. + int offs;
  1606. + int ecc_en = 0;
  1607. +
  1608. + ra_dbg("%s (%d): addr:%x, ops data:%p, oob:%p datalen:%x ooblen:%x, ooboffs:%x \n",
  1609. + __func__, i++, (unsigned int)addr, data, oob, datalen, ooblen, ops->ooboffs);
  1610. +
  1611. + page = (int)((addr & ((1<<ra->chip_shift)-1)) >> ra->page_shift); //chip boundary
  1612. +
  1613. + /* select chip, and check if it is write protected */
  1614. + if (nfc_enable_chip(ra, addr, 0))
  1615. + return -EIO;
  1616. +
  1617. + // oob write
  1618. + if (ops->mode == MTD_OPS_AUTO_OOB) {
  1619. + //fixme, this path is not yet varified
  1620. + nfc_read_oob(ra, page, 0, ra->buffers + pagesize, oobsize, FLAG_NONE);
  1621. + }
  1622. + if (oob && ooblen > 0) {
  1623. + len = nand_write_oob_buf(ra, ra->buffers + pagesize, oob, ooblen, ops->mode, ops->ooboffs);
  1624. + if (len < 0)
  1625. + return -EINVAL;
  1626. +
  1627. + oob += len;
  1628. + ops->oobretlen += len;
  1629. + ooblen -= len;
  1630. + }
  1631. +
  1632. + // data write
  1633. + offs = addr & pagemask;
  1634. + len = min_t(size_t, datalen, pagesize - offs);
  1635. + if (data && len > 0) {
  1636. + memcpy(ra->buffers + offs, data, len); // we can not sure ops->buf wether is DMA-able.
  1637. +
  1638. + data += len;
  1639. + datalen -= len;
  1640. + ops->retlen += len;
  1641. +
  1642. + ecc_en = FLAG_ECC_EN;
  1643. + }
  1644. + ret = nfc_write_page(ra, ra->buffers, page, FLAG_USE_GDMA | FLAG_VERIFY |
  1645. + ((ops->mode == MTD_OPS_RAW || ops->mode == MTD_OPS_PLACE_OOB) ? 0 : ecc_en ));
  1646. + if (ret) {
  1647. + nand_bbt_set(ra, addr >> ra->erase_shift, BBT_TAG_BAD);
  1648. + return ret;
  1649. + }
  1650. +
  1651. + nand_bbt_set(ra, addr >> ra->erase_shift, BBT_TAG_GOOD);
  1652. +
  1653. + addr = (page+1) << ra->page_shift;
  1654. +
  1655. + }
  1656. + return 0;
  1657. +}
  1658. +
  1659. +/**
  1660. + * nand_do_read_ops - [Internal] Read data with ECC
  1661. + *
  1662. + * @mtd: MTD device structure
  1663. + * @from: offset to read from
  1664. + * @ops: oob ops structure
  1665. + *
  1666. + * Internal function. Called with chip held.
  1667. + */
  1668. +static int nand_do_read_ops(struct ra_nand_chip *ra, loff_t from,
  1669. + struct mtd_oob_ops *ops)
  1670. +{
  1671. + int page;
  1672. + uint32_t datalen = ops->len;
  1673. + uint32_t ooblen = ops->ooblen;
  1674. + uint8_t *oob = ops->oobbuf;
  1675. + uint8_t *data = ops->datbuf;
  1676. + int pagesize = (1<<ra->page_shift);
  1677. + int pagemask = (pagesize -1);
  1678. + loff_t addr = from;
  1679. + //int i = 0; //for ra_dbg only
  1680. +
  1681. + ra_dbg("%s: addr:%x, ops data:%p, oob:%p datalen:%x ooblen:%x, ooboffs:%x \n",
  1682. + __func__, (unsigned int)addr, data, oob, datalen, ooblen, ops->ooboffs);
  1683. +
  1684. + ops->retlen = 0;
  1685. + ops->oobretlen = 0;
  1686. + if (data == 0)
  1687. + datalen = 0;
  1688. +
  1689. +
  1690. + while(datalen || ooblen) {
  1691. + int len;
  1692. + int ret;
  1693. + int offs;
  1694. +
  1695. + ra_dbg("%s (%d): addr:%x, ops data:%p, oob:%p datalen:%x ooblen:%x, ooboffs:%x \n",
  1696. + __func__, i++, (unsigned int)addr, data, oob, datalen, ooblen, ops->ooboffs);
  1697. + /* select chip */
  1698. + if (nfc_enable_chip(ra, addr, 1) < 0)
  1699. + return -EIO;
  1700. +
  1701. + page = (int)((addr & ((1<<ra->chip_shift)-1)) >> ra->page_shift);
  1702. +
  1703. + ret = nfc_read_page(ra, ra->buffers, page, FLAG_VERIFY |
  1704. + ((ops->mode == MTD_OPS_RAW || ops->mode == MTD_OPS_PLACE_OOB) ? 0: FLAG_ECC_EN ));
  1705. + //FIXME, something strange here, some page needs 2 more tries to guarantee read success.
  1706. + if (ret) {
  1707. + printk("read again:\n");
  1708. + ret = nfc_read_page(ra, ra->buffers, page, FLAG_VERIFY |
  1709. + ((ops->mode == MTD_OPS_RAW || ops->mode == MTD_OPS_PLACE_OOB) ? 0: FLAG_ECC_EN ));
  1710. +
  1711. + if (ret) {
  1712. + printk("read again fail \n");
  1713. + nand_bbt_set(ra, addr >> ra->erase_shift, BBT_TAG_BAD);
  1714. + if ((ret != -EUCLEAN) && (ret != -EBADMSG)) {
  1715. + return ret;
  1716. + }
  1717. + else {
  1718. + /* ecc verification fail, but data need to be returned. */
  1719. + }
  1720. + }
  1721. + else {
  1722. + printk(" read agian susccess \n");
  1723. + }
  1724. + }
  1725. +
  1726. + // oob read
  1727. + if (oob && ooblen > 0) {
  1728. + len = nand_read_oob_buf(ra, oob, ooblen, ops->mode, ops->ooboffs);
  1729. + if (len < 0) {
  1730. + printk("nand_read_oob_buf: fail return %x \n", len);
  1731. + return -EINVAL;
  1732. + }
  1733. +
  1734. + oob += len;
  1735. + ops->oobretlen += len;
  1736. + ooblen -= len;
  1737. + }
  1738. +
  1739. + // data read
  1740. + offs = addr & pagemask;
  1741. + len = min_t(size_t, datalen, pagesize - offs);
  1742. + if (data && len > 0) {
  1743. + memcpy(data, ra->buffers + offs, len); // we can not sure ops->buf wether is DMA-able.
  1744. +
  1745. + data += len;
  1746. + datalen -= len;
  1747. + ops->retlen += len;
  1748. + if (ret)
  1749. + return ret;
  1750. + }
  1751. +
  1752. +
  1753. + nand_bbt_set(ra, addr >> ra->erase_shift, BBT_TAG_GOOD);
  1754. + // address go further to next page, instead of increasing of length of write. This avoids some special cases wrong.
  1755. + addr = (page+1) << ra->page_shift;
  1756. + }
  1757. + return 0;
  1758. +}
  1759. +
  1760. +static int
  1761. +ramtd_nand_erase(struct mtd_info *mtd, struct erase_info *instr)
  1762. +{
  1763. + struct ra_nand_chip *ra = (struct ra_nand_chip *)mtd->priv;
  1764. + int ret;
  1765. +
  1766. + ra_dbg("%s: start:%x, len:%x \n", __func__,
  1767. + (unsigned int)instr->addr, (unsigned int)instr->len);
  1768. +
  1769. + nand_get_device(ra, FL_ERASING);
  1770. + ret = _nand_erase_nand((struct ra_nand_chip *)mtd->priv, instr);
  1771. + nand_release_device(ra);
  1772. +
  1773. + return ret;
  1774. +}
  1775. +
  1776. +static int
  1777. +ramtd_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
  1778. + size_t *retlen, const uint8_t *buf)
  1779. +{
  1780. + struct ra_nand_chip *ra = mtd->priv;
  1781. + struct mtd_oob_ops ops;
  1782. + int ret;
  1783. +
  1784. + ra_dbg("%s: to 0x%x len=0x%x\n", __func__, to, len);
  1785. +
  1786. + if ((to + len) > mtd->size)
  1787. + return -EINVAL;
  1788. +
  1789. + if (!len)
  1790. + return 0;
  1791. +
  1792. + nand_get_device(ra, FL_WRITING);
  1793. +
  1794. + memset(&ops, 0, sizeof(ops));
  1795. + ops.len = len;
  1796. + ops.datbuf = (uint8_t *)buf;
  1797. + ops.oobbuf = NULL;
  1798. + ops.mode = MTD_OPS_AUTO_OOB;
  1799. +
  1800. + ret = nand_do_write_ops(ra, to, &ops);
  1801. +
  1802. + *retlen = ops.retlen;
  1803. +
  1804. + nand_release_device(ra);
  1805. +
  1806. + return ret;
  1807. +}
  1808. +
  1809. +static int
  1810. +ramtd_nand_read(struct mtd_info *mtd, loff_t from, size_t len,
  1811. + size_t *retlen, uint8_t *buf)
  1812. +{
  1813. +
  1814. + struct ra_nand_chip *ra = mtd->priv;
  1815. + int ret;
  1816. + struct mtd_oob_ops ops;
  1817. +
  1818. + ra_dbg("%s: mtd:%p from:%x, len:%x, buf:%p \n", __func__, mtd, (unsigned int)from, len, buf);
  1819. +
  1820. + /* Do not allow reads past end of device */
  1821. + if ((from + len) > mtd->size)
  1822. + return -EINVAL;
  1823. + if (!len)
  1824. + return 0;
  1825. +
  1826. + nand_get_device(ra, FL_READING);
  1827. +
  1828. + memset(&ops, 0, sizeof(ops));
  1829. + ops.len = len;
  1830. + ops.datbuf = buf;
  1831. + ops.oobbuf = NULL;
  1832. + ops.mode = MTD_OPS_AUTO_OOB;
  1833. +
  1834. + ret = nand_do_read_ops(ra, from, &ops);
  1835. +
  1836. + *retlen = ops.retlen;
  1837. +
  1838. + nand_release_device(ra);
  1839. +
  1840. + return ret;
  1841. +
  1842. +}
  1843. +
  1844. +static int
  1845. +ramtd_nand_readoob(struct mtd_info *mtd, loff_t from,
  1846. + struct mtd_oob_ops *ops)
  1847. +{
  1848. + struct ra_nand_chip *ra = mtd->priv;
  1849. + int ret;
  1850. +
  1851. + ra_dbg("%s: \n", __func__);
  1852. +
  1853. + nand_get_device(ra, FL_READING);
  1854. +
  1855. + ret = nand_do_read_ops(ra, from, ops);
  1856. +
  1857. + nand_release_device(ra);
  1858. +
  1859. + return ret;
  1860. +}
  1861. +
  1862. +static int
  1863. +ramtd_nand_writeoob(struct mtd_info *mtd, loff_t to,
  1864. + struct mtd_oob_ops *ops)
  1865. +{
  1866. + struct ra_nand_chip *ra = mtd->priv;
  1867. + int ret;
  1868. +
  1869. + nand_get_device(ra, FL_READING);
  1870. + ret = nand_do_write_ops(ra, to, ops);
  1871. + nand_release_device(ra);
  1872. +
  1873. + return ret;
  1874. +}
  1875. +
  1876. +static int
  1877. +ramtd_nand_block_isbad(struct mtd_info *mtd, loff_t offs)
  1878. +{
  1879. + if (offs > mtd->size)
  1880. + return -EINVAL;
  1881. +
  1882. + return nand_block_checkbad((struct ra_nand_chip *)mtd->priv, offs);
  1883. +}
  1884. +
  1885. +static int
  1886. +ramtd_nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
  1887. +{
  1888. + struct ra_nand_chip *ra = mtd->priv;
  1889. + int ret;
  1890. +
  1891. + ra_dbg("%s: \n", __func__);
  1892. + nand_get_device(ra, FL_WRITING);
  1893. + ret = nand_block_markbad(ra, ofs);
  1894. + nand_release_device(ra);
  1895. +
  1896. + return ret;
  1897. +}
  1898. +
  1899. +// 1-bit error detection
  1900. +static int one_bit_correction(char *ecc1, char *ecc2, int *bytes, int *bits)
  1901. +{
  1902. + // check if ecc and expected are all valid
  1903. + char *p, nibble, crumb;
  1904. + int i, xor, iecc1 = 0, iecc2 = 0;
  1905. +
  1906. + printk("correction : %x %x %x\n", ecc1[0], ecc1[1], ecc1[2]);
  1907. + printk("correction : %x %x %x\n", ecc2[0], ecc2[1], ecc2[2]);
  1908. +
  1909. + p = (char *)ecc1;
  1910. + for (i = 0; i < CONFIG_ECC_BYTES; i++)
  1911. + {
  1912. + nibble = *(p+i) & 0xf;
  1913. + if ((nibble != 0x0) && (nibble != 0xf) && (nibble != 0x3) && (nibble != 0xc) &&
  1914. + (nibble != 0x5) && (nibble != 0xa) && (nibble != 0x6) && (nibble != 0x9))
  1915. + return -1;
  1916. + nibble = ((*(p+i)) >> 4) & 0xf;
  1917. + if ((nibble != 0x0) && (nibble != 0xf) && (nibble != 0x3) && (nibble != 0xc) &&
  1918. + (nibble != 0x5) && (nibble != 0xa) && (nibble != 0x6) && (nibble != 0x9))
  1919. + return -1;
  1920. + }
  1921. +
  1922. + p = (char *)ecc2;
  1923. + for (i = 0; i < CONFIG_ECC_BYTES; i++)
  1924. + {
  1925. + nibble = *(p+i) & 0xf;
  1926. + if ((nibble != 0x0) && (nibble != 0xf) && (nibble != 0x3) && (nibble != 0xc) &&
  1927. + (nibble != 0x5) && (nibble != 0xa) && (nibble != 0x6) && (nibble != 0x9))
  1928. + return -1;
  1929. + nibble = ((*(p+i)) >> 4) & 0xf;
  1930. + if ((nibble != 0x0) && (nibble != 0xf) && (nibble != 0x3) && (nibble != 0xc) &&
  1931. + (nibble != 0x5) && (nibble != 0xa) && (nibble != 0x6) && (nibble != 0x9))
  1932. + return -1;
  1933. + }
  1934. +
  1935. + memcpy(&iecc1, ecc1, 3);
  1936. + memcpy(&iecc2, ecc2, 3);
  1937. +
  1938. + xor = iecc1 ^ iecc2;
  1939. + printk("xor = %x (%x %x)\n", xor, iecc1, iecc2);
  1940. +
  1941. + *bytes = 0;
  1942. + for (i = 0; i < 9; i++)
  1943. + {
  1944. + crumb = (xor >> (2*i)) & 0x3;
  1945. + if ((crumb == 0x0) || (crumb == 0x3))
  1946. + return -1;
  1947. + if (crumb == 0x2)
  1948. + *bytes += (1 << i);
  1949. + }
  1950. +
  1951. + *bits = 0;
  1952. + for (i = 0; i < 3; i++)
  1953. + {
  1954. + crumb = (xor >> (18 + 2*i)) & 0x3;
  1955. + if ((crumb == 0x0) || (crumb == 0x3))
  1956. + return -1;
  1957. + if (crumb == 0x2)
  1958. + *bits += (1 << i);
  1959. + }
  1960. +
  1961. + return 0;
  1962. +}
  1963. +
  1964. +
  1965. +
  1966. +/************************************************************
  1967. + * the init/exit section.
  1968. + */
  1969. +
  1970. +static struct nand_ecclayout ra_oob_layout = {
  1971. + .eccbytes = CONFIG_ECC_BYTES,
  1972. + .eccpos = {5, 6, 7},
  1973. + .oobfree = {
  1974. + {.offset = 0, .length = 4},
  1975. + {.offset = 8, .length = 8},
  1976. + {.offset = 0, .length = 0}
  1977. + },
  1978. +#define RA_CHIP_OOB_AVAIL (4+8)
  1979. + .oobavail = RA_CHIP_OOB_AVAIL,
  1980. + // 5th byte is bad-block flag.
  1981. +};
  1982. +
  1983. +static int
  1984. +mtk_nand_probe(struct platform_device *pdev)
  1985. +{
  1986. + struct mtd_part_parser_data ppdata;
  1987. + struct ra_nand_chip *ra;
  1988. + int alloc_size, bbt_size, buffers_size, reg, err;
  1989. + unsigned char chip_mode = 12;
  1990. +
  1991. +/* if(ra_check_flash_type()!=BOOT_FROM_NAND) {
  1992. + return 0;
  1993. + }*/
  1994. +
  1995. + //FIXME: config 512 or 2048-byte page according to HWCONF
  1996. +#if defined (CONFIG_RALINK_RT6855A)
  1997. + reg = ra_inl(RALINK_SYSCTL_BASE+0x8c);
  1998. + chip_mode = ((reg>>28) & 0x3)|(((reg>>22) & 0x3)<<2);
  1999. + if (chip_mode == 1) {
  2000. + printk("! nand 2048\n");
  2001. + ra_or(NFC_CONF1, 1);
  2002. + is_nand_page_2048 = 1;
  2003. + nand_addrlen = 5;
  2004. + }
  2005. + else {
  2006. + printk("! nand 512\n");
  2007. + ra_and(NFC_CONF1, ~1);
  2008. + is_nand_page_2048 = 0;
  2009. + nand_addrlen = 4;
  2010. + }
  2011. +#elif (defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_RT6855))
  2012. + ra_outl(RALINK_SYSCTL_BASE+0x60, ra_inl(RALINK_SYSCTL_BASE+0x60) & ~(0x3<<18));
  2013. + reg = ra_inl(RALINK_SYSCTL_BASE+0x10);
  2014. + chip_mode = (reg & 0x0F);
  2015. + if((chip_mode==1)||(chip_mode==11)) {
  2016. + ra_or(NFC_CONF1, 1);
  2017. + is_nand_page_2048 = 1;
  2018. + nand_addrlen = ((chip_mode!=11) ? 4 : 5);
  2019. + printk("!!! nand page size = 2048, addr len=%d\n", nand_addrlen);
  2020. + }
  2021. + else {
  2022. + ra_and(NFC_CONF1, ~1);
  2023. + is_nand_page_2048 = 0;
  2024. + nand_addrlen = ((chip_mode!=10) ? 3 : 4);
  2025. + printk("!!! nand page size = 512, addr len=%d\n", nand_addrlen);
  2026. + }
  2027. +#else
  2028. + is_nand_page_2048 = 0;
  2029. + nand_addrlen = 3;
  2030. + printk("!!! nand page size = 512, addr len=%d\n", nand_addrlen);
  2031. +#endif
  2032. +
  2033. +#if defined (CONFIG_RALINK_RT6855A) || defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_RT6855)
  2034. + //config ECC location
  2035. + ra_and(NFC_CONF1, 0xfff000ff);
  2036. + ra_or(NFC_CONF1, ((CONFIG_ECC_OFFSET + 2) << 16) +
  2037. + ((CONFIG_ECC_OFFSET + 1) << 12) +
  2038. + (CONFIG_ECC_OFFSET << 8));
  2039. +#endif
  2040. +
  2041. +#define ALIGNE_16(a) (((unsigned long)(a)+15) & ~15)
  2042. + buffers_size = ALIGNE_16((1<<CONFIG_PAGE_SIZE_BIT) + (1<<CONFIG_OOBSIZE_PER_PAGE_BIT)); //ra->buffers
  2043. + bbt_size = BBTTAG_BITS * (1<<(CONFIG_CHIP_SIZE_BIT - (CONFIG_PAGE_SIZE_BIT + CONFIG_NUMPAGE_PER_BLOCK_BIT))) / 8; //ra->bbt
  2044. + bbt_size = ALIGNE_16(bbt_size);
  2045. +
  2046. + alloc_size = buffers_size + bbt_size;
  2047. + alloc_size += buffers_size; //for ra->readback_buffers
  2048. + alloc_size += sizeof(*ra);
  2049. + alloc_size += sizeof(*ranfc_mtd);
  2050. +
  2051. + //make sure gpio-0 is input
  2052. + ra_outl(RALINK_PIO_BASE+0x24, ra_inl(RALINK_PIO_BASE+0x24) & ~0x01);
  2053. +
  2054. + ra = (struct ra_nand_chip *)kzalloc(alloc_size, GFP_KERNEL | GFP_DMA);
  2055. + if (!ra) {
  2056. + printk("%s: mem alloc fail \n", __func__);
  2057. + return -ENOMEM;
  2058. + }
  2059. + memset(ra, 0, alloc_size);
  2060. +
  2061. + //dynamic
  2062. + ra->buffers = (char *)((char *)ra + sizeof(*ra));
  2063. + ra->readback_buffers = ra->buffers + buffers_size;
  2064. + ra->bbt = ra->readback_buffers + buffers_size;
  2065. + ranfc_mtd = (struct mtd_info *)(ra->bbt + bbt_size);
  2066. +
  2067. + //static
  2068. + ra->numchips = CONFIG_NUMCHIPS;
  2069. + ra->chip_shift = CONFIG_CHIP_SIZE_BIT;
  2070. + ra->page_shift = CONFIG_PAGE_SIZE_BIT;
  2071. + ra->oob_shift = CONFIG_OOBSIZE_PER_PAGE_BIT;
  2072. + ra->erase_shift = (CONFIG_PAGE_SIZE_BIT + CONFIG_NUMPAGE_PER_BLOCK_BIT);
  2073. + ra->badblockpos = CONFIG_BAD_BLOCK_POS;
  2074. + ra_oob_layout.eccpos[0] = CONFIG_ECC_OFFSET;
  2075. + ra_oob_layout.eccpos[1] = CONFIG_ECC_OFFSET + 1;
  2076. + ra_oob_layout.eccpos[2] = CONFIG_ECC_OFFSET + 2;
  2077. + ra->oob = &ra_oob_layout;
  2078. + ra->buffers_page = -1;
  2079. +
  2080. +#if defined (WORKAROUND_RX_BUF_OV)
  2081. + if (ranfc_verify) {
  2082. + ra->sandbox_page = nand_bbt_find_sandbox(ra);
  2083. + }
  2084. +#endif
  2085. + ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) | 0x01); //set wp to high
  2086. + nfc_all_reset();
  2087. +
  2088. + ranfc_mtd->type = MTD_NANDFLASH;
  2089. + ranfc_mtd->flags = MTD_CAP_NANDFLASH;
  2090. + ranfc_mtd->size = CONFIG_NUMCHIPS * CFG_CHIPSIZE;
  2091. + ranfc_mtd->erasesize = CFG_BLOCKSIZE;
  2092. + ranfc_mtd->writesize = CFG_PAGESIZE;
  2093. + ranfc_mtd->oobsize = CFG_PAGE_OOBSIZE;
  2094. + ranfc_mtd->oobavail = RA_CHIP_OOB_AVAIL;
  2095. + ranfc_mtd->name = "ra_nfc";
  2096. + //ranfc_mtd->index
  2097. + ranfc_mtd->ecclayout = &ra_oob_layout;
  2098. + //ranfc_mtd->numberaseregions
  2099. + //ranfc_mtd->eraseregions
  2100. + //ranfc_mtd->bansize
  2101. + ranfc_mtd->_erase = ramtd_nand_erase;
  2102. + //ranfc_mtd->point
  2103. + //ranfc_mtd->unpoint
  2104. + ranfc_mtd->_read = ramtd_nand_read;
  2105. + ranfc_mtd->_write = ramtd_nand_write;
  2106. + ranfc_mtd->_read_oob = ramtd_nand_readoob;
  2107. + ranfc_mtd->_write_oob = ramtd_nand_writeoob;
  2108. + //ranfc_mtd->get_fact_prot_info; ranfc_mtd->read_fact_prot_reg;
  2109. + //ranfc_mtd->get_user_prot_info; ranfc_mtd->read_user_prot_reg;
  2110. + //ranfc_mtd->write_user_prot_reg; ranfc_mtd->lock_user_prot_reg;
  2111. + //ranfc_mtd->writev; ranfc_mtd->sync; ranfc_mtd->lock; ranfc_mtd->unlock; ranfc_mtd->suspend; ranfc_mtd->resume;
  2112. + ranfc_mtd->_block_isbad = ramtd_nand_block_isbad;
  2113. + ranfc_mtd->_block_markbad = ramtd_nand_block_markbad;
  2114. + //ranfc_mtd->reboot_notifier
  2115. + //ranfc_mtd->ecc_stats;
  2116. + // subpage_sht;
  2117. +
  2118. + //ranfc_mtd->get_device; ranfc_mtd->put_device
  2119. + ranfc_mtd->priv = ra;
  2120. +
  2121. + ranfc_mtd->owner = THIS_MODULE;
  2122. + ra->controller = &ra->hwcontrol;
  2123. + mutex_init(ra->controller);
  2124. +
  2125. + printk("%s: alloc %x, at %p , btt(%p, %x), ranfc_mtd:%p\n",
  2126. + __func__ , alloc_size, ra, ra->bbt, bbt_size, ranfc_mtd);
  2127. +
  2128. + ppdata.of_node = pdev->dev.of_node;
  2129. + err = mtd_device_parse_register(ranfc_mtd, mtk_probe_types,
  2130. + &ppdata, NULL, 0);
  2131. +
  2132. + return err;
  2133. +}
  2134. +
  2135. +static int
  2136. +mtk_nand_remove(struct platform_device *pdev)
  2137. +{
  2138. + struct ra_nand_chip *ra;
  2139. +
  2140. + if (ranfc_mtd) {
  2141. + ra = (struct ra_nand_chip *)ranfc_mtd->priv;
  2142. +
  2143. + /* Deregister partitions */
  2144. + //del_mtd_partitions(ranfc_mtd);
  2145. + kfree(ra);
  2146. + }
  2147. + return 0;
  2148. +}
  2149. +
  2150. +static const struct of_device_id mtk_nand_match[] = {
  2151. + { .compatible = "mtk,mt7620-nand" },
  2152. + {},
  2153. +};
  2154. +MODULE_DEVICE_TABLE(of, mtk_nand_match);
  2155. +
  2156. +static struct platform_driver mtk_nand_driver = {
  2157. + .probe = mtk_nand_probe,
  2158. + .remove = mtk_nand_remove,
  2159. + .driver = {
  2160. + .name = "mt7620_nand",
  2161. + .owner = THIS_MODULE,
  2162. + .of_match_table = mtk_nand_match,
  2163. + },
  2164. +};
  2165. +
  2166. +module_platform_driver(mtk_nand_driver);
  2167. +
  2168. +
  2169. +MODULE_LICENSE("GPL");
  2170. --- /dev/null
  2171. +++ b/drivers/mtd/maps/ralink_nand.h
  2172. @@ -0,0 +1,232 @@
  2173. +#ifndef RT2880_NAND_H
  2174. +#define RT2880_NAND_H
  2175. +
  2176. +#include <linux/mtd/mtd.h>
  2177. +
  2178. +//#include "gdma.h"
  2179. +
  2180. +#define RALINK_SYSCTL_BASE 0xB0000000
  2181. +#define RALINK_PIO_BASE 0xB0000600
  2182. +#define RALINK_NAND_CTRL_BASE 0xB0000810
  2183. +#define CONFIG_RALINK_MT7620
  2184. +
  2185. +#define SKIP_BAD_BLOCK
  2186. +//#define RANDOM_GEN_BAD_BLOCK
  2187. +
  2188. +#define ra_inl(addr) (*(volatile unsigned int *)(addr))
  2189. +#define ra_outl(addr, value) (*(volatile unsigned int *)(addr) = (value))
  2190. +#define ra_aor(addr, a_mask, o_value) ra_outl(addr, (ra_inl(addr) & (a_mask)) | (o_value))
  2191. +#define ra_and(addr, a_mask) ra_aor(addr, a_mask, 0)
  2192. +#define ra_or(addr, o_value) ra_aor(addr, -1, o_value)
  2193. +
  2194. +
  2195. +#define CONFIG_NUMCHIPS 1
  2196. +#define CONFIG_NOT_SUPPORT_WP //rt3052 has no WP signal for chip.
  2197. +//#define CONFIG_NOT_SUPPORT_RB
  2198. +
  2199. +extern int is_nand_page_2048;
  2200. +extern const unsigned int nand_size_map[2][3];
  2201. +
  2202. +//chip
  2203. +// chip geometry: SAMSUNG small size 32MB.
  2204. +#define CONFIG_CHIP_SIZE_BIT (nand_size_map[is_nand_page_2048][nand_addrlen-3]) //! (1<<NAND_SIZE_BYTE) MB
  2205. +//#define CONFIG_CHIP_SIZE_BIT (is_nand_page_2048? 29 : 25) //! (1<<NAND_SIZE_BYTE) MB
  2206. +#define CONFIG_PAGE_SIZE_BIT (is_nand_page_2048? 11 : 9) //! (1<<PAGE_SIZE) MB
  2207. +//#define CONFIG_SUBPAGE_BIT 1 //! these bits will be compensate by command cycle
  2208. +#define CONFIG_NUMPAGE_PER_BLOCK_BIT (is_nand_page_2048? 6 : 5) //! order of number of pages a block.
  2209. +#define CONFIG_OOBSIZE_PER_PAGE_BIT (is_nand_page_2048? 6 : 4) //! byte number of oob a page.
  2210. +#define CONFIG_BAD_BLOCK_POS (is_nand_page_2048? 0 : 4) //! offset of byte to denote bad block.
  2211. +#define CONFIG_ECC_BYTES 3 //! ecc has 3 bytes
  2212. +#define CONFIG_ECC_OFFSET (is_nand_page_2048? 6 : 5) //! ecc starts from offset 5.
  2213. +
  2214. +//this section should not be modified.
  2215. +//#define CFG_COLUMN_ADDR_MASK ((1 << (CONFIG_PAGE_SIZE_BIT - CONFIG_SUBPAGE_BIT)) - 1)
  2216. +//#define CFG_COLUMN_ADDR_CYCLE (((CONFIG_PAGE_SIZE_BIT - CONFIG_SUBPAGE_BIT) + 7)/8)
  2217. +//#define CFG_ROW_ADDR_CYCLE ((CONFIG_CHIP_SIZE_BIT - CONFIG_PAGE_SIZE_BIT + 7)/8)
  2218. +//#define CFG_ADDR_CYCLE (CFG_COLUMN_ADDR_CYCLE + CFG_ROW_ADDR_CYCLE)
  2219. +
  2220. +#define CFG_COLUMN_ADDR_CYCLE (is_nand_page_2048? 2 : 1)
  2221. +#define CFG_ROW_ADDR_CYCLE (nand_addrlen - CFG_COLUMN_ADDR_CYCLE)
  2222. +#define CFG_ADDR_CYCLE (CFG_COLUMN_ADDR_CYCLE + CFG_ROW_ADDR_CYCLE)
  2223. +
  2224. +#define CFG_CHIPSIZE (1 << ((CONFIG_CHIP_SIZE_BIT>=32)? 31 : CONFIG_CHIP_SIZE_BIT))
  2225. +//#define CFG_CHIPSIZE (1 << CONFIG_CHIP_SIZE_BIT)
  2226. +#define CFG_PAGESIZE (1 << CONFIG_PAGE_SIZE_BIT)
  2227. +#define CFG_BLOCKSIZE (CFG_PAGESIZE << CONFIG_NUMPAGE_PER_BLOCK_BIT)
  2228. +#define CFG_NUMPAGE (1 << (CONFIG_CHIP_SIZE_BIT - CONFIG_PAGE_SIZE_BIT))
  2229. +#define CFG_NUMBLOCK (CFG_NUMPAGE >> CONFIG_NUMPAGE_PER_BLOCK_BIT)
  2230. +#define CFG_BLOCK_OOBSIZE (1 << (CONFIG_OOBSIZE_PER_PAGE_BIT + CONFIG_NUMPAGE_PER_BLOCK_BIT))
  2231. +#define CFG_PAGE_OOBSIZE (1 << CONFIG_OOBSIZE_PER_PAGE_BIT)
  2232. +
  2233. +#define NAND_BLOCK_ALIGN(addr) ((addr) & (CFG_BLOCKSIZE-1))
  2234. +#define NAND_PAGE_ALIGN(addr) ((addr) & (CFG_PAGESIZE-1))
  2235. +
  2236. +
  2237. +#define NFC_BASE RALINK_NAND_CTRL_BASE
  2238. +#define NFC_CTRL (NFC_BASE + 0x0)
  2239. +#define NFC_CONF (NFC_BASE + 0x4)
  2240. +#define NFC_CMD1 (NFC_BASE + 0x8)
  2241. +#define NFC_CMD2 (NFC_BASE + 0xc)
  2242. +#define NFC_CMD3 (NFC_BASE + 0x10)
  2243. +#define NFC_ADDR (NFC_BASE + 0x14)
  2244. +#define NFC_DATA (NFC_BASE + 0x18)
  2245. +#if defined (CONFIG_RALINK_RT6855) || defined (CONFIG_RALINK_RT6855A) || \
  2246. + defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_MT7621)
  2247. +#define NFC_ECC (NFC_BASE + 0x30)
  2248. +#else
  2249. +#define NFC_ECC (NFC_BASE + 0x1c)
  2250. +#endif
  2251. +#define NFC_STATUS (NFC_BASE + 0x20)
  2252. +#define NFC_INT_EN (NFC_BASE + 0x24)
  2253. +#define NFC_INT_ST (NFC_BASE + 0x28)
  2254. +#if defined (CONFIG_RALINK_RT6855) || defined (CONFIG_RALINK_RT6855A) || \
  2255. + defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_MT7621)
  2256. +#define NFC_CONF1 (NFC_BASE + 0x2c)
  2257. +#define NFC_ECC_P1 (NFC_BASE + 0x30)
  2258. +#define NFC_ECC_P2 (NFC_BASE + 0x34)
  2259. +#define NFC_ECC_P3 (NFC_BASE + 0x38)
  2260. +#define NFC_ECC_P4 (NFC_BASE + 0x3c)
  2261. +#define NFC_ECC_ERR1 (NFC_BASE + 0x40)
  2262. +#define NFC_ECC_ERR2 (NFC_BASE + 0x44)
  2263. +#define NFC_ECC_ERR3 (NFC_BASE + 0x48)
  2264. +#define NFC_ECC_ERR4 (NFC_BASE + 0x4c)
  2265. +#define NFC_ADDR2 (NFC_BASE + 0x50)
  2266. +#endif
  2267. +
  2268. +enum _int_stat {
  2269. + INT_ST_ND_DONE = 1<<0,
  2270. + INT_ST_TX_BUF_RDY = 1<<1,
  2271. + INT_ST_RX_BUF_RDY = 1<<2,
  2272. + INT_ST_ECC_ERR = 1<<3,
  2273. + INT_ST_TX_TRAS_ERR = 1<<4,
  2274. + INT_ST_RX_TRAS_ERR = 1<<5,
  2275. + INT_ST_TX_KICK_ERR = 1<<6,
  2276. + INT_ST_RX_KICK_ERR = 1<<7
  2277. +};
  2278. +
  2279. +
  2280. +//#define WORKAROUND_RX_BUF_OV 1
  2281. +
  2282. +
  2283. +/*************************************************************
  2284. + * stolen from nand.h
  2285. + *************************************************************/
  2286. +
  2287. +/*
  2288. + * Standard NAND flash commands
  2289. + */
  2290. +#define NAND_CMD_READ0 0
  2291. +#define NAND_CMD_READ1 1
  2292. +#define NAND_CMD_RNDOUT 5
  2293. +#define NAND_CMD_PAGEPROG 0x10
  2294. +#define NAND_CMD_READOOB 0x50
  2295. +#define NAND_CMD_ERASE1 0x60
  2296. +#define NAND_CMD_STATUS 0x70
  2297. +#define NAND_CMD_STATUS_MULTI 0x71
  2298. +#define NAND_CMD_SEQIN 0x80
  2299. +#define NAND_CMD_RNDIN 0x85
  2300. +#define NAND_CMD_READID 0x90
  2301. +#define NAND_CMD_ERASE2 0xd0
  2302. +#define NAND_CMD_RESET 0xff
  2303. +
  2304. +/* Extended commands for large page devices */
  2305. +#define NAND_CMD_READSTART 0x30
  2306. +#define NAND_CMD_RNDOUTSTART 0xE0
  2307. +#define NAND_CMD_CACHEDPROG 0x15
  2308. +
  2309. +/* Extended commands for AG-AND device */
  2310. +/*
  2311. + * Note: the command for NAND_CMD_DEPLETE1 is really 0x00 but
  2312. + * there is no way to distinguish that from NAND_CMD_READ0
  2313. + * until the remaining sequence of commands has been completed
  2314. + * so add a high order bit and mask it off in the command.
  2315. + */
  2316. +#define NAND_CMD_DEPLETE1 0x100
  2317. +#define NAND_CMD_DEPLETE2 0x38
  2318. +#define NAND_CMD_STATUS_MULTI 0x71
  2319. +#define NAND_CMD_STATUS_ERROR 0x72
  2320. +/* multi-bank error status (banks 0-3) */
  2321. +#define NAND_CMD_STATUS_ERROR0 0x73
  2322. +#define NAND_CMD_STATUS_ERROR1 0x74
  2323. +#define NAND_CMD_STATUS_ERROR2 0x75
  2324. +#define NAND_CMD_STATUS_ERROR3 0x76
  2325. +#define NAND_CMD_STATUS_RESET 0x7f
  2326. +#define NAND_CMD_STATUS_CLEAR 0xff
  2327. +
  2328. +#define NAND_CMD_NONE -1
  2329. +
  2330. +/* Status bits */
  2331. +#define NAND_STATUS_FAIL 0x01
  2332. +#define NAND_STATUS_FAIL_N1 0x02
  2333. +#define NAND_STATUS_TRUE_READY 0x20
  2334. +#define NAND_STATUS_READY 0x40
  2335. +#define NAND_STATUS_WP 0x80
  2336. +
  2337. +typedef enum {
  2338. + FL_READY,
  2339. + FL_READING,
  2340. + FL_WRITING,
  2341. + FL_ERASING,
  2342. + FL_SYNCING,
  2343. + FL_CACHEDPRG,
  2344. + FL_PM_SUSPENDED,
  2345. +} nand_state_t;
  2346. +
  2347. +/*************************************************************/
  2348. +
  2349. +
  2350. +
  2351. +typedef enum _ra_flags {
  2352. + FLAG_NONE = 0,
  2353. + FLAG_ECC_EN = (1<<0),
  2354. + FLAG_USE_GDMA = (1<<1),
  2355. + FLAG_VERIFY = (1<<2),
  2356. +} RA_FLAGS;
  2357. +
  2358. +
  2359. +#define BBTTAG_BITS 2
  2360. +#define BBTTAG_BITS_MASK ((1<<BBTTAG_BITS) -1)
  2361. +enum BBT_TAG {
  2362. + BBT_TAG_UNKNOWN = 0, //2'b01
  2363. + BBT_TAG_GOOD = 3, //2'b11
  2364. + BBT_TAG_BAD = 2, //2'b10
  2365. + BBT_TAG_RES = 1, //2'b01
  2366. +};
  2367. +
  2368. +struct ra_nand_chip {
  2369. + int numchips;
  2370. + int chip_shift;
  2371. + int page_shift;
  2372. + int erase_shift;
  2373. + int oob_shift;
  2374. + int badblockpos;
  2375. +#if !defined (__UBOOT__)
  2376. + struct mutex hwcontrol;
  2377. + struct mutex *controller;
  2378. +#endif
  2379. + struct nand_ecclayout *oob;
  2380. + int state;
  2381. + unsigned int buffers_page;
  2382. + char *buffers; //[CFG_PAGESIZE + CFG_PAGE_OOBSIZE];
  2383. + char *readback_buffers;
  2384. + unsigned char *bbt;
  2385. +#if defined (WORKAROUND_RX_BUF_OV)
  2386. + unsigned int sandbox_page; // steal a page (block) for read ECC verification
  2387. +#endif
  2388. +
  2389. +};
  2390. +
  2391. +
  2392. +
  2393. +//fixme, gdma api
  2394. +int nand_dma_sync(void);
  2395. +void release_dma_buf(void);
  2396. +int set_gdma_ch(unsigned long dst,
  2397. + unsigned long src, unsigned int len, int burst_size,
  2398. + int soft_mode, int src_req_type, int dst_req_type,
  2399. + int src_burst_mode, int dst_burst_mode);
  2400. +
  2401. +
  2402. +
  2403. +
  2404. +#endif