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0052-pwm-add-mediatek-support.patch 5.6 KB

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  1. From fc8f96309c21c1bc3276427309cd7d361347d66e Mon Sep 17 00:00:00 2001
  2. From: John Crispin <blogic@openwrt.org>
  3. Date: Mon, 7 Dec 2015 17:16:50 +0100
  4. Subject: [PATCH 52/53] pwm: add mediatek support
  5. Signed-off-by: John Crispin <blogic@openwrt.org>
  6. ---
  7. drivers/pwm/Kconfig | 9 +++
  8. drivers/pwm/Makefile | 1 +
  9. drivers/pwm/pwm-mediatek.c | 173 ++++++++++++++++++++++++++++++++++++++++++++
  10. 3 files changed, 183 insertions(+)
  11. create mode 100644 drivers/pwm/pwm-mediatek.c
  12. --- a/drivers/pwm/Kconfig
  13. +++ b/drivers/pwm/Kconfig
  14. @@ -260,6 +260,15 @@ config PWM_MTK_DISP
  15. To compile this driver as a module, choose M here: the module
  16. will be called pwm-mtk-disp.
  17. +config PWM_MEDIATEK
  18. + tristate "Mediatek PWM support"
  19. + depends on RALINK && OF
  20. + help
  21. + Generic PWM framework driver for Mediatek ARM SoC.
  22. +
  23. + To compile this driver as a module, choose M here: the module
  24. + will be called pwm-mxs.
  25. +
  26. config PWM_MXS
  27. tristate "Freescale MXS PWM support"
  28. depends on ARCH_MXS && OF
  29. --- a/drivers/pwm/Makefile
  30. +++ b/drivers/pwm/Makefile
  31. @@ -22,6 +22,7 @@ obj-$(CONFIG_PWM_LPC32XX) += pwm-lpc32xx
  32. obj-$(CONFIG_PWM_LPSS) += pwm-lpss.o
  33. obj-$(CONFIG_PWM_LPSS_PCI) += pwm-lpss-pci.o
  34. obj-$(CONFIG_PWM_LPSS_PLATFORM) += pwm-lpss-platform.o
  35. +obj-$(CONFIG_PWM_MEDIATEK) += pwm-mediatek.o
  36. obj-$(CONFIG_PWM_MTK_DISP) += pwm-mtk-disp.o
  37. obj-$(CONFIG_PWM_MXS) += pwm-mxs.o
  38. obj-$(CONFIG_PWM_PCA9685) += pwm-pca9685.o
  39. --- /dev/null
  40. +++ b/drivers/pwm/pwm-mediatek.c
  41. @@ -0,0 +1,173 @@
  42. +/*
  43. + * Mediatek Pulse Width Modulator driver
  44. + *
  45. + * Copyright (C) 2015 John Crispin <blogic@openwrt.org>
  46. + *
  47. + * This file is licensed under the terms of the GNU General Public
  48. + * License version 2. This program is licensed "as is" without any
  49. + * warranty of any kind, whether express or implied.
  50. + */
  51. +
  52. +#include <linux/err.h>
  53. +#include <linux/io.h>
  54. +#include <linux/ioport.h>
  55. +#include <linux/kernel.h>
  56. +#include <linux/module.h>
  57. +#include <linux/of.h>
  58. +#include <linux/platform_device.h>
  59. +#include <linux/pwm.h>
  60. +#include <linux/slab.h>
  61. +#include <linux/types.h>
  62. +
  63. +#define NUM_PWM 4
  64. +
  65. +/* PWM registers and bits definitions */
  66. +#define PWMCON 0x00
  67. +#define PWMHDUR 0x04
  68. +#define PWMLDUR 0x08
  69. +#define PWMGDUR 0x0c
  70. +#define PWMWAVENUM 0x28
  71. +#define PWMDWIDTH 0x2c
  72. +#define PWMTHRES 0x30
  73. +
  74. +/**
  75. + * struct mtk_pwm_chip - struct representing pwm chip
  76. + *
  77. + * @mmio_base: base address of pwm chip
  78. + * @chip: linux pwm chip representation
  79. + */
  80. +struct mtk_pwm_chip {
  81. + void __iomem *mmio_base;
  82. + struct pwm_chip chip;
  83. +};
  84. +
  85. +static inline struct mtk_pwm_chip *to_mtk_pwm_chip(struct pwm_chip *chip)
  86. +{
  87. + return container_of(chip, struct mtk_pwm_chip, chip);
  88. +}
  89. +
  90. +static inline u32 mtk_pwm_readl(struct mtk_pwm_chip *chip, unsigned int num,
  91. + unsigned long offset)
  92. +{
  93. + return ioread32(chip->mmio_base + 0x10 + (num * 0x40) + offset);
  94. +}
  95. +
  96. +static inline void mtk_pwm_writel(struct mtk_pwm_chip *chip,
  97. + unsigned int num, unsigned long offset,
  98. + unsigned long val)
  99. +{
  100. + iowrite32(val, chip->mmio_base + 0x10 + (num * 0x40) + offset);
  101. +}
  102. +
  103. +static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
  104. + int duty_ns, int period_ns)
  105. +{
  106. + struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);
  107. + u32 resolution = 100 / 4;
  108. + u32 clkdiv = 0;
  109. +
  110. + while (period_ns / resolution > 8191) {
  111. + clkdiv++;
  112. + resolution *= 2;
  113. + }
  114. +
  115. + if (clkdiv > 7)
  116. + return -1;
  117. +
  118. + mtk_pwm_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | BIT(3) | clkdiv);
  119. + mtk_pwm_writel(pc, pwm->hwpwm, PWMDWIDTH, period_ns / resolution);
  120. + mtk_pwm_writel(pc, pwm->hwpwm, PWMTHRES, duty_ns / resolution);
  121. + return 0;
  122. +}
  123. +
  124. +static int mtk_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
  125. +{
  126. + struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);
  127. + u32 val;
  128. +
  129. + val = ioread32(pc->mmio_base);
  130. + val |= BIT(pwm->hwpwm);
  131. + iowrite32(val, pc->mmio_base);
  132. +
  133. + return 0;
  134. +}
  135. +
  136. +static void mtk_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
  137. +{
  138. + struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);
  139. + u32 val;
  140. +
  141. + val = ioread32(pc->mmio_base);
  142. + val &= ~BIT(pwm->hwpwm);
  143. + iowrite32(val, pc->mmio_base);
  144. +}
  145. +
  146. +static const struct pwm_ops mtk_pwm_ops = {
  147. + .config = mtk_pwm_config,
  148. + .enable = mtk_pwm_enable,
  149. + .disable = mtk_pwm_disable,
  150. + .owner = THIS_MODULE,
  151. +};
  152. +
  153. +static int mtk_pwm_probe(struct platform_device *pdev)
  154. +{
  155. + struct mtk_pwm_chip *pc;
  156. + struct resource *r;
  157. + int ret;
  158. +
  159. + pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL);
  160. + if (!pc)
  161. + return -ENOMEM;
  162. +
  163. + r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  164. + pc->mmio_base = devm_ioremap_resource(&pdev->dev, r);
  165. + if (IS_ERR(pc->mmio_base))
  166. + return PTR_ERR(pc->mmio_base);
  167. +
  168. + platform_set_drvdata(pdev, pc);
  169. +
  170. + pc->chip.dev = &pdev->dev;
  171. + pc->chip.ops = &mtk_pwm_ops;
  172. + pc->chip.base = -1;
  173. + pc->chip.npwm = NUM_PWM;
  174. +
  175. + ret = pwmchip_add(&pc->chip);
  176. + if (ret < 0)
  177. + dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
  178. +
  179. + return ret;
  180. +}
  181. +
  182. +static int mtk_pwm_remove(struct platform_device *pdev)
  183. +{
  184. + struct mtk_pwm_chip *pc = platform_get_drvdata(pdev);
  185. + int i;
  186. +
  187. + for (i = 0; i < NUM_PWM; i++)
  188. + pwm_disable(&pc->chip.pwms[i]);
  189. +
  190. + return pwmchip_remove(&pc->chip);
  191. +}
  192. +
  193. +static const struct of_device_id mtk_pwm_of_match[] = {
  194. + { .compatible = "mediatek,mt7628-pwm" },
  195. + { }
  196. +};
  197. +
  198. +MODULE_DEVICE_TABLE(of, mtk_pwm_of_match);
  199. +
  200. +static struct platform_driver mtk_pwm_driver = {
  201. + .driver = {
  202. + .name = "mtk-pwm",
  203. + .owner = THIS_MODULE,
  204. + .of_match_table = mtk_pwm_of_match,
  205. + },
  206. + .probe = mtk_pwm_probe,
  207. + .remove = mtk_pwm_remove,
  208. +};
  209. +
  210. +module_platform_driver(mtk_pwm_driver);
  211. +
  212. +MODULE_LICENSE("GPL");
  213. +MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
  214. +MODULE_ALIAS("platform:mtk-pwm");