mach-a60.c 4.5 KB

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  1. /*
  2. * OpenMesh A60 support
  3. *
  4. * Copyright (C) 2013 Marek Lindner <marek@open-mesh.com>
  5. * Copyright (C) 2014-2017 Sven Eckelmann <sven@open-mesh.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published
  9. * by the Free Software Foundation.
  10. */
  11. #include <linux/gpio.h>
  12. #include <linux/mtd/mtd.h>
  13. #include <linux/mtd/partitions.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/platform_data/phy-at803x.h>
  16. #include <asm/mach-ath79/ar71xx_regs.h>
  17. #include <asm/mach-ath79/ath79.h>
  18. #include "common.h"
  19. #include "dev-ap9x-pci.h"
  20. #include "dev-eth.h"
  21. #include "dev-leds-gpio.h"
  22. #include "dev-gpio-buttons.h"
  23. #include "dev-m25p80.h"
  24. #include "dev-wmac.h"
  25. #include "machtypes.h"
  26. #include "pci.h"
  27. #include "dev-usb.h"
  28. #define A60_GPIO_LED_RED 22
  29. #define A60_GPIO_LED_GREEN 23
  30. #define A60_GPIO_LED_BLUE 13
  31. #define A60_GPIO_BTN_RESET 17
  32. #define A60_KEYS_POLL_INTERVAL 20 /* msecs */
  33. #define A60_KEYS_DEBOUNCE_INTERVAL (3 * A60_KEYS_POLL_INTERVAL)
  34. #define A60_WMAC_CALDATA_OFFSET 0x1000
  35. static struct gpio_led a40_leds_gpio[] __initdata = {
  36. {
  37. .name = "a40:red:status",
  38. .gpio = A60_GPIO_LED_RED,
  39. }, {
  40. .name = "a40:green:status",
  41. .gpio = A60_GPIO_LED_GREEN,
  42. }, {
  43. .name = "a40:blue:status",
  44. .gpio = A60_GPIO_LED_BLUE,
  45. }
  46. };
  47. static struct gpio_led a60_leds_gpio[] __initdata = {
  48. {
  49. .name = "a60:red:status",
  50. .gpio = A60_GPIO_LED_RED,
  51. }, {
  52. .name = "a60:green:status",
  53. .gpio = A60_GPIO_LED_GREEN,
  54. }, {
  55. .name = "a60:blue:status",
  56. .gpio = A60_GPIO_LED_BLUE,
  57. }
  58. };
  59. static struct gpio_keys_button a60_gpio_keys[] __initdata = {
  60. {
  61. .desc = "Reset button",
  62. .type = EV_KEY,
  63. .code = KEY_RESTART,
  64. .debounce_interval = A60_KEYS_DEBOUNCE_INTERVAL,
  65. .gpio = A60_GPIO_BTN_RESET,
  66. .active_low = 1,
  67. },
  68. };
  69. static struct at803x_platform_data a60_at803x_data = {
  70. .disable_smarteee = 1,
  71. .enable_rgmii_rx_delay = 1,
  72. .enable_rgmii_tx_delay = 1,
  73. };
  74. static struct mdio_board_info a60_mdio0_info[] = {
  75. {
  76. .bus_id = "ag71xx-mdio.0",
  77. .phy_addr = 1,
  78. .platform_data = &a60_at803x_data,
  79. },
  80. {
  81. .bus_id = "ag71xx-mdio.0",
  82. .phy_addr = 2,
  83. .platform_data = &a60_at803x_data,
  84. },
  85. };
  86. static void __init a60_setup_qca955x_eth_cfg(u32 mask,
  87. unsigned int rxd,
  88. unsigned int rxdv,
  89. unsigned int txd,
  90. unsigned int txe)
  91. {
  92. void __iomem *base;
  93. u32 t;
  94. base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE);
  95. t = mask;
  96. t |= rxd << QCA955X_ETH_CFG_RXD_DELAY_SHIFT;
  97. t |= rxdv << QCA955X_ETH_CFG_RDV_DELAY_SHIFT;
  98. t |= txd << QCA955X_ETH_CFG_TXD_DELAY_SHIFT;
  99. t |= txe << QCA955X_ETH_CFG_TXE_DELAY_SHIFT;
  100. __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG);
  101. iounmap(base);
  102. }
  103. static void __init a60_setup_common(void)
  104. {
  105. u8 *art = (u8 *)KSEG1ADDR(0x1fff0000);
  106. u8 mac[6];
  107. ath79_register_usb();
  108. ath79_register_m25p80(NULL);
  109. ath79_register_gpio_keys_polled(-1, A60_KEYS_POLL_INTERVAL,
  110. ARRAY_SIZE(a60_gpio_keys),
  111. a60_gpio_keys);
  112. ath79_init_mac(mac, art, 0x02);
  113. ath79_register_wmac(art + A60_WMAC_CALDATA_OFFSET, mac);
  114. a60_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
  115. ath79_register_mdio(0, 0x0);
  116. mdiobus_register_board_info(a60_mdio0_info, ARRAY_SIZE(a60_mdio0_info));
  117. ath79_init_mac(ath79_eth0_data.mac_addr, art, 0x00);
  118. ath79_init_mac(ath79_eth1_data.mac_addr, art, 0x01);
  119. /* GMAC0 is connected to the PHY1 */
  120. ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
  121. ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
  122. ath79_eth0_data.phy_mask = BIT(1);
  123. ath79_eth0_pll_data.pll_1000 = 0x82000101;
  124. ath79_eth0_pll_data.pll_100 = 0x80000101;
  125. ath79_eth0_pll_data.pll_10 = 0x80001313;
  126. ath79_register_eth(0);
  127. /* GMAC1 is connected to MDIO1 in SGMII mode */
  128. ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
  129. ath79_eth1_data.mii_bus_dev = &ath79_mdio0_device.dev;
  130. ath79_eth1_data.phy_mask = BIT(2);
  131. ath79_eth1_pll_data.pll_1000 = 0x03000101;
  132. ath79_eth1_pll_data.pll_100 = 0x80000101;
  133. ath79_eth1_pll_data.pll_10 = 0x80001313;
  134. ath79_eth1_data.speed = SPEED_1000;
  135. ath79_eth1_data.duplex = DUPLEX_FULL;
  136. ath79_register_eth(1);
  137. ath79_register_pci();
  138. }
  139. static void __init a40_setup(void)
  140. {
  141. ath79_register_leds_gpio(-1, ARRAY_SIZE(a40_leds_gpio), a40_leds_gpio);
  142. a60_setup_common();
  143. }
  144. MIPS_MACHINE(ATH79_MACH_A40, "A40", "OpenMesh A40", a40_setup);
  145. static void __init a60_setup(void)
  146. {
  147. ath79_register_leds_gpio(-1, ARRAY_SIZE(a60_leds_gpio), a60_leds_gpio);
  148. a60_setup_common();
  149. }
  150. MIPS_MACHINE(ATH79_MACH_A60, "A60", "OpenMesh A60", a60_setup);