mach-dap-2695-a1.c 5.1 KB

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  1. /*
  2. * D-Link DAP-2695 rev. A1 support
  3. *
  4. * Copyright (c) 2012 Qualcomm Atheros
  5. * Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
  6. * Copyright (c) 2016 Stijn Tintel <stijn@linux-ipv6.be>
  7. *
  8. * Permission to use, copy, modify, and/or distribute this software for any
  9. * purpose with or without fee is hereby granted, provided that the above
  10. * copyright notice and this permission notice appear in all copies.
  11. *
  12. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  13. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  14. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  15. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  16. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  17. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  18. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  19. *
  20. */
  21. #include <linux/mtd/mtd.h>
  22. #include <linux/mtd/partitions.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/ar8216_platform.h>
  25. #include <asm/mach-ath79/ar71xx_regs.h>
  26. #include "common.h"
  27. #include "pci.h"
  28. #include "dev-ap9x-pci.h"
  29. #include "dev-gpio-buttons.h"
  30. #include "dev-eth.h"
  31. #include "dev-leds-gpio.h"
  32. #include "dev-m25p80.h"
  33. #include "dev-spi.h"
  34. #include "dev-wmac.h"
  35. #include "machtypes.h"
  36. #include "nvram.h"
  37. #define DAP2695_GPIO_LED_GREEN_POWER 23
  38. #define DAP2695_GPIO_LED_RED_POWER 14
  39. #define DAP2695_GPIO_LED_WLAN_2G 13
  40. #define DAP2695_GPIO_BTN_RESET 17
  41. #define DAP2695_KEYS_POLL_INTERVAL 20 /* msecs */
  42. #define DAP2695_KEYS_DEBOUNCE_INTERVAL (3 * DAP2695_KEYS_POLL_INTERVAL)
  43. #define DAP2695_NVRAM_ADDR 0x1f040000
  44. #define DAP2695_NVRAM_SIZE 0x10000
  45. #define DAP2695_MAC0_OFFSET 1
  46. #define DAP2695_MAC1_OFFSET 2
  47. #define DAP2695_WMAC_CALDATA_OFFSET 0x1000
  48. static struct gpio_led dap2695_leds_gpio[] __initdata = {
  49. {
  50. .name = "d-link:green:power",
  51. .gpio = DAP2695_GPIO_LED_GREEN_POWER,
  52. .active_low = 1,
  53. },
  54. {
  55. .name = "d-link:red:power",
  56. .gpio = DAP2695_GPIO_LED_RED_POWER,
  57. .active_low = 1,
  58. },
  59. {
  60. .name = "d-link:green:wlan2g",
  61. .gpio = DAP2695_GPIO_LED_WLAN_2G,
  62. .active_low = 1,
  63. },
  64. };
  65. static struct gpio_keys_button dap2695_gpio_keys[] __initdata = {
  66. {
  67. .desc = "Soft reset",
  68. .type = EV_KEY,
  69. .code = KEY_RESTART,
  70. .debounce_interval = DAP2695_KEYS_DEBOUNCE_INTERVAL,
  71. .gpio = DAP2695_GPIO_BTN_RESET,
  72. .active_low = 1,
  73. },
  74. };
  75. static struct ar8327_pad_cfg dap2695_ar8327_pad0_cfg = {
  76. .mode = AR8327_PAD_MAC_RGMII,
  77. .txclk_delay_en = true,
  78. .rxclk_delay_en = true,
  79. .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
  80. .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
  81. .mac06_exchange_dis = true,
  82. };
  83. static struct ar8327_pad_cfg dap2695_ar8327_pad6_cfg = {
  84. .mode = AR8327_PAD_MAC_SGMII,
  85. .sgmii_delay_en = true,
  86. };
  87. static struct ar8327_platform_data dap2695_ar8327_data = {
  88. .pad0_cfg = &dap2695_ar8327_pad0_cfg,
  89. .pad6_cfg = &dap2695_ar8327_pad6_cfg,
  90. .port0_cfg = {
  91. .force_link = 1,
  92. .speed = AR8327_PORT_SPEED_1000,
  93. .duplex = 1,
  94. .txpause = 1,
  95. .rxpause = 1,
  96. },
  97. .port6_cfg = {
  98. .force_link = 1,
  99. .speed = AR8327_PORT_SPEED_1000,
  100. .duplex = 1,
  101. .txpause = 1,
  102. .rxpause = 1,
  103. },
  104. };
  105. static struct mdio_board_info dap2695_mdio0_info[] = {
  106. {
  107. .bus_id = "ag71xx-mdio.0",
  108. .phy_addr = 0,
  109. .platform_data = &dap2695_ar8327_data,
  110. },
  111. };
  112. static struct flash_platform_data dap2695_flash_data = {
  113. .type = "mx25l12805d",
  114. };
  115. static void dap2695_get_mac(const char *name, char *mac)
  116. {
  117. u8 *nvram = (u8 *) KSEG1ADDR(DAP2695_NVRAM_ADDR);
  118. int err;
  119. err = ath79_nvram_parse_mac_addr(nvram, DAP2695_NVRAM_SIZE,
  120. name, mac);
  121. if (err)
  122. pr_err("no MAC address found for %s\n", name);
  123. }
  124. static void __init dap2695_setup(void)
  125. {
  126. u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
  127. u8 mac0[ETH_ALEN], mac1[ETH_ALEN], wmac0[ETH_ALEN];
  128. dap2695_get_mac("lanmac=", mac0);
  129. dap2695_get_mac("wanmac=", mac1);
  130. dap2695_get_mac("wlanmac=", wmac0);
  131. ath79_register_m25p80(&dap2695_flash_data);
  132. ath79_register_leds_gpio(-1, ARRAY_SIZE(dap2695_leds_gpio),
  133. dap2695_leds_gpio);
  134. ath79_register_gpio_keys_polled(-1, DAP2695_KEYS_POLL_INTERVAL,
  135. ARRAY_SIZE(dap2695_gpio_keys),
  136. dap2695_gpio_keys);
  137. ath79_register_wmac(art + DAP2695_WMAC_CALDATA_OFFSET, wmac0);
  138. ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
  139. ath79_register_mdio(0, 0x0);
  140. mdiobus_register_board_info(dap2695_mdio0_info,
  141. ARRAY_SIZE(dap2695_mdio0_info));
  142. /* GMAC0 is connected to the RGMII interface */
  143. ath79_init_mac(ath79_eth0_data.mac_addr, mac0, DAP2695_MAC0_OFFSET);
  144. ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
  145. ath79_eth0_data.phy_mask = BIT(0);
  146. ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
  147. ath79_eth0_pll_data.pll_1000 = 0x56000000;
  148. ath79_register_eth(0);
  149. /* GMAC1 is connected to the SGMII interface */
  150. ath79_init_mac(ath79_eth1_data.mac_addr, mac1, DAP2695_MAC1_OFFSET);
  151. ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
  152. ath79_eth1_data.speed = SPEED_1000;
  153. ath79_eth1_data.duplex = DUPLEX_FULL;
  154. ath79_eth1_pll_data.pll_1000 = 0x03000101;
  155. ath79_register_eth(1);
  156. ath79_register_pci();
  157. }
  158. MIPS_MACHINE(ATH79_MACH_DAP_2695_A1, "DAP-2695-A1",
  159. "D-Link DAP-2695 rev. A1",
  160. dap2695_setup);