mach-dir-600-a1.c 4.1 KB

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  1. /*
  2. * D-Link DIR-600 rev. A1 board support
  3. *
  4. * Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
  5. * Copyright (C) 2012 Vadim Girlin <vadimgirlin@gmail.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published
  9. * by the Free Software Foundation.
  10. */
  11. #include <asm/mach-ath79/ath79.h>
  12. #include <asm/mach-ath79/ar71xx_regs.h>
  13. #include "common.h"
  14. #include "dev-ap9x-pci.h"
  15. #include "dev-eth.h"
  16. #include "dev-gpio-buttons.h"
  17. #include "dev-leds-gpio.h"
  18. #include "dev-m25p80.h"
  19. #include "machtypes.h"
  20. #include "nvram.h"
  21. #define DIR_600_A1_GPIO_LED_WPS 0
  22. #define DIR_600_A1_GPIO_LED_POWER_AMBER 1
  23. #define DIR_600_A1_GPIO_LED_POWER_GREEN 6
  24. #define DIR_600_A1_GPIO_LED_LAN1 13
  25. #define DIR_600_A1_GPIO_LED_LAN2 14
  26. #define DIR_600_A1_GPIO_LED_LAN3 15
  27. #define DIR_600_A1_GPIO_LED_LAN4 16
  28. #define DIR_600_A1_GPIO_LED_WAN_AMBER 7
  29. #define DIR_600_A1_GPIO_LED_WAN_GREEN 17
  30. #define DIR_600_A1_GPIO_BTN_RESET 8
  31. #define DIR_600_A1_GPIO_BTN_WPS 12
  32. #define DIR_600_A1_KEYS_POLL_INTERVAL 20 /* msecs */
  33. #define DIR_600_A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_600_A1_KEYS_POLL_INTERVAL)
  34. #define DIR_600_A1_NVRAM_ADDR 0x1f030000
  35. #define DIR_600_A1_NVRAM_SIZE 0x10000
  36. static struct gpio_led dir_600_a1_leds_gpio[] __initdata = {
  37. {
  38. .name = "d-link:green:power",
  39. .gpio = DIR_600_A1_GPIO_LED_POWER_GREEN,
  40. }, {
  41. .name = "d-link:amber:power",
  42. .gpio = DIR_600_A1_GPIO_LED_POWER_AMBER,
  43. }, {
  44. .name = "d-link:amber:wan",
  45. .gpio = DIR_600_A1_GPIO_LED_WAN_AMBER,
  46. }, {
  47. .name = "d-link:green:wan",
  48. .gpio = DIR_600_A1_GPIO_LED_WAN_GREEN,
  49. .active_low = 1,
  50. }, {
  51. .name = "d-link:green:lan1",
  52. .gpio = DIR_600_A1_GPIO_LED_LAN1,
  53. .active_low = 1,
  54. }, {
  55. .name = "d-link:green:lan2",
  56. .gpio = DIR_600_A1_GPIO_LED_LAN2,
  57. .active_low = 1,
  58. }, {
  59. .name = "d-link:green:lan3",
  60. .gpio = DIR_600_A1_GPIO_LED_LAN3,
  61. .active_low = 1,
  62. }, {
  63. .name = "d-link:green:lan4",
  64. .gpio = DIR_600_A1_GPIO_LED_LAN4,
  65. .active_low = 1,
  66. }, {
  67. .name = "d-link:blue:wps",
  68. .gpio = DIR_600_A1_GPIO_LED_WPS,
  69. .active_low = 1,
  70. }
  71. };
  72. static struct gpio_keys_button dir_600_a1_gpio_keys[] __initdata = {
  73. {
  74. .desc = "reset",
  75. .type = EV_KEY,
  76. .code = KEY_RESTART,
  77. .debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL,
  78. .gpio = DIR_600_A1_GPIO_BTN_RESET,
  79. .active_low = 1,
  80. }, {
  81. .desc = "wps",
  82. .type = EV_KEY,
  83. .code = KEY_WPS_BUTTON,
  84. .debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL,
  85. .gpio = DIR_600_A1_GPIO_BTN_WPS,
  86. .active_low = 1,
  87. }
  88. };
  89. static void __init dir_600_a1_setup(void)
  90. {
  91. const char *nvram = (char *) KSEG1ADDR(DIR_600_A1_NVRAM_ADDR);
  92. u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
  93. u8 mac_buff[6];
  94. u8 *mac = NULL;
  95. if (ath79_nvram_parse_mac_addr(nvram, DIR_600_A1_NVRAM_SIZE,
  96. "lan_mac=", mac_buff) == 0) {
  97. ath79_init_mac(ath79_eth0_data.mac_addr, mac_buff, 0);
  98. ath79_init_mac(ath79_eth1_data.mac_addr, mac_buff, 1);
  99. mac = mac_buff;
  100. }
  101. ath79_register_m25p80(NULL);
  102. ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
  103. AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
  104. AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
  105. AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
  106. AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
  107. ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_600_a1_leds_gpio),
  108. dir_600_a1_leds_gpio);
  109. ath79_register_gpio_keys_polled(-1, DIR_600_A1_KEYS_POLL_INTERVAL,
  110. ARRAY_SIZE(dir_600_a1_gpio_keys),
  111. dir_600_a1_gpio_keys);
  112. ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
  113. ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
  114. ath79_register_mdio(0, 0x0);
  115. /* LAN ports */
  116. ath79_register_eth(1);
  117. /* WAN port */
  118. ath79_register_eth(0);
  119. ap91_pci_init(ee, mac);
  120. }
  121. MIPS_MACHINE(ATH79_MACH_DIR_600_A1, "DIR-600-A1", "D-Link DIR-600 rev. A1",
  122. dir_600_a1_setup);
  123. static void __init dir_615_e1_setup(void)
  124. {
  125. dir_600_a1_setup();
  126. }
  127. MIPS_MACHINE(ATH79_MACH_DIR_615_E1, "DIR-615-E1", "D-Link DIR-615 rev. E1",
  128. dir_615_e1_setup);
  129. static void __init dir_615_e4_setup(void)
  130. {
  131. dir_600_a1_setup();
  132. ap9x_pci_setup_wmac_led_pin(0, 1);
  133. }
  134. MIPS_MACHINE(ATH79_MACH_DIR_615_E4, "DIR-615-E4", "D-Link DIR-615 rev. E4",
  135. dir_615_e4_setup);