mach-esr900.c 5.2 KB

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  1. /*
  2. * EnGenius ESR900 board support
  3. *
  4. * Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org>
  5. * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published
  9. * by the Free Software Foundation.
  10. */
  11. #define pr_fmt(fmt) "esr900: " fmt
  12. #include <linux/platform_device.h>
  13. #include <linux/ar8216_platform.h>
  14. #include <asm/mach-ath79/ar71xx_regs.h>
  15. #include "common.h"
  16. #include "pci.h"
  17. #include "dev-ap9x-pci.h"
  18. #include "dev-gpio-buttons.h"
  19. #include "dev-eth.h"
  20. #include "dev-leds-gpio.h"
  21. #include "dev-m25p80.h"
  22. #include "dev-usb.h"
  23. #include "dev-wmac.h"
  24. #include "machtypes.h"
  25. #include "nvram.h"
  26. #define ESR900_GPIO_LED_POWER 2
  27. #define ESR900_GPIO_LED_WLAN_2G 13
  28. #define ESR900_GPIO_LED_WPS_BLUE 19
  29. #define ESR900_GPIO_LED_WPS_AMBER 22
  30. #define ESR900_GPIO_LED_WLAN_5G 23
  31. #define ESR900_GPIO_BTN_WPS 16
  32. #define ESR900_GPIO_BTN_RESET 17
  33. #define ESR900_KEYS_POLL_INTERVAL 20 /* msecs */
  34. #define ESR900_KEYS_DEBOUNCE_INTERVAL (3 * ESR900_KEYS_POLL_INTERVAL)
  35. #define ESR900_CALDATA_ADDR 0x1fff0000
  36. #define ESR900_WMAC_CALDATA_OFFSET 0x1000
  37. #define ESR900_PCIE_CALDATA_OFFSET 0x5000
  38. #define ESR900_CONFIG_ADDR 0x1f030000
  39. #define ESR900_CONFIG_SIZE 0x10000
  40. #define ESR900_LAN_PHYMASK BIT(0)
  41. #define ESR900_WAN_PHYMASK BIT(5)
  42. #define ESR900_MDIO_MASK (~(ESR900_LAN_PHYMASK | ESR900_WAN_PHYMASK))
  43. static struct gpio_led esr900_leds_gpio[] __initdata = {
  44. {
  45. .name = "engenius:amber:power",
  46. .gpio = ESR900_GPIO_LED_POWER,
  47. .active_low = 1,
  48. },
  49. {
  50. .name = "engenius:blue:wlan-2g",
  51. .gpio = ESR900_GPIO_LED_WLAN_2G,
  52. .active_low = 1,
  53. },
  54. {
  55. .name = "engenius:blue:wps",
  56. .gpio = ESR900_GPIO_LED_WPS_BLUE,
  57. .active_low = 1,
  58. },
  59. {
  60. .name = "engenius:amber:wps",
  61. .gpio = ESR900_GPIO_LED_WPS_AMBER,
  62. .active_low = 1,
  63. },
  64. {
  65. .name = "engenius:blue:wlan-5g",
  66. .gpio = ESR900_GPIO_LED_WLAN_5G,
  67. .active_low = 1,
  68. }
  69. };
  70. static struct gpio_keys_button esr900_gpio_keys[] __initdata = {
  71. {
  72. .desc = "WPS button",
  73. .type = EV_KEY,
  74. .code = KEY_WPS_BUTTON,
  75. .debounce_interval = ESR900_KEYS_DEBOUNCE_INTERVAL,
  76. .gpio = ESR900_GPIO_BTN_WPS,
  77. .active_low = 1,
  78. },
  79. {
  80. .desc = "Reset button",
  81. .type = EV_KEY,
  82. .code = KEY_RESTART,
  83. .debounce_interval = ESR900_KEYS_DEBOUNCE_INTERVAL,
  84. .gpio = ESR900_GPIO_BTN_RESET,
  85. .active_low = 1,
  86. },
  87. };
  88. static struct ar8327_pad_cfg esr900_ar8327_pad0_cfg = {
  89. /* GMAC0 of the AR8337 switch is connected to GMAC0 via RGMII */
  90. .mode = AR8327_PAD_MAC_RGMII,
  91. .txclk_delay_en = true,
  92. .rxclk_delay_en = true,
  93. .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
  94. .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
  95. };
  96. static struct ar8327_pad_cfg esr900_ar8327_pad6_cfg = {
  97. /* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */
  98. .mode = AR8327_PAD_MAC_SGMII,
  99. .rxclk_delay_en = true,
  100. .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0,
  101. };
  102. static struct ar8327_platform_data esr900_ar8327_data = {
  103. .pad0_cfg = &esr900_ar8327_pad0_cfg,
  104. .pad6_cfg = &esr900_ar8327_pad6_cfg,
  105. .port0_cfg = {
  106. .force_link = 1,
  107. .speed = AR8327_PORT_SPEED_1000,
  108. .duplex = 1,
  109. .txpause = 1,
  110. .rxpause = 1,
  111. },
  112. .port6_cfg = {
  113. .force_link = 1,
  114. .speed = AR8327_PORT_SPEED_1000,
  115. .duplex = 1,
  116. .txpause = 1,
  117. .rxpause = 1,
  118. },
  119. };
  120. static struct mdio_board_info esr900_mdio0_info[] = {
  121. {
  122. .bus_id = "ag71xx-mdio.0",
  123. .phy_addr = 0,
  124. .platform_data = &esr900_ar8327_data,
  125. },
  126. };
  127. static void __init esr900_setup(void)
  128. {
  129. const char *config = (char *) KSEG1ADDR(ESR900_CONFIG_ADDR);
  130. u8 *art = (u8 *) KSEG1ADDR(ESR900_CALDATA_ADDR);
  131. u8 lan_mac[ETH_ALEN];
  132. u8 wlan0_mac[ETH_ALEN];
  133. u8 wlan1_mac[ETH_ALEN];
  134. if (ath79_nvram_parse_mac_addr(config, ESR900_CONFIG_SIZE,
  135. "ethaddr=", lan_mac) == 0) {
  136. ath79_init_local_mac(ath79_eth0_data.mac_addr, lan_mac);
  137. ath79_init_mac(wlan0_mac, lan_mac, 0);
  138. ath79_init_mac(wlan1_mac, lan_mac, 1);
  139. } else {
  140. pr_err("could not find ethaddr in u-boot environment\n");
  141. }
  142. ath79_register_m25p80(NULL);
  143. ath79_register_leds_gpio(-1, ARRAY_SIZE(esr900_leds_gpio),
  144. esr900_leds_gpio);
  145. ath79_register_gpio_keys_polled(-1, ESR900_KEYS_POLL_INTERVAL,
  146. ARRAY_SIZE(esr900_gpio_keys),
  147. esr900_gpio_keys);
  148. ath79_register_usb();
  149. ath79_register_wmac(art + ESR900_WMAC_CALDATA_OFFSET, wlan0_mac);
  150. ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
  151. ath79_register_mdio(0, 0x0);
  152. mdiobus_register_board_info(esr900_mdio0_info,
  153. ARRAY_SIZE(esr900_mdio0_info));
  154. /* GMAC0 is connected to the RMGII interface */
  155. ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
  156. ath79_eth0_data.phy_mask = ESR900_LAN_PHYMASK;
  157. ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
  158. ath79_eth0_pll_data.pll_1000 = 0xa6000000;
  159. ath79_register_eth(0);
  160. /* GMAC1 is connected to the SGMII interface */
  161. ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
  162. ath79_eth1_data.speed = SPEED_1000;
  163. ath79_eth1_data.duplex = DUPLEX_FULL;
  164. ath79_eth1_pll_data.pll_1000 = 0x03000101;
  165. ath79_register_eth(1);
  166. ap91_pci_init(art + ESR900_PCIE_CALDATA_OFFSET, wlan1_mac);
  167. }
  168. MIPS_MACHINE(ATH79_MACH_ESR900, "ESR900", "EnGenius ESR900", esr900_setup);