mach-tl-wdr3500.c 4.4 KB

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  1. /*
  2. * TP-LINK TL-WDR3500 board support
  3. *
  4. * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
  5. * Copyright (C) 2013 Gui Iribarren <gui@altermundi.net>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published
  9. * by the Free Software Foundation.
  10. */
  11. #include <linux/pci.h>
  12. #include <linux/phy.h>
  13. #include <linux/gpio.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/ath9k_platform.h>
  16. #include <linux/ar8216_platform.h>
  17. #include <asm/mach-ath79/ar71xx_regs.h>
  18. #include "common.h"
  19. #include "dev-ap9x-pci.h"
  20. #include "dev-eth.h"
  21. #include "dev-gpio-buttons.h"
  22. #include "dev-leds-gpio.h"
  23. #include "dev-m25p80.h"
  24. #include "dev-spi.h"
  25. #include "dev-usb.h"
  26. #include "dev-wmac.h"
  27. #include "machtypes.h"
  28. #define WDR3500_GPIO_LED_USB 11
  29. #define WDR3500_GPIO_LED_WLAN2G 13
  30. #define WDR3500_GPIO_LED_SYSTEM 14
  31. #define WDR3500_GPIO_LED_QSS 15
  32. #define WDR3500_GPIO_LED_WAN 18
  33. #define WDR3500_GPIO_LED_LAN1 19
  34. #define WDR3500_GPIO_LED_LAN2 20
  35. #define WDR3500_GPIO_LED_LAN3 21
  36. #define WDR3500_GPIO_LED_LAN4 22
  37. #define WDR3500_GPIO_BTN_WPS 16
  38. #define WDR3500_GPIO_BTN_RFKILL 17
  39. #define WDR3500_GPIO_USB_POWER 12
  40. #define WDR3500_KEYS_POLL_INTERVAL 20 /* msecs */
  41. #define WDR3500_KEYS_DEBOUNCE_INTERVAL (3 * WDR3500_KEYS_POLL_INTERVAL)
  42. #define WDR3500_MAC0_OFFSET 0
  43. #define WDR3500_MAC1_OFFSET 6
  44. #define WDR3500_WMAC_CALDATA_OFFSET 0x1000
  45. #define WDR3500_PCIE_CALDATA_OFFSET 0x5000
  46. static const char *wdr3500_part_probes[] = {
  47. "tp-link",
  48. NULL,
  49. };
  50. static struct flash_platform_data wdr3500_flash_data = {
  51. .part_probes = wdr3500_part_probes,
  52. };
  53. static struct gpio_led wdr3500_leds_gpio[] __initdata = {
  54. {
  55. .name = "tp-link:green:qss",
  56. .gpio = WDR3500_GPIO_LED_QSS,
  57. .active_low = 1,
  58. },
  59. {
  60. .name = "tp-link:green:system",
  61. .gpio = WDR3500_GPIO_LED_SYSTEM,
  62. .active_low = 1,
  63. },
  64. {
  65. .name = "tp-link:green:usb",
  66. .gpio = WDR3500_GPIO_LED_USB,
  67. .active_low = 1,
  68. },
  69. {
  70. .name = "tp-link:green:wlan2g",
  71. .gpio = WDR3500_GPIO_LED_WLAN2G,
  72. .active_low = 1,
  73. },
  74. };
  75. static struct gpio_keys_button wdr3500_gpio_keys[] __initdata = {
  76. {
  77. .desc = "QSS button",
  78. .type = EV_KEY,
  79. .code = KEY_WPS_BUTTON,
  80. .debounce_interval = WDR3500_KEYS_DEBOUNCE_INTERVAL,
  81. .gpio = WDR3500_GPIO_BTN_WPS,
  82. .active_low = 1,
  83. },
  84. {
  85. .desc = "RFKILL switch",
  86. .type = EV_SW,
  87. .code = KEY_RFKILL,
  88. .debounce_interval = WDR3500_KEYS_DEBOUNCE_INTERVAL,
  89. .gpio = WDR3500_GPIO_BTN_RFKILL,
  90. },
  91. };
  92. static void __init wdr3500_setup(void)
  93. {
  94. u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
  95. u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
  96. u8 tmpmac[ETH_ALEN];
  97. ath79_register_m25p80(&wdr3500_flash_data);
  98. ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr3500_leds_gpio),
  99. wdr3500_leds_gpio);
  100. ath79_register_gpio_keys_polled(-1, WDR3500_KEYS_POLL_INTERVAL,
  101. ARRAY_SIZE(wdr3500_gpio_keys),
  102. wdr3500_gpio_keys);
  103. ath79_init_mac(tmpmac, mac, 0);
  104. ath79_register_wmac(art + WDR3500_WMAC_CALDATA_OFFSET, tmpmac);
  105. ath79_init_mac(tmpmac, mac, 1);
  106. ap9x_pci_setup_wmac_led_pin(0, 0);
  107. ap91_pci_init(art + WDR3500_PCIE_CALDATA_OFFSET, tmpmac);
  108. ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE);
  109. ath79_register_mdio(1, 0x0);
  110. /* LAN */
  111. ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);
  112. /* GMAC1 is connected to the internal switch */
  113. ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
  114. ath79_register_eth(1);
  115. /* WAN */
  116. ath79_init_mac(ath79_eth0_data.mac_addr, mac, 2);
  117. /* GMAC0 is connected to the PHY4 of the internal switch */
  118. ath79_switch_data.phy4_mii_en = 1;
  119. ath79_switch_data.phy_poll_mask = BIT(4);
  120. ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
  121. ath79_eth0_data.phy_mask = BIT(4);
  122. ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
  123. ath79_register_eth(0);
  124. gpio_request_one(WDR3500_GPIO_USB_POWER,
  125. GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
  126. "USB power");
  127. ath79_register_usb();
  128. ath79_gpio_output_select(WDR3500_GPIO_LED_LAN1,
  129. AR934X_GPIO_OUT_LED_LINK3);
  130. ath79_gpio_output_select(WDR3500_GPIO_LED_LAN2,
  131. AR934X_GPIO_OUT_LED_LINK2);
  132. ath79_gpio_output_select(WDR3500_GPIO_LED_LAN3,
  133. AR934X_GPIO_OUT_LED_LINK1);
  134. ath79_gpio_output_select(WDR3500_GPIO_LED_LAN4,
  135. AR934X_GPIO_OUT_LED_LINK0);
  136. ath79_gpio_output_select(WDR3500_GPIO_LED_WAN,
  137. AR934X_GPIO_OUT_LED_LINK4);
  138. }
  139. MIPS_MACHINE(ATH79_MACH_TL_WDR3500, "TL-WDR3500",
  140. "TP-LINK TL-WDR3500",
  141. wdr3500_setup);