DIR-645.dts 2.0 KB

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  1. /dts-v1/;
  2. #include "rt3883.dtsi"
  3. #include <dt-bindings/input/input.h>
  4. / {
  5. compatible = "DIR-645", "ralink,rt3883-soc";
  6. model = "D-Link DIR-645";
  7. rtl8367b {
  8. compatible = "realtek,rtl8367b";
  9. gpio-sda = <&gpio0 1 0>;
  10. gpio-sck = <&gpio0 2 0>;
  11. realtek,extif1 = <1 0 1 1 1 1 1 1 2>;
  12. };
  13. gpio-keys-polled {
  14. compatible = "gpio-keys-polled";
  15. #address-cells = <1>;
  16. #size-cells = <0>;
  17. poll-interval = <100>;
  18. reset {
  19. label = "reset";
  20. gpios = <&gpio0 9 0>;
  21. linux,code = <KEY_RESTART>;
  22. };
  23. wps {
  24. label = "wps";
  25. gpios = <&gpio0 14 0>;
  26. linux,code = <KEY_WPS_BUTTON>;
  27. };
  28. };
  29. gpio-leds {
  30. compatible = "gpio-leds";
  31. inet {
  32. label = "dir-645:green:inet";
  33. gpios = <&gpio0 0 1>;
  34. };
  35. wps {
  36. label = "dir-645:green:wps";
  37. gpios = <&gpio1 2 0>;
  38. };
  39. };
  40. gpio_export {
  41. compatible = "gpio-export";
  42. #size-cells = <0>;
  43. usb {
  44. gpio-export,name = "usb";
  45. gpio-export,output = <1>;
  46. gpios = <&gpio1 6 0>;
  47. };
  48. };
  49. };
  50. &gpio1 {
  51. status = "okay";
  52. };
  53. &spi0 {
  54. status = "okay";
  55. m25p80@0 {
  56. #address-cells = <1>;
  57. #size-cells = <1>;
  58. compatible = "jedec,spi-nor";
  59. reg = <0>;
  60. spi-max-frequency = <25000000>;
  61. partition@0 {
  62. label = "uboot";
  63. reg = <0x0 0x30000>;
  64. read-only;
  65. };
  66. partition@30000 {
  67. label = "uboot-env";
  68. reg = <0x30000 0x4000>;
  69. read-only;
  70. };
  71. factory: partition@34000 {
  72. label = "factory";
  73. reg = <0x34000 0x4000>;
  74. read-only;
  75. };
  76. partition@38000 {
  77. label = "nvram";
  78. reg = <0x38000 0x8000>;
  79. read-only;
  80. };
  81. partition@40000 {
  82. label = "devdata";
  83. reg = <0x40000 0x10000>;
  84. };
  85. partition@50000 {
  86. label = "firmware";
  87. reg = <0x50000 0x7b0000>;
  88. };
  89. };
  90. };
  91. &pinctrl {
  92. state_default: pinctrl0 {
  93. gpio {
  94. ralink,group = "i2c", "jtag", "uartf";
  95. ralink,function = "gpio";
  96. };
  97. };
  98. };
  99. &ethernet {
  100. mtd-mac-address = <&factory 0x4>;
  101. port@0 {
  102. mediatek,fixed-link = <1000 1 1 0>;
  103. };
  104. };
  105. &wmac {
  106. ralink,5ghz = <0>;
  107. ralink,mtd-eeprom = <&factory 0>;
  108. };
  109. &ehci {
  110. status = "okay";
  111. };
  112. &ohci {
  113. status = "okay";
  114. };