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MT7620a_MT7610e.dts 1.2 KB

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  1. /dts-v1/;
  2. #include "mt7620a.dtsi"
  3. #include <dt-bindings/input/input.h>
  4. / {
  5. compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
  6. model = "Ralink MT7620A evaluation board";
  7. gpio-keys-polled {
  8. compatible = "gpio-keys";
  9. #address-cells = <1>;
  10. #size-cells = <0>;
  11. poll-interval = <20>;
  12. wps {
  13. label = "wps";
  14. gpios = <&gpio0 12 1>;
  15. linux,code = <BTN_0>;
  16. };
  17. reset {
  18. label = "reset";
  19. gpios = <&gpio0 13 1>;
  20. linux,code = <BTN_1>;
  21. };
  22. };
  23. };
  24. &gpio0 {
  25. status = "okay";
  26. };
  27. &spi0 {
  28. status = "okay";
  29. m25p80@0 {
  30. #address-cells = <1>;
  31. #size-cells = <1>;
  32. compatible = "jedec,spi-nor";
  33. reg = <0>;
  34. spi-max-frequency = <1000000>;
  35. partition@0 {
  36. label = "u-boot";
  37. reg = <0x0 0x30000>;
  38. read-only;
  39. };
  40. partition@30000 {
  41. label = "u-boot-env";
  42. reg = <0x30000 0x10000>;
  43. read-only;
  44. };
  45. factory: partition@40000 {
  46. label = "factory";
  47. reg = <0x40000 0x10000>;
  48. read-only;
  49. };
  50. partition@50000 {
  51. label = "firmware";
  52. reg = <0x50000 0x7b0000>;
  53. };
  54. };
  55. };
  56. &ethernet {
  57. status = "okay";
  58. pinctrl-names = "default";
  59. pinctrl-0 = <&ephy_pins>;
  60. mediatek,portmap = "llllw";
  61. };
  62. &gsw {
  63. mediatek,port4 = "ephy";
  64. };
  65. &sdhci {
  66. status = "okay";
  67. };
  68. &pcie {
  69. status = "okay";
  70. };