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mt7620n.dtsi 6.1 KB

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  1. / {
  2. #address-cells = <1>;
  3. #size-cells = <1>;
  4. compatible = "ralink,mtk7620n-soc";
  5. cpus {
  6. cpu@0 {
  7. compatible = "mips,mips24KEc";
  8. };
  9. };
  10. chosen {
  11. bootargs = "console=ttyS0,57600";
  12. };
  13. cpuintc: cpuintc@0 {
  14. #address-cells = <0>;
  15. #interrupt-cells = <1>;
  16. interrupt-controller;
  17. compatible = "mti,cpu-interrupt-controller";
  18. };
  19. aliases {
  20. spi0 = &spi0;
  21. spi1 = &spi1;
  22. serial0 = &uartlite;
  23. };
  24. palmbus: palmbus@10000000 {
  25. compatible = "palmbus";
  26. reg = <0x10000000 0x200000>;
  27. ranges = <0x0 0x10000000 0x1FFFFF>;
  28. #address-cells = <1>;
  29. #size-cells = <1>;
  30. sysc: sysc@0 {
  31. compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc";
  32. reg = <0x0 0x100>;
  33. };
  34. timer: timer@100 {
  35. compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
  36. reg = <0x100 0x20>;
  37. interrupt-parent = <&intc>;
  38. interrupts = <1>;
  39. };
  40. watchdog: watchdog@120 {
  41. compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
  42. reg = <0x120 0x10>;
  43. resets = <&rstctrl 8>;
  44. reset-names = "wdt";
  45. interrupt-parent = <&intc>;
  46. interrupts = <1>;
  47. };
  48. intc: intc@200 {
  49. compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
  50. reg = <0x200 0x100>;
  51. resets = <&rstctrl 19>;
  52. reset-names = "intc";
  53. interrupt-controller;
  54. #interrupt-cells = <1>;
  55. interrupt-parent = <&cpuintc>;
  56. interrupts = <2>;
  57. };
  58. memc: memc@300 {
  59. compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
  60. reg = <0x300 0x100>;
  61. resets = <&rstctrl 20>;
  62. reset-names = "mc";
  63. interrupt-parent = <&intc>;
  64. interrupts = <3>;
  65. };
  66. gpio0: gpio@600 {
  67. compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
  68. reg = <0x600 0x34>;
  69. resets = <&rstctrl 13>;
  70. reset-names = "pio";
  71. interrupt-parent = <&intc>;
  72. interrupts = <6>;
  73. gpio-controller;
  74. #gpio-cells = <2>;
  75. ralink,gpio-base = <0>;
  76. ralink,num-gpios = <24>;
  77. ralink,register-map = [ 00 04 08 0c
  78. 20 24 28 2c
  79. 30 34 ];
  80. };
  81. gpio1: gpio@638 {
  82. compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
  83. reg = <0x638 0x24>;
  84. interrupt-parent = <&intc>;
  85. interrupts = <6>;
  86. gpio-controller;
  87. #gpio-cells = <2>;
  88. ralink,gpio-base = <24>;
  89. ralink,num-gpios = <16>;
  90. ralink,register-map = [ 00 04 08 0c
  91. 10 14 18 1c
  92. 20 24 ];
  93. status = "disabled";
  94. };
  95. gpio2: gpio@660 {
  96. compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
  97. reg = <0x660 0x24>;
  98. interrupt-parent = <&intc>;
  99. interrupts = <6>;
  100. gpio-controller;
  101. #gpio-cells = <2>;
  102. ralink,gpio-base = <40>;
  103. ralink,num-gpios = <32>;
  104. ralink,register-map = [ 00 04 08 0c
  105. 10 14 18 1c
  106. 20 24 ];
  107. status = "disabled";
  108. };
  109. gpio3: gpio@688 {
  110. compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
  111. reg = <0x688 0x24>;
  112. interrupt-parent = <&intc>;
  113. interrupts = <6>;
  114. gpio-controller;
  115. #gpio-cells = <2>;
  116. ralink,gpio-base = <72>;
  117. ralink,num-gpios = <1>;
  118. ralink,register-map = [ 00 04 08 0c
  119. 10 14 18 1c
  120. 20 24 ];
  121. status = "disabled";
  122. };
  123. spi0: spi@b00 {
  124. compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
  125. reg = <0xb00 0x40>;
  126. resets = <&rstctrl 18>;
  127. reset-names = "spi";
  128. #address-cells = <1>;
  129. #size-cells = <0>;
  130. status = "disabled";
  131. pinctrl-names = "default";
  132. pinctrl-0 = <&spi_pins>;
  133. };
  134. spi1: spi@b40 {
  135. compatible = "ralink,rt2880-spi";
  136. reg = <0xb40 0x60>;
  137. resets = <&rstctrl 18>;
  138. reset-names = "spi";
  139. #address-cells = <1>;
  140. #size-cells = <0>;
  141. status = "disabled";
  142. pinctrl-names = "default";
  143. pinctrl-0 = <&spi_cs1>;
  144. };
  145. uartlite: uartlite@c00 {
  146. compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
  147. reg = <0xc00 0x100>;
  148. resets = <&rstctrl 19>;
  149. reset-names = "uartl";
  150. interrupt-parent = <&intc>;
  151. interrupts = <12>;
  152. reg-shift = <2>;
  153. pinctrl-names = "default";
  154. pinctrl-0 = <&uartlite_pins>;
  155. };
  156. systick: systick@d00 {
  157. compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
  158. reg = <0xd00 0x10>;
  159. resets = <&rstctrl 28>;
  160. reset-names = "intc";
  161. interrupt-parent = <&cpuintc>;
  162. interrupts = <7>;
  163. };
  164. };
  165. pinctrl: pinctrl {
  166. compatible = "ralink,rt2880-pinmux";
  167. pinctrl-names = "default";
  168. pinctrl-0 = <&state_default>;
  169. state_default: pinctrl0 {
  170. };
  171. spi_pins: spi {
  172. spi {
  173. ralink,group = "spi";
  174. ralink,function = "spi";
  175. };
  176. };
  177. spi_cs1: spi1 {
  178. spi1 {
  179. ralink,group = "spi_cs1";
  180. ralink,function = "spi_cs1";
  181. };
  182. };
  183. uartlite_pins: uartlite {
  184. uart {
  185. ralink,group = "uartlite";
  186. ralink,function = "uartlite";
  187. };
  188. };
  189. };
  190. rstctrl: rstctrl {
  191. compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
  192. #reset-cells = <1>;
  193. };
  194. clkctrl: clkctrl {
  195. compatible = "ralink,rt2880-clock";
  196. #clock-cells = <1>;
  197. };
  198. usbphy: usbphy {
  199. compatible = "mediatek,mt7620-usbphy";
  200. #phy-cells = <1>;
  201. resets = <&rstctrl 22 &rstctrl 25>;
  202. reset-names = "host", "device";
  203. clocks = <&clkctrl 22 &clkctrl 25>;
  204. clock-names = "host", "device";
  205. };
  206. ethernet: ethernet@10100000 {
  207. compatible = "mediatek,mt7620-eth";
  208. reg = <0x10100000 0x10000>;
  209. #address-cells = <1>;
  210. #size-cells = <0>;
  211. interrupt-parent = <&cpuintc>;
  212. interrupts = <5>;
  213. resets = <&rstctrl 21 &rstctrl 23>;
  214. reset-names = "fe", "esw";
  215. mediatek,switch = <&gsw>;
  216. mdio-bus {
  217. #address-cells = <1>;
  218. #size-cells = <0>;
  219. status = "disabled";
  220. };
  221. };
  222. gsw: gsw@10110000 {
  223. compatible = "mediatek,mt7620-gsw";
  224. reg = <0x10110000 0x8000>;
  225. resets = <&rstctrl 23>;
  226. reset-names = "esw";
  227. interrupt-parent = <&intc>;
  228. interrupts = <17>;
  229. mediatek,port4 = "gmac";
  230. };
  231. ehci: ehci@101c0000 {
  232. compatible = "generic-ehci";
  233. reg = <0x101c0000 0x1000>;
  234. interrupt-parent = <&intc>;
  235. interrupts = <18>;
  236. phys = <&usbphy 1>;
  237. phy-names = "usb";
  238. status = "disabled";
  239. };
  240. ohci: ohci@101c1000 {
  241. compatible = "generic-ohci";
  242. reg = <0x101c1000 0x1000>;
  243. phys = <&usbphy 1>;
  244. phy-names = "usb";
  245. interrupt-parent = <&intc>;
  246. interrupts = <18>;
  247. status = "disabled";
  248. };
  249. wmac: wmac@10180000 {
  250. compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
  251. reg = <0x10180000 0x40000>;
  252. interrupt-parent = <&cpuintc>;
  253. interrupts = <6>;
  254. ralink,eeprom = "soc_wmac.eeprom";
  255. };
  256. };