0025-pinctrl-ralink-add-pinctrl-driver.patch 13 KB

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  1. From 7adbe9a88c33c6e362a10b109d963b5500a21f00 Mon Sep 17 00:00:00 2001
  2. From: John Crispin <blogic@openwrt.org>
  3. Date: Sun, 27 Jul 2014 09:34:05 +0100
  4. Subject: [PATCH 25/53] pinctrl: ralink: add pinctrl driver
  5. Signed-off-by: John Crispin <blogic@openwrt.org>
  6. ---
  7. arch/mips/Kconfig | 2 +
  8. drivers/pinctrl/Kconfig | 5 +
  9. drivers/pinctrl/Makefile | 1 +
  10. drivers/pinctrl/pinctrl-rt2880.c | 474 ++++++++++++++++++++++++++++++++++++++
  11. 4 files changed, 482 insertions(+)
  12. create mode 100644 drivers/pinctrl/pinctrl-rt2880.c
  13. --- a/arch/mips/Kconfig
  14. +++ b/arch/mips/Kconfig
  15. @@ -586,6 +586,8 @@ config RALINK
  16. select CLKDEV_LOOKUP
  17. select ARCH_HAS_RESET_CONTROLLER
  18. select RESET_CONTROLLER
  19. + select PINCTRL
  20. + select PINCTRL_RT2880
  21. config SGI_IP22
  22. bool "SGI IP22 (Indy/Indigo2)"
  23. --- a/drivers/pinctrl/Kconfig
  24. +++ b/drivers/pinctrl/Kconfig
  25. @@ -115,6 +115,11 @@ config PINCTRL_LPC18XX
  26. help
  27. Pinctrl driver for NXP LPC18xx/43xx System Control Unit (SCU).
  28. +config PINCTRL_RT2880
  29. + bool
  30. + depends on RALINK
  31. + select PINMUX
  32. +
  33. config PINCTRL_FALCON
  34. bool
  35. depends on SOC_FALCON
  36. --- a/drivers/pinctrl/Makefile
  37. +++ b/drivers/pinctrl/Makefile
  38. @@ -20,6 +20,7 @@ obj-$(CONFIG_PINCTRL_MESON) += meson/
  39. obj-$(CONFIG_PINCTRL_PALMAS) += pinctrl-palmas.o
  40. obj-$(CONFIG_PINCTRL_PISTACHIO) += pinctrl-pistachio.o
  41. obj-$(CONFIG_PINCTRL_ROCKCHIP) += pinctrl-rockchip.o
  42. +obj-$(CONFIG_PINCTRL_RT2880) += pinctrl-rt2880.o
  43. obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o
  44. obj-$(CONFIG_PINCTRL_SIRF) += sirf/
  45. obj-$(CONFIG_PINCTRL_TEGRA) += pinctrl-tegra.o
  46. --- /dev/null
  47. +++ b/drivers/pinctrl/pinctrl-rt2880.c
  48. @@ -0,0 +1,472 @@
  49. +/*
  50. + * linux/drivers/pinctrl/pinctrl-rt2880.c
  51. + *
  52. + * This program is free software; you can redistribute it and/or modify
  53. + * it under the terms of the GNU General Public License version 2 as
  54. + * publishhed by the Free Software Foundation.
  55. + *
  56. + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
  57. + */
  58. +
  59. +#include <linux/module.h>
  60. +#include <linux/device.h>
  61. +#include <linux/io.h>
  62. +#include <linux/platform_device.h>
  63. +#include <linux/slab.h>
  64. +#include <linux/of.h>
  65. +#include <linux/pinctrl/pinctrl.h>
  66. +#include <linux/pinctrl/pinconf.h>
  67. +#include <linux/pinctrl/pinmux.h>
  68. +#include <linux/pinctrl/consumer.h>
  69. +#include <linux/pinctrl/machine.h>
  70. +
  71. +#include <asm/mach-ralink/ralink_regs.h>
  72. +#include <asm/mach-ralink/pinmux.h>
  73. +#include <asm/mach-ralink/mt7620.h>
  74. +
  75. +#include "core.h"
  76. +
  77. +#define SYSC_REG_GPIO_MODE 0x60
  78. +#define SYSC_REG_GPIO_MODE2 0x64
  79. +
  80. +struct rt2880_priv {
  81. + struct device *dev;
  82. +
  83. + struct pinctrl_pin_desc *pads;
  84. + struct pinctrl_desc *desc;
  85. +
  86. + struct rt2880_pmx_func **func;
  87. + int func_count;
  88. +
  89. + struct rt2880_pmx_group *groups;
  90. + const char **group_names;
  91. + int group_count;
  92. +
  93. + uint8_t *gpio;
  94. + int max_pins;
  95. +};
  96. +
  97. +static int rt2880_get_group_count(struct pinctrl_dev *pctrldev)
  98. +{
  99. + struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
  100. +
  101. + return p->group_count;
  102. +}
  103. +
  104. +static const char *rt2880_get_group_name(struct pinctrl_dev *pctrldev,
  105. + unsigned group)
  106. +{
  107. + struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
  108. +
  109. + if (group >= p->group_count)
  110. + return NULL;
  111. +
  112. + return p->group_names[group];
  113. +}
  114. +
  115. +static int rt2880_get_group_pins(struct pinctrl_dev *pctrldev,
  116. + unsigned group,
  117. + const unsigned **pins,
  118. + unsigned *num_pins)
  119. +{
  120. + struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
  121. +
  122. + if (group >= p->group_count)
  123. + return -EINVAL;
  124. +
  125. + *pins = p->groups[group].func[0].pins;
  126. + *num_pins = p->groups[group].func[0].pin_count;
  127. +
  128. + return 0;
  129. +}
  130. +
  131. +static void rt2880_pinctrl_dt_free_map(struct pinctrl_dev *pctrldev,
  132. + struct pinctrl_map *map, unsigned num_maps)
  133. +{
  134. + int i;
  135. +
  136. + for (i = 0; i < num_maps; i++)
  137. + if (map[i].type == PIN_MAP_TYPE_CONFIGS_PIN ||
  138. + map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
  139. + kfree(map[i].data.configs.configs);
  140. + kfree(map);
  141. +}
  142. +
  143. +static void rt2880_pinctrl_pin_dbg_show(struct pinctrl_dev *pctrldev,
  144. + struct seq_file *s,
  145. + unsigned offset)
  146. +{
  147. + seq_printf(s, "ralink pio");
  148. +}
  149. +
  150. +static void rt2880_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctrldev,
  151. + struct device_node *np,
  152. + struct pinctrl_map **map)
  153. +{
  154. + const char *function;
  155. + int func = of_property_read_string(np, "ralink,function", &function);
  156. + int grps = of_property_count_strings(np, "ralink,group");
  157. + int i;
  158. +
  159. + if (func || !grps)
  160. + return;
  161. +
  162. + for (i = 0; i < grps; i++) {
  163. + const char *group;
  164. +
  165. + of_property_read_string_index(np, "ralink,group", i, &group);
  166. +
  167. + (*map)->type = PIN_MAP_TYPE_MUX_GROUP;
  168. + (*map)->name = function;
  169. + (*map)->data.mux.group = group;
  170. + (*map)->data.mux.function = function;
  171. + (*map)++;
  172. + }
  173. +}
  174. +
  175. +static int rt2880_pinctrl_dt_node_to_map(struct pinctrl_dev *pctrldev,
  176. + struct device_node *np_config,
  177. + struct pinctrl_map **map,
  178. + unsigned *num_maps)
  179. +{
  180. + int max_maps = 0;
  181. + struct pinctrl_map *tmp;
  182. + struct device_node *np;
  183. +
  184. + for_each_child_of_node(np_config, np) {
  185. + int ret = of_property_count_strings(np, "ralink,group");
  186. +
  187. + if (ret >= 0)
  188. + max_maps += ret;
  189. + }
  190. +
  191. + if (!max_maps)
  192. + return max_maps;
  193. +
  194. + *map = kzalloc(max_maps * sizeof(struct pinctrl_map), GFP_KERNEL);
  195. + if (!*map)
  196. + return -ENOMEM;
  197. +
  198. + tmp = *map;
  199. +
  200. + for_each_child_of_node(np_config, np)
  201. + rt2880_pinctrl_dt_subnode_to_map(pctrldev, np, &tmp);
  202. + *num_maps = max_maps;
  203. +
  204. + return 0;
  205. +}
  206. +
  207. +static const struct pinctrl_ops rt2880_pctrl_ops = {
  208. + .get_groups_count = rt2880_get_group_count,
  209. + .get_group_name = rt2880_get_group_name,
  210. + .get_group_pins = rt2880_get_group_pins,
  211. + .pin_dbg_show = rt2880_pinctrl_pin_dbg_show,
  212. + .dt_node_to_map = rt2880_pinctrl_dt_node_to_map,
  213. + .dt_free_map = rt2880_pinctrl_dt_free_map,
  214. +};
  215. +
  216. +static int rt2880_pmx_func_count(struct pinctrl_dev *pctrldev)
  217. +{
  218. + struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
  219. +
  220. + return p->func_count;
  221. +}
  222. +
  223. +static const char *rt2880_pmx_func_name(struct pinctrl_dev *pctrldev,
  224. + unsigned func)
  225. +{
  226. + struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
  227. +
  228. + return p->func[func]->name;
  229. +}
  230. +
  231. +static int rt2880_pmx_group_get_groups(struct pinctrl_dev *pctrldev,
  232. + unsigned func,
  233. + const char * const **groups,
  234. + unsigned * const num_groups)
  235. +{
  236. + struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
  237. +
  238. + if (p->func[func]->group_count == 1)
  239. + *groups = &p->group_names[p->func[func]->groups[0]];
  240. + else
  241. + *groups = p->group_names;
  242. +
  243. + *num_groups = p->func[func]->group_count;
  244. +
  245. + return 0;
  246. +}
  247. +
  248. +static int rt2880_pmx_group_enable(struct pinctrl_dev *pctrldev,
  249. + unsigned func,
  250. + unsigned group)
  251. +{
  252. + struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
  253. + u32 mode = 0;
  254. + u32 reg = SYSC_REG_GPIO_MODE;
  255. + int i;
  256. + int shift;
  257. +
  258. + /* dont allow double use */
  259. + if (p->groups[group].enabled) {
  260. + dev_err(p->dev, "%s is already enabled\n", p->groups[group].name);
  261. + return -EBUSY;
  262. + }
  263. +
  264. + p->groups[group].enabled = 1;
  265. + p->func[func]->enabled = 1;
  266. +
  267. + shift = p->groups[group].shift;
  268. + if (shift >= 32) {
  269. + shift -= 32;
  270. + reg = SYSC_REG_GPIO_MODE2;
  271. + }
  272. + mode = rt_sysc_r32(reg);
  273. + mode &= ~(p->groups[group].mask << shift);
  274. +
  275. + /* mark the pins as gpio */
  276. + for (i = 0; i < p->groups[group].func[0].pin_count; i++)
  277. + p->gpio[p->groups[group].func[0].pins[i]] = 1;
  278. +
  279. + /* function 0 is gpio and needs special handling */
  280. + if (func == 0) {
  281. + mode |= p->groups[group].gpio << shift;
  282. + } else {
  283. + for (i = 0; i < p->func[func]->pin_count; i++)
  284. + p->gpio[p->func[func]->pins[i]] = 0;
  285. + mode |= p->func[func]->value << shift;
  286. + }
  287. + rt_sysc_w32(mode, reg);
  288. +
  289. + return 0;
  290. +}
  291. +
  292. +static int rt2880_pmx_group_gpio_request_enable(struct pinctrl_dev *pctrldev,
  293. + struct pinctrl_gpio_range *range,
  294. + unsigned pin)
  295. +{
  296. + struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev);
  297. +
  298. + if (!p->gpio[pin]) {
  299. + dev_err(p->dev, "pin %d is not set to gpio mux\n", pin);
  300. + return -EINVAL;
  301. + }
  302. +
  303. + return 0;
  304. +}
  305. +
  306. +static const struct pinmux_ops rt2880_pmx_group_ops = {
  307. + .get_functions_count = rt2880_pmx_func_count,
  308. + .get_function_name = rt2880_pmx_func_name,
  309. + .get_function_groups = rt2880_pmx_group_get_groups,
  310. + .set_mux = rt2880_pmx_group_enable,
  311. + .gpio_request_enable = rt2880_pmx_group_gpio_request_enable,
  312. +};
  313. +
  314. +static struct pinctrl_desc rt2880_pctrl_desc = {
  315. + .owner = THIS_MODULE,
  316. + .name = "rt2880-pinmux",
  317. + .pctlops = &rt2880_pctrl_ops,
  318. + .pmxops = &rt2880_pmx_group_ops,
  319. +};
  320. +
  321. +static struct rt2880_pmx_func gpio_func = {
  322. + .name = "gpio",
  323. +};
  324. +
  325. +static int rt2880_pinmux_index(struct rt2880_priv *p)
  326. +{
  327. + struct rt2880_pmx_func **f;
  328. + struct rt2880_pmx_group *mux = p->groups;
  329. + int i, j, c = 0;
  330. +
  331. + /* count the mux functions */
  332. + while (mux->name) {
  333. + p->group_count++;
  334. + mux++;
  335. + }
  336. +
  337. + /* allocate the group names array needed by the gpio function */
  338. + p->group_names = devm_kzalloc(p->dev, sizeof(char *) * p->group_count, GFP_KERNEL);
  339. + if (!p->group_names)
  340. + return -1;
  341. +
  342. + for (i = 0; i < p->group_count; i++) {
  343. + p->group_names[i] = p->groups[i].name;
  344. + p->func_count += p->groups[i].func_count;
  345. + }
  346. +
  347. + /* we have a dummy function[0] for gpio */
  348. + p->func_count++;
  349. +
  350. + /* allocate our function and group mapping index buffers */
  351. + f = p->func = devm_kzalloc(p->dev, sizeof(struct rt2880_pmx_func) * p->func_count, GFP_KERNEL);
  352. + gpio_func.groups = devm_kzalloc(p->dev, sizeof(int) * p->group_count, GFP_KERNEL);
  353. + if (!f || !gpio_func.groups)
  354. + return -1;
  355. +
  356. + /* add a backpointer to the function so it knows its group */
  357. + gpio_func.group_count = p->group_count;
  358. + for (i = 0; i < gpio_func.group_count; i++)
  359. + gpio_func.groups[i] = i;
  360. +
  361. + f[c] = &gpio_func;
  362. + c++;
  363. +
  364. + /* add remaining functions */
  365. + for (i = 0; i < p->group_count; i++) {
  366. + for (j = 0; j < p->groups[i].func_count; j++) {
  367. + f[c] = &p->groups[i].func[j];
  368. + f[c]->groups = devm_kzalloc(p->dev, sizeof(int), GFP_KERNEL);
  369. + f[c]->groups[0] = i;
  370. + f[c]->group_count = 1;
  371. + c++;
  372. + }
  373. + }
  374. + return 0;
  375. +}
  376. +
  377. +static int rt2880_pinmux_pins(struct rt2880_priv *p)
  378. +{
  379. + int i, j;
  380. +
  381. + /* loop over the functions and initialize the pins array. also work out the highest pin used */
  382. + for (i = 0; i < p->func_count; i++) {
  383. + int pin;
  384. +
  385. + if (!p->func[i]->pin_count)
  386. + continue;
  387. +
  388. + p->func[i]->pins = devm_kzalloc(p->dev, sizeof(int) * p->func[i]->pin_count, GFP_KERNEL);
  389. + for (j = 0; j < p->func[i]->pin_count; j++)
  390. + p->func[i]->pins[j] = p->func[i]->pin_first + j;
  391. +
  392. + pin = p->func[i]->pin_first + p->func[i]->pin_count;
  393. + if (pin > p->max_pins)
  394. + p->max_pins = pin;
  395. + }
  396. +
  397. + /* the buffer that tells us which pins are gpio */
  398. + p->gpio = devm_kzalloc(p->dev,sizeof(uint8_t) * p->max_pins,
  399. + GFP_KERNEL);
  400. + /* the pads needed to tell pinctrl about our pins */
  401. + p->pads = devm_kzalloc(p->dev,
  402. + sizeof(struct pinctrl_pin_desc) * p->max_pins,
  403. + GFP_KERNEL);
  404. + if (!p->pads || !p->gpio ) {
  405. + dev_err(p->dev, "Failed to allocate gpio data\n");
  406. + return -ENOMEM;
  407. + }
  408. +
  409. + memset(p->gpio, 1, sizeof(uint8_t) * p->max_pins);
  410. + for (i = 0; i < p->func_count; i++) {
  411. + if (!p->func[i]->pin_count)
  412. + continue;
  413. +
  414. + for (j = 0; j < p->func[i]->pin_count; j++)
  415. + p->gpio[p->func[i]->pins[j]] = 0;
  416. + }
  417. +
  418. + /* pin 0 is always a gpio */
  419. + p->gpio[0] = 1;
  420. +
  421. + /* set the pads */
  422. + for (i = 0; i < p->max_pins; i++) {
  423. + /* strlen("ioXY") + 1 = 5 */
  424. + char *name = devm_kzalloc(p->dev, 5, GFP_KERNEL);
  425. +
  426. + if (!name) {
  427. + dev_err(p->dev, "Failed to allocate pad name\n");
  428. + return -ENOMEM;
  429. + }
  430. + snprintf(name, 5, "io%d", i);
  431. + p->pads[i].number = i;
  432. + p->pads[i].name = name;
  433. + }
  434. + p->desc->pins = p->pads;
  435. + p->desc->npins = p->max_pins;
  436. +
  437. + return 0;
  438. +}
  439. +
  440. +static int rt2880_pinmux_probe(struct platform_device *pdev)
  441. +{
  442. + struct rt2880_priv *p;
  443. + struct pinctrl_dev *dev;
  444. + struct device_node *np;
  445. +
  446. + if (!rt2880_pinmux_data)
  447. + return -ENOSYS;
  448. +
  449. + /* setup the private data */
  450. + p = devm_kzalloc(&pdev->dev, sizeof(struct rt2880_priv), GFP_KERNEL);
  451. + if (!p)
  452. + return -ENOMEM;
  453. +
  454. + p->dev = &pdev->dev;
  455. + p->desc = &rt2880_pctrl_desc;
  456. + p->groups = rt2880_pinmux_data;
  457. + platform_set_drvdata(pdev, p);
  458. +
  459. + /* init the device */
  460. + if (rt2880_pinmux_index(p)) {
  461. + dev_err(&pdev->dev, "failed to load index\n");
  462. + return -EINVAL;
  463. + }
  464. + if (rt2880_pinmux_pins(p)) {
  465. + dev_err(&pdev->dev, "failed to load pins\n");
  466. + return -EINVAL;
  467. + }
  468. + dev = pinctrl_register(p->desc, &pdev->dev, p);
  469. + if (IS_ERR(dev))
  470. + return PTR_ERR(dev);
  471. +
  472. + /* finalize by adding gpio ranges for enables gpio controllers */
  473. + for_each_compatible_node(np, NULL, "ralink,rt2880-gpio") {
  474. + const __be32 *ngpio, *gpiobase;
  475. + struct pinctrl_gpio_range *range;
  476. + char *name;
  477. +
  478. + if (!of_device_is_available(np))
  479. + continue;
  480. +
  481. + ngpio = of_get_property(np, "ralink,num-gpios", NULL);
  482. + gpiobase = of_get_property(np, "ralink,gpio-base", NULL);
  483. + if (!ngpio || !gpiobase) {
  484. + dev_err(&pdev->dev, "failed to load chip info\n");
  485. + return -EINVAL;
  486. + }
  487. +
  488. + range = devm_kzalloc(p->dev, sizeof(struct pinctrl_gpio_range) + 4, GFP_KERNEL);
  489. + range->name = name = (char *) &range[1];
  490. + sprintf(name, "pio");
  491. + range->npins = __be32_to_cpu(*ngpio);
  492. + range->base = __be32_to_cpu(*gpiobase);
  493. + range->pin_base = range->base;
  494. + pinctrl_add_gpio_range(dev, range);
  495. + }
  496. +
  497. + return 0;
  498. +}
  499. +
  500. +static const struct of_device_id rt2880_pinmux_match[] = {
  501. + { .compatible = "ralink,rt2880-pinmux" },
  502. + {},
  503. +};
  504. +MODULE_DEVICE_TABLE(of, rt2880_pinmux_match);
  505. +
  506. +static struct platform_driver rt2880_pinmux_driver = {
  507. + .probe = rt2880_pinmux_probe,
  508. + .driver = {
  509. + .name = "rt2880-pinmux",
  510. + .owner = THIS_MODULE,
  511. + .of_match_table = rt2880_pinmux_match,
  512. + },
  513. +};
  514. +
  515. +int __init rt2880_pinmux_init(void)
  516. +{
  517. + return platform_driver_register(&rt2880_pinmux_driver);
  518. +}
  519. +
  520. +core_initcall_sync(rt2880_pinmux_init);