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0500-Documentation-DT-net-add-docs-for-ralink-mediatek-So.patch 4.6 KB

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  1. From 9c2487f148ee38807d86beaf12dc2b818a764a99 Mon Sep 17 00:00:00 2001
  2. From: John Crispin <blogic@openwrt.org>
  3. Date: Tue, 17 Nov 2015 00:20:07 +0100
  4. Subject: [PATCH 500/513] Documentation: DT: net: add docs for ralink/mediatek
  5. SoC ethernet binding
  6. Add three files. ralink,rt2880-net.txt descibes the actual frame engine
  7. and the other two describe the switch forntend bindings.
  8. Signed-off-by: John Crispin <blogic@openwrt.org>
  9. Signed-off-by: Felix Fietkau <nbd@nbd.name>
  10. Signed-off-by: Michael Lee <igvtee@gmail.com>
  11. Cc: devicetree@vger.kernel.org
  12. ---
  13. .../bindings/net/mediatek,mt7620-gsw.txt | 26 +++++++++
  14. .../devicetree/bindings/net/ralink,rt2880-net.txt | 61 ++++++++++++++++++++
  15. .../devicetree/bindings/net/ralink,rt3050-esw.txt | 32 ++++++++++
  16. 3 files changed, 119 insertions(+)
  17. create mode 100644 Documentation/devicetree/bindings/net/mediatek,mt7620-gsw.txt
  18. create mode 100644 Documentation/devicetree/bindings/net/ralink,rt2880-net.txt
  19. create mode 100644 Documentation/devicetree/bindings/net/ralink,rt3050-esw.txt
  20. --- /dev/null
  21. +++ b/Documentation/devicetree/bindings/net/mediatek,mt7620-gsw.txt
  22. @@ -0,0 +1,26 @@
  23. +Mediatek Gigabit Switch
  24. +=======================
  25. +
  26. +The mediatek gigabit switch can be found on Mediatek SoCs (mt7620, mt7621).
  27. +
  28. +Required properties:
  29. +- compatible: Should be "mediatek,mt7620-gsw"
  30. +- reg: Address and length of the register set for the device
  31. +- interrupt-parent: Should be the phandle for the interrupt controller
  32. + that services interrupts for this device
  33. +- interrupts: Should contain the gigabit switches interrupt
  34. +- resets: Should contain the gigabit switches resets
  35. +- reset-names: Should contain the reset names "gsw"
  36. +
  37. +Example:
  38. +
  39. +gsw@10110000 {
  40. + compatible = "ralink,mt7620-gsw";
  41. + reg = <0x10110000 8000>;
  42. +
  43. + resets = <&rstctrl 23>;
  44. + reset-names = "gsw";
  45. +
  46. + interrupt-parent = <&intc>;
  47. + interrupts = <17>;
  48. +};
  49. --- /dev/null
  50. +++ b/Documentation/devicetree/bindings/net/ralink,rt2880-net.txt
  51. @@ -0,0 +1,61 @@
  52. +Ralink Frame Engine Ethernet controller
  53. +=======================================
  54. +
  55. +The Ralink frame engine ethernet controller can be found on Ralink and
  56. +Mediatek SoCs (RT288x, RT3x5x, RT366x, RT388x, rt5350, mt7620, mt7621, mt76x8).
  57. +
  58. +Depending on the SoC, there is a number of ports connected to the CPU port
  59. +directly and/or via a (gigabit-)switch.
  60. +
  61. +* Ethernet controller node
  62. +
  63. +Required properties:
  64. +- compatible: Should be one of "ralink,rt2880-eth", "ralink,rt3050-eth",
  65. + "ralink,rt3050-eth", "ralink,rt3883-eth", "ralink,rt5350-eth",
  66. + "mediatek,mt7620-eth", "mediatek,mt7621-eth"
  67. +- reg: Address and length of the register set for the device
  68. +- interrupt-parent: Should be the phandle for the interrupt controller
  69. + that services interrupts for this device
  70. +- interrupts: Should contain the frame engines interrupt
  71. +- resets: Should contain the frame engines resets
  72. +- reset-names: Should contain the reset names "fe". If a switch is present
  73. + "esw" is also required.
  74. +
  75. +
  76. +* Ethernet port node
  77. +
  78. +Required properties:
  79. +- compatible: Should be "ralink,eth-port"
  80. +- reg: The number of the physical port
  81. +- phy-handle: reference to the node describing the phy
  82. +
  83. +Example:
  84. +
  85. +mdio-bus {
  86. + ...
  87. + phy0: ethernet-phy@0 {
  88. + phy-mode = "mii";
  89. + reg = <0>;
  90. + };
  91. +};
  92. +
  93. +ethernet@400000 {
  94. + compatible = "ralink,rt2880-eth";
  95. + reg = <0x00400000 10000>;
  96. +
  97. + #address-cells = <1>;
  98. + #size-cells = <0>;
  99. +
  100. + resets = <&rstctrl 18>;
  101. + reset-names = "fe";
  102. +
  103. + interrupt-parent = <&cpuintc>;
  104. + interrupts = <5>;
  105. +
  106. + port@0 {
  107. + compatible = "ralink,eth-port";
  108. + reg = <0>;
  109. + phy-handle = <&phy0>;
  110. + };
  111. +
  112. +};
  113. --- /dev/null
  114. +++ b/Documentation/devicetree/bindings/net/ralink,rt3050-esw.txt
  115. @@ -0,0 +1,32 @@
  116. +Ralink Fast Ethernet Embedded Switch
  117. +====================================
  118. +
  119. +The ralink fast ethernet embedded switch can be found on Ralink and Mediatek
  120. +SoCs (RT3x5x, rt5350, mt76x8).
  121. +
  122. +Required properties:
  123. +- compatible: Should be "ralink,rt3050-esw"
  124. +- reg: Address and length of the register set for the device
  125. +- interrupt-parent: Should be the phandle for the interrupt controller
  126. + that services interrupts for this device
  127. +- interrupts: Should contain the embedded switches interrupt
  128. +- resets: Should contain the embedded switches resets
  129. +- reset-names: Should contain the reset names "esw"
  130. +
  131. +Optional properties:
  132. +- ralink,portmap: can be used to choose if the default switch setup is
  133. + llllw or wllll
  134. +- ralink,led_polarity: override the active high/low settings of the leds
  135. +
  136. +Example:
  137. +
  138. +esw@10110000 {
  139. + compatible = "ralink,rt3050-esw";
  140. + reg = <0x10110000 8000>;
  141. +
  142. + resets = <&rstctrl 23>;
  143. + reset-names = "esw";
  144. +
  145. + interrupt-parent = <&intc>;
  146. + interrupts = <17>;
  147. +};