101-mt7621-timer.patch 2.1 KB

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  1. --- a/arch/mips/ralink/mt7621.c
  2. +++ b/arch/mips/ralink/mt7621.c
  3. @@ -21,6 +21,7 @@
  4. #include <asm/mach-ralink/ralink_regs.h>
  5. #include <asm/mach-ralink/mt7621.h>
  6. #include <asm/mips-boards/launch.h>
  7. +#include <asm/delay.h>
  8. #include <pinmux.h>
  9. @@ -178,6 +179,58 @@ bool plat_cpu_core_present(int core)
  10. return true;
  11. }
  12. +#define LPS_PREC 8
  13. +/*
  14. +* Re-calibration lpj(loop-per-jiffy).
  15. +* (derived from kernel/calibrate.c)
  16. +*/
  17. +static int udelay_recal(void)
  18. +{
  19. + unsigned int i, lpj = 0;
  20. + unsigned long ticks, loopbit;
  21. + int lps_precision = LPS_PREC;
  22. +
  23. + lpj = (1<<12);
  24. +
  25. + while ((lpj <<= 1) != 0) {
  26. + /* wait for "start of" clock tick */
  27. + ticks = jiffies;
  28. + while (ticks == jiffies)
  29. + /* nothing */;
  30. +
  31. + /* Go .. */
  32. + ticks = jiffies;
  33. + __delay(lpj);
  34. + ticks = jiffies - ticks;
  35. + if (ticks)
  36. + break;
  37. + }
  38. +
  39. + /*
  40. + * Do a binary approximation to get lpj set to
  41. + * equal one clock (up to lps_precision bits)
  42. + */
  43. + lpj >>= 1;
  44. + loopbit = lpj;
  45. + while (lps_precision-- && (loopbit >>= 1)) {
  46. + lpj |= loopbit;
  47. + ticks = jiffies;
  48. + while (ticks == jiffies)
  49. + /* nothing */;
  50. + ticks = jiffies;
  51. + __delay(lpj);
  52. + if (jiffies != ticks) /* longer than 1 tick */
  53. + lpj &= ~loopbit;
  54. + }
  55. + printk(KERN_INFO "%d CPUs re-calibrate udelay(lpj = %d)\n", NR_CPUS, lpj);
  56. +
  57. + for(i=0; i< NR_CPUS; i++)
  58. + cpu_data[i].udelay_val = lpj;
  59. +
  60. + return 0;
  61. +}
  62. +device_initcall(udelay_recal);
  63. +
  64. void prom_soc_init(struct ralink_soc_info *soc_info)
  65. {
  66. void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7621_SYSC_BASE);
  67. --- a/arch/mips/ralink/Kconfig
  68. +++ b/arch/mips/ralink/Kconfig
  69. @@ -56,6 +56,7 @@ choice
  70. select COMMON_CLK
  71. select CLKSRC_MIPS_GIC
  72. select HW_HAS_PCI
  73. + select GENERIC_CLOCKEVENTS_BROADCAST
  74. endchoice
  75. choice
  76. --- a/arch/mips/ralink/timer-gic.c
  77. +++ b/arch/mips/ralink/timer-gic.c
  78. @@ -3,6 +3,7 @@
  79. #include <linux/of.h>
  80. #include <linux/clk-provider.h>
  81. #include <linux/clocksource.h>
  82. +#include <asm/time.h>
  83. #include "common.h"
  84. @@ -10,6 +11,8 @@ void __init plat_time_init(void)
  85. {
  86. ralink_of_remap();
  87. + mips_hpt_frequency = 880000000 / 2;
  88. +
  89. of_clk_init(NULL);
  90. clocksource_probe();
  91. }