1
0

ALL0256N-4M.dts 1.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102
  1. /dts-v1/;
  2. #include "rt3050.dtsi"
  3. #include <dt-bindings/input/input.h>
  4. / {
  5. compatible = "ALL0256N", "ralink,rt3050-soc";
  6. model = "Allnet ALL0256N (4M)";
  7. gpio-leds {
  8. compatible = "gpio-leds";
  9. rssilow {
  10. label = "all0256n:green:rssilow";
  11. gpios = <&gpio0 14 1>;
  12. };
  13. rssimed {
  14. label = "all0256n:green:rssimed";
  15. gpios = <&gpio0 12 1>;
  16. };
  17. rssihigh {
  18. label = "all0256n:green:rssihigh";
  19. gpios = <&gpio0 13 1>;
  20. };
  21. };
  22. gpio-keys-polled {
  23. compatible = "gpio-keys-polled";
  24. #address-cells = <1>;
  25. #size-cells = <0>;
  26. poll-interval = <20>;
  27. reset {
  28. label = "reset";
  29. gpios = <&gpio0 0 1>;
  30. linux,code = <KEY_RESTART>;
  31. };
  32. };
  33. };
  34. &gpio0 {
  35. status = "okay";
  36. };
  37. &spi0 {
  38. status = "okay";
  39. m25p80@0 {
  40. #address-cells = <1>;
  41. #size-cells = <1>;
  42. compatible = "jedec,spi-nor";
  43. reg = <0>;
  44. spi-max-frequency = <10000000>;
  45. partition@0 {
  46. label = "u-boot";
  47. reg = <0x0 0x30000>;
  48. read-only;
  49. };
  50. partition@30000 {
  51. label = "u-boot-env";
  52. reg = <0x30000 0x10000>;
  53. read-only;
  54. };
  55. factory: partition@40000 {
  56. label = "factory";
  57. reg = <0x40000 0x10000>;
  58. read-only;
  59. };
  60. partition@50000 {
  61. label = "firmware";
  62. reg = <0x50000 0x3c8000>;
  63. };
  64. };
  65. };
  66. &pinctrl {
  67. state_default: pinctrl0 {
  68. gpio {
  69. ralink,group = "i2c", "jtag", "rgmii", "mdio", "uartf";
  70. ralink,function = "gpio";
  71. };
  72. };
  73. };
  74. &ethernet {
  75. mtd-mac-address = <&factory 0x28>;
  76. };
  77. &esw {
  78. mediatek,portmap = <0x3f>;
  79. };
  80. &wmac {
  81. ralink,mtd-eeprom = <&factory 0>;
  82. };