rt3050.dtsi 5.9 KB

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  1. / {
  2. #address-cells = <1>;
  3. #size-cells = <1>;
  4. compatible = "ralink,rt3050-soc", "ralink,rt3052-soc", "ralink,rt3350-soc";
  5. cpus {
  6. cpu@0 {
  7. compatible = "mips,mips24KEc";
  8. };
  9. };
  10. chosen {
  11. bootargs = "console=ttyS0,57600";
  12. };
  13. aliases {
  14. spi0 = &spi0;
  15. serial0 = &uartlite;
  16. };
  17. cpuintc: cpuintc@0 {
  18. #address-cells = <0>;
  19. #interrupt-cells = <1>;
  20. interrupt-controller;
  21. compatible = "mti,cpu-interrupt-controller";
  22. };
  23. palmbus: palmbus@10000000 {
  24. compatible = "palmbus";
  25. reg = <0x10000000 0x200000>;
  26. ranges = <0x0 0x10000000 0x1FFFFF>;
  27. #address-cells = <1>;
  28. #size-cells = <1>;
  29. sysc: sysc@0 {
  30. compatible = "ralink,rt3050-sysc";
  31. reg = <0x0 0x100>;
  32. };
  33. timer: timer@100 {
  34. compatible = "ralink,rt3050-timer", "ralink,rt2880-timer";
  35. reg = <0x100 0x20>;
  36. interrupt-parent = <&intc>;
  37. interrupts = <1>;
  38. };
  39. watchdog: watchdog@120 {
  40. compatible = "ralink,rt3050-wdt", "ralink,rt2880-wdt";
  41. reg = <0x120 0x10>;
  42. resets = <&rstctrl 8>;
  43. reset-names = "wdt";
  44. interrupt-parent = <&intc>;
  45. interrupts = <1>;
  46. };
  47. intc: intc@200 {
  48. compatible = "ralink,rt3050-intc", "ralink,rt2880-intc";
  49. reg = <0x200 0x100>;
  50. resets = <&rstctrl 19>;
  51. reset-names = "intc";
  52. interrupt-controller;
  53. #interrupt-cells = <1>;
  54. interrupt-parent = <&cpuintc>;
  55. interrupts = <2>;
  56. };
  57. memc: memc@300 {
  58. compatible = "ralink,rt3050-memc";
  59. reg = <0x300 0x100>;
  60. resets = <&rstctrl 20>;
  61. reset-names = "mc";
  62. interrupt-parent = <&intc>;
  63. interrupts = <3>;
  64. };
  65. uart: uart@500 {
  66. compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
  67. reg = <0x500 0x100>;
  68. resets = <&rstctrl 12>;
  69. reset-names = "uart";
  70. interrupt-parent = <&intc>;
  71. interrupts = <5>;
  72. reg-shift = <2>;
  73. status = "disabled";
  74. };
  75. gpio0: gpio@600 {
  76. compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
  77. reg = <0x600 0x34>;
  78. gpio-controller;
  79. #gpio-cells = <2>;
  80. ralink,gpio-base = <0>;
  81. ralink,num-gpios = <24>;
  82. ralink,register-map = [ 00 04 08 0c
  83. 20 24 28 2c
  84. 30 34 ];
  85. resets = <&rstctrl 13>;
  86. reset-names = "pio";
  87. interrupt-parent = <&intc>;
  88. interrupts = <6>;
  89. };
  90. gpio1: gpio@638 {
  91. compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
  92. reg = <0x638 0x24>;
  93. gpio-controller;
  94. #gpio-cells = <2>;
  95. ralink,gpio-base = <24>;
  96. ralink,num-gpios = <16>;
  97. ralink,register-map = [ 00 04 08 0c
  98. 10 14 18 1c
  99. 20 24 ];
  100. status = "disabled";
  101. };
  102. gpio2: gpio@660 {
  103. compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
  104. reg = <0x660 0x24>;
  105. gpio-controller;
  106. #gpio-cells = <2>;
  107. ralink,gpio-base = <40>;
  108. ralink,num-gpios = <12>;
  109. ralink,register-map = [ 00 04 08 0c
  110. 10 14 18 1c
  111. 20 24 ];
  112. status = "disabled";
  113. };
  114. gdma: gdma@700 {
  115. compatible = "ralink,rt305x-gdma";
  116. reg = <0x700 0x100>;
  117. resets = <&rstctrl 14>;
  118. reset-names = "dma";
  119. interrupt-parent = <&intc>;
  120. interrupts = <7>;
  121. #dma-cells = <1>;
  122. #dma-channels = <8>;
  123. #dma-requests = <8>;
  124. status = "disabled";
  125. };
  126. i2c@900 {
  127. compatible = "ralink,rt2880-i2c";
  128. reg = <0x900 0x100>;
  129. resets = <&rstctrl 16>;
  130. reset-names = "i2c";
  131. #address-cells = <1>;
  132. #size-cells = <0>;
  133. status = "disabled";
  134. pinctrl-names = "default";
  135. pinctrl-0 = <&i2c_pins>;
  136. };
  137. i2s@a00 {
  138. compatible = "ralink,rt3050-i2s";
  139. reg = <0xa00 0x100>;
  140. resets = <&rstctrl 17>;
  141. reset-names = "i2s";
  142. interrupt-parent = <&intc>;
  143. interrupts = <10>;
  144. txdma-req = <2>;
  145. dmas = <&gdma 4>;
  146. dma-names = "tx";
  147. status = "disabled";
  148. };
  149. spi0: spi@b00 {
  150. compatible = "ralink,rt3050-spi", "ralink,rt2880-spi";
  151. reg = <0xb00 0x100>;
  152. resets = <&rstctrl 18>;
  153. reset-names = "spi";
  154. #address-cells = <1>;
  155. #size-cells = <0>;
  156. pinctrl-names = "default";
  157. pinctrl-0 = <&spi_pins>;
  158. status = "disabled";
  159. };
  160. uartlite: uartlite@c00 {
  161. compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
  162. reg = <0xc00 0x100>;
  163. resets = <&rstctrl 19>;
  164. reset-names = "uartl";
  165. interrupt-parent = <&intc>;
  166. interrupts = <12>;
  167. reg-shift = <2>;
  168. pinctrl-names = "default";
  169. pinctrl-0 = <&uartlite_pins>;
  170. };
  171. };
  172. pinctrl: pinctrl {
  173. compatible = "ralink,rt2880-pinmux";
  174. pinctrl-names = "default";
  175. pinctrl-0 = <&state_default>;
  176. state_default: pinctrl0 {
  177. sdram {
  178. ralink,group = "sdram";
  179. ralink,function = "sdram";
  180. };
  181. };
  182. i2c_pins: i2c {
  183. i2c {
  184. ralink,group = "i2c";
  185. ralink,function = "i2c";
  186. };
  187. };
  188. spi_pins: spi {
  189. spi {
  190. ralink,group = "spi";
  191. ralink,function = "spi";
  192. };
  193. };
  194. uartlite_pins: uartlite {
  195. uart {
  196. ralink,group = "uartlite";
  197. ralink,function = "uartlite";
  198. };
  199. };
  200. };
  201. rstctrl: rstctrl {
  202. compatible = "ralink,rt3050-reset", "ralink,rt2880-reset";
  203. #reset-cells = <1>;
  204. };
  205. clkctrl: clkctrl {
  206. compatible = "ralink,rt2880-clock";
  207. #clock-cells = <1>;
  208. };
  209. usbphy: usbphy {
  210. compatible = "ralink,rt3050-usbphy";
  211. resets = <&rstctrl 22>;
  212. reset-names = "host";
  213. clocks = <&clkctrl 18>;
  214. clock-names = "host";
  215. };
  216. ethernet: ethernet@10100000 {
  217. compatible = "ralink,rt3050-eth";
  218. reg = <0x10100000 0x10000>;
  219. resets = <&rstctrl 21>;
  220. reset-names = "fe";
  221. interrupt-parent = <&cpuintc>;
  222. interrupts = <5>;
  223. mediatek,switch = <&esw>;
  224. };
  225. esw: esw@10110000 {
  226. compatible = "ralink,rt3050-esw";
  227. reg = <0x10110000 0x8000>;
  228. resets = <&rstctrl 23>;
  229. reset-names = "esw";
  230. interrupt-parent = <&intc>;
  231. interrupts = <17>;
  232. };
  233. wmac: wmac@10180000 {
  234. compatible = "ralink,rt3050-wmac", "ralink,rt2880-wmac";
  235. reg = <0x10180000 0x40000>;
  236. interrupt-parent = <&cpuintc>;
  237. interrupts = <6>;
  238. ralink,eeprom = "soc_wmac.eeprom";
  239. };
  240. otg: otg@101c0000 {
  241. compatible = "ralink,rt3050-otg", "snps,dwc2";
  242. reg = <0x101c0000 0x40000>;
  243. interrupt-parent = <&intc>;
  244. interrupts = <18>;
  245. resets = <&rstctrl 22>;
  246. reset-names = "otg";
  247. status = "disabled";
  248. };
  249. };