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rt3352.dtsi 6.5 KB

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  1. / {
  2. #address-cells = <1>;
  3. #size-cells = <1>;
  4. compatible = "ralink,rt3352-soc";
  5. cpus {
  6. cpu@0 {
  7. compatible = "mips,mips24KEc";
  8. };
  9. };
  10. chosen {
  11. bootargs = "console=ttyS0,57600";
  12. };
  13. cpuintc: cpuintc@0 {
  14. #address-cells = <0>;
  15. #interrupt-cells = <1>;
  16. interrupt-controller;
  17. compatible = "mti,cpu-interrupt-controller";
  18. };
  19. aliases {
  20. spi0 = &spi0;
  21. spi1 = &spi1;
  22. serial0 = &uartlite;
  23. };
  24. palmbus: palmbus@10000000 {
  25. compatible = "palmbus";
  26. reg = <0x10000000 0x200000>;
  27. ranges = <0x0 0x10000000 0x1FFFFF>;
  28. #address-cells = <1>;
  29. #size-cells = <1>;
  30. sysc: sysc@0 {
  31. compatible = "ralink,rt3352-sysc", "ralink,rt3050-sysc";
  32. reg = <0x0 0x100>;
  33. };
  34. timer: timer@100 {
  35. compatible = "ralink,rt3352-timer", "ralink,rt2880-timer";
  36. reg = <0x100 0x20>;
  37. interrupt-parent = <&intc>;
  38. interrupts = <1>;
  39. };
  40. watchdog: watchdog@120 {
  41. compatible = "ralink,rt3352-wdt", "ralink,rt2880-wdt";
  42. reg = <0x120 0x10>;
  43. resets = <&rstctrl 8>;
  44. reset-names = "wdt";
  45. interrupt-parent = <&intc>;
  46. interrupts = <1>;
  47. };
  48. intc: intc@200 {
  49. compatible = "ralink,rt3352-intc", "ralink,rt2880-intc";
  50. reg = <0x200 0x100>;
  51. interrupt-controller;
  52. #interrupt-cells = <1>;
  53. interrupt-parent = <&cpuintc>;
  54. interrupts = <2>;
  55. };
  56. memc: memc@300 {
  57. compatible = "ralink,rt3352-memc", "ralink,rt3050-memc";
  58. reg = <0x300 0x100>;
  59. resets = <&rstctrl 20>;
  60. reset-names = "mc";
  61. interrupt-parent = <&intc>;
  62. interrupts = <3>;
  63. };
  64. uart: uart@500 {
  65. compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
  66. reg = <0x500 0x100>;
  67. resets = <&rstctrl 12>;
  68. reset-names = "uart";
  69. interrupt-parent = <&intc>;
  70. interrupts = <5>;
  71. reg-shift = <2>;
  72. status = "disabled";
  73. };
  74. gpio0: gpio@600 {
  75. compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
  76. reg = <0x600 0x34>;
  77. gpio-controller;
  78. #gpio-cells = <2>;
  79. ralink,gpio-base = <0>;
  80. ralink,num-gpios = <24>;
  81. ralink,register-map = [ 00 04 08 0c
  82. 20 24 28 2c
  83. 30 34 ];
  84. resets = <&rstctrl 13>;
  85. reset-names = "pio";
  86. interrupt-parent = <&intc>;
  87. interrupts = <6>;
  88. };
  89. gpio1: gpio@638 {
  90. compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
  91. reg = <0x638 0x24>;
  92. gpio-controller;
  93. #gpio-cells = <2>;
  94. ralink,gpio-base = <24>;
  95. ralink,num-gpios = <16>;
  96. ralink,register-map = [ 00 04 08 0c
  97. 10 14 18 1c
  98. 20 24 ];
  99. status = "disabled";
  100. };
  101. gpio2: gpio@660 {
  102. compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
  103. reg = <0x660 0x24>;
  104. gpio-controller;
  105. #gpio-cells = <2>;
  106. ralink,gpio-base = <40>;
  107. ralink,num-gpios = <6>;
  108. ralink,register-map = [ 00 04 08 0c
  109. 10 14 18 1c
  110. 20 24 ];
  111. status = "disabled";
  112. };
  113. i2c@900 {
  114. compatible = "ralink,rt2880-i2c";
  115. reg = <0x900 0x100>;
  116. resets = <&rstctrl 16>;
  117. reset-names = "i2c";
  118. #address-cells = <1>;
  119. #size-cells = <0>;
  120. status = "disabled";
  121. pinctrl-names = "default";
  122. pinctrl-0 = <&i2c_pins>;
  123. };
  124. i2s@a00 {
  125. compatible = "ralink,rt3352-i2s";
  126. reg = <0xa00 0x100>;
  127. resets = <&rstctrl 17>;
  128. reset-names = "i2s";
  129. interrupt-parent = <&intc>;
  130. interrupts = <10>;
  131. txdma-req = <2>;
  132. rxdma-req = <3>;
  133. dmas = <&gdma 4>,
  134. <&gdma 6>;
  135. dma-names = "tx", "rx";
  136. status = "disabled";
  137. };
  138. spi0: spi@b00 {
  139. compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
  140. reg = <0xb00 0x40>;
  141. #address-cells = <1>;
  142. #size-cells = <0>;
  143. resets = <&rstctrl 18>;
  144. reset-names = "spi";
  145. pinctrl-names = "default";
  146. pinctrl-0 = <&spi_pins>;
  147. status = "disabled";
  148. };
  149. spi1: spi@b40 {
  150. compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
  151. reg = <0xb40 0x60>;
  152. #address-cells = <1>;
  153. #size-cells = <0>;
  154. resets = <&rstctrl 18>;
  155. reset-names = "spi";
  156. pinctrl-names = "default";
  157. pinctrl-0 = <&spi_cs1>;
  158. status = "disabled";
  159. };
  160. uartlite: uartlite@c00 {
  161. compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
  162. reg = <0xc00 0x100>;
  163. resets = <&rstctrl 19>;
  164. reset-names = "uartl";
  165. interrupt-parent = <&intc>;
  166. interrupts = <12>;
  167. reg-shift = <2>;
  168. pinctrl-names = "default";
  169. pinctrl-0 = <&uartlite_pins>;
  170. };
  171. gdma: gdma@2800 {
  172. compatible = "ralink,rt3883-gdma";
  173. reg = <0x2800 0x800>;
  174. resets = <&rstctrl 14>;
  175. reset-names = "dma";
  176. interrupt-parent = <&intc>;
  177. interrupts = <7>;
  178. #dma-cells = <1>;
  179. #dma-channels = <16>;
  180. #dma-requests = <16>;
  181. status = "disabled";
  182. };
  183. };
  184. pinctrl: pinctrl {
  185. compatible = "ralink,rt2880-pinmux";
  186. pinctrl-names = "default";
  187. pinctrl-0 = <&state_default>;
  188. state_default: pinctrl0 {
  189. };
  190. i2c_pins: i2c {
  191. i2c {
  192. ralink,group = "i2c";
  193. ralink,function = "i2c";
  194. };
  195. };
  196. spi_pins: spi {
  197. spi {
  198. ralink,group = "spi";
  199. ralink,function = "spi";
  200. };
  201. };
  202. spi_cs1: spi1 {
  203. spi1 {
  204. ralink,group = "spi_cs1";
  205. ralink,function = "spi_cs1";
  206. };
  207. };
  208. uartlite_pins: uartlite {
  209. uart {
  210. ralink,group = "uartlite";
  211. ralink,function = "uartlite";
  212. };
  213. };
  214. };
  215. rstctrl: rstctrl {
  216. compatible = "ralink,rt3352-reset", "ralink,rt2880-reset";
  217. #reset-cells = <1>;
  218. };
  219. clkctrl: clkctrl {
  220. compatible = "ralink,rt2880-clock";
  221. #clock-cells = <1>;
  222. };
  223. ethernet: ethernet@10100000 {
  224. compatible = "ralink,rt3352-eth", "ralink,rt3050-eth";
  225. reg = <0x10100000 0x10000>;
  226. resets = <&rstctrl 21>;
  227. reset-names = "fe";
  228. interrupt-parent = <&cpuintc>;
  229. interrupts = <5>;
  230. mediatek,switch = <&esw>;
  231. };
  232. esw: esw@10110000 {
  233. compatible = "ralink,rt3352-esw", "ralink,rt3050-esw";
  234. reg = <0x10110000 0x8000>;
  235. resets = <&rstctrl 23>;
  236. reset-names = "esw";
  237. interrupt-parent = <&intc>;
  238. interrupts = <17>;
  239. };
  240. usbphy: usbphy {
  241. compatible = "ralink,rt3352-usbphy";
  242. #phy-cells = <1>;
  243. resets = <&rstctrl 22 &rstctrl 25>;
  244. reset-names = "host", "device";
  245. clocks = <&clkctrl 18 &clkctrl 20>;
  246. clock-names = "host", "device";
  247. };
  248. wmac: wmac@10180000 {
  249. compatible = "ralink,rt3352-wmac", "ralink,rt2880-wmac";
  250. reg = <0x10180000 0x40000>;
  251. interrupt-parent = <&cpuintc>;
  252. interrupts = <6>;
  253. ralink,eeprom = "soc_wmac.eeprom";
  254. };
  255. ehci: ehci@101c0000 {
  256. compatible = "generic-ehci";
  257. reg = <0x101c0000 0x1000>;
  258. phys = <&usbphy 1>;
  259. phy-names = "usb";
  260. interrupt-parent = <&intc>;
  261. interrupts = <18>;
  262. status = "disabled";
  263. };
  264. ohci: ohci@101c1000 {
  265. compatible = "generic-ohci";
  266. reg = <0x101c1000 0x1000>;
  267. phys = <&usbphy 1>;
  268. phy-names = "usb";
  269. interrupt-parent = <&intc>;
  270. interrupts = <18>;
  271. status = "disabled";
  272. };
  273. };