rt2880.dtsi 3.9 KB

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  1. / {
  2. #address-cells = <1>;
  3. #size-cells = <1>;
  4. compatible = "ralink,rt2880-soc";
  5. cpus {
  6. cpu@0 {
  7. compatible = "mips,mips24KEc";
  8. };
  9. };
  10. chosen {
  11. bootargs = "console=ttyS0,57600";
  12. };
  13. aliases {
  14. serial0 = &uartlite;
  15. };
  16. cpuintc: cpuintc@0 {
  17. #address-cells = <0>;
  18. #interrupt-cells = <1>;
  19. interrupt-controller;
  20. compatible = "mti,cpu-interrupt-controller";
  21. };
  22. palmbus: palmbus@300000 {
  23. compatible = "palmbus";
  24. reg = <0x300000 0x200000>;
  25. ranges = <0x0 0x300000 0x1FFFFF>;
  26. #address-cells = <1>;
  27. #size-cells = <1>;
  28. sysc: sysc@0 {
  29. compatible = "ralink,rt2880-sysc";
  30. reg = <0x000 0x100>;
  31. };
  32. timer: timer@100 {
  33. compatible = "ralink,rt2880-timer";
  34. reg = <0x100 0x20>;
  35. interrupt-parent = <&intc>;
  36. interrupts = <1>;
  37. status = "disabled";
  38. };
  39. watchdog: watchdog@120 {
  40. compatible = "ralink,rt2880-wdt";
  41. reg = <0x120 0x10>;
  42. };
  43. intc: intc@200 {
  44. compatible = "ralink,rt2880-intc";
  45. reg = <0x200 0x100>;
  46. interrupt-controller;
  47. #interrupt-cells = <1>;
  48. interrupt-parent = <&cpuintc>;
  49. interrupts = <2>;
  50. };
  51. memc: memc@300 {
  52. compatible = "ralink,rt2880-memc";
  53. reg = <0x300 0x100>;
  54. };
  55. gpio0: gpio@600 {
  56. compatible = "ralink,rt2880-gpio";
  57. reg = <0x600 0x34>;
  58. gpio-controller;
  59. #gpio-cells = <2>;
  60. ralink,gpio-base = <0>;
  61. ralink,num-gpios = <24>;
  62. ralink,register-map = [ 00 04 08 0c
  63. 20 24 28 2c
  64. 30 34 ];
  65. };
  66. gpio1: gpio@638 {
  67. compatible = "ralink,rt2880-gpio";
  68. reg = <0x638 0x24>;
  69. gpio-controller;
  70. #gpio-cells = <2>;
  71. ralink,gpio-base = <24>;
  72. ralink,num-gpios = <16>;
  73. ralink,register-map = [ 00 04 08 0c
  74. 10 14 18 1c
  75. 20 24 ];
  76. status = "disabled";
  77. };
  78. gpio2: gpio@660 {
  79. compatible = "ralink,rt2880-gpio";
  80. reg = <0x660 0x24>;
  81. gpio-controller;
  82. #gpio-cells = <2>;
  83. ralink,gpio-base = <40>;
  84. ralink,num-gpios = <32>;
  85. ralink,register-map = [ 00 04 08 0c
  86. 10 14 18 1c
  87. 20 24 ];
  88. status = "disabled";
  89. };
  90. i2c: i2c@900 {
  91. compatible = "ralink,rt2880-i2c";
  92. reg = <0x900 0x100>;
  93. resets = <&rstctrl 9>;
  94. reset-names = "i2c";
  95. #address-cells = <1>;
  96. #size-cells = <0>;
  97. status = "disabled";
  98. pinctrl-names = "default";
  99. pinctrl-0 = <&i2c_pins>;
  100. };
  101. uartlite: uartlite@c00 {
  102. compatible = "ralink,rt2880-uart", "ns16550a";
  103. reg = <0xc00 0x100>;
  104. interrupt-parent = <&intc>;
  105. interrupts = <8>;
  106. reg-shift = <2>;
  107. };
  108. };
  109. pinctrl: pinctrl {
  110. compatible = "ralink,rt2880-pinmux";
  111. pinctrl-names = "default";
  112. pinctrl-0 = <&state_default>;
  113. state_default: pinctrl0 {
  114. sdram {
  115. ralink,group = "sdram";
  116. ralink,function = "sdram";
  117. };
  118. };
  119. i2c_pins: i2c {
  120. i2c {
  121. ralink,group = "i2c";
  122. ralink,function = "i2c";
  123. };
  124. };
  125. spi_pins: spi {
  126. spi {
  127. ralink,group = "spi";
  128. ralink,function = "spi";
  129. };
  130. };
  131. uartlite_pins: uartlite {
  132. uart {
  133. ralink,group = "uartlite";
  134. ralink,function = "uartlite";
  135. };
  136. };
  137. };
  138. rstctrl: rstctrl {
  139. compatible = "ralink,rt2880-reset";
  140. #reset-cells = <1>;
  141. };
  142. clkctrl: clkctrl {
  143. compatible = "ralink,rt2880-clock";
  144. #clock-cells = <1>;
  145. };
  146. pci: pci@440000 {
  147. compatible = "ralink,rt288x-pci";
  148. reg = <0x00440000 0x20000>;
  149. #address-cells = <1>;
  150. #size-cells = <1>;
  151. status = "disabled";
  152. };
  153. ethernet: ethernet@400000 {
  154. compatible = "ralink,rt2880-eth";
  155. reg = <0x00400000 0x10000>;
  156. #address-cells = <1>;
  157. #size-cells = <0>;
  158. resets = <&rstctrl 18>;
  159. reset-names = "fe";
  160. interrupt-parent = <&cpuintc>;
  161. interrupts = <5>;
  162. status = "disabled";
  163. port@0 {
  164. compatible = "ralink,rt2880-port", "mediatek,eth-port";
  165. reg = <0>;
  166. };
  167. mdio-bus {
  168. #address-cells = <1>;
  169. #size-cells = <0>;
  170. status = "disabled";
  171. };
  172. };
  173. wmac: wmac@480000 {
  174. compatible = "ralink,rt2880-wmac";
  175. reg = <0x480000 0x40000>;
  176. interrupt-parent = <&cpuintc>;
  177. interrupts = <6>;
  178. ralink,eeprom = "soc_wmac.eeprom";
  179. };
  180. };