103-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch 757 B

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  1. From: Felix Fietkau <nbd@nbd.name>
  2. Date: Wed, 18 May 2016 18:03:31 +0200
  3. Subject: [PATCH] MIPS: ath79: fix register address in ath79_ddr_wb_flush()
  4. ath79_ddr_wb_flush_base has the type void __iomem *, so register offsets
  5. need to be a multiple of 4.
  6. Cc: Alban Bedel <albeu@free.fr>
  7. Fixes: 24b0e3e84fbf ("MIPS: ath79: Improve the DDR controller interface")
  8. Signed-off-by: Felix Fietkau <nbd@nbd.name>
  9. ---
  10. --- a/arch/mips/ath79/common.c
  11. +++ b/arch/mips/ath79/common.c
  12. @@ -58,7 +58,7 @@ EXPORT_SYMBOL_GPL(ath79_ddr_ctrl_init);
  13. void ath79_ddr_wb_flush(u32 reg)
  14. {
  15. - void __iomem *flush_reg = ath79_ddr_wb_flush_base + reg;
  16. + void __iomem *flush_reg = ath79_ddr_wb_flush_base + reg * 4;
  17. /* Flush the DDR write buffer. */
  18. __raw_writel(0x1, flush_reg);