mach-dir-825-b1.c 5.0 KB

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  1. /*
  2. * D-Link DIR-825 rev. B1 board support
  3. *
  4. * Copyright (C) 2009-2011 Lukas Kuna, Evkanet, s.r.o.
  5. *
  6. * based on mach-wndr3700.c
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License version 2 as published
  10. * by the Free Software Foundation.
  11. */
  12. #include <linux/platform_device.h>
  13. #include <linux/delay.h>
  14. #include <linux/rtl8366.h>
  15. #include <asm/mach-ath79/ath79.h>
  16. #include "dev-eth.h"
  17. #include "dev-ap9x-pci.h"
  18. #include "dev-gpio-buttons.h"
  19. #include "dev-leds-gpio.h"
  20. #include "dev-m25p80.h"
  21. #include "dev-usb.h"
  22. #include "machtypes.h"
  23. #define DIR825B1_GPIO_LED_BLUE_USB 0
  24. #define DIR825B1_GPIO_LED_ORANGE_POWER 1
  25. #define DIR825B1_GPIO_LED_BLUE_POWER 2
  26. #define DIR825B1_GPIO_LED_BLUE_WPS 4
  27. #define DIR825B1_GPIO_LED_ORANGE_PLANET 6
  28. #define DIR825B1_GPIO_LED_BLUE_PLANET 11
  29. #define DIR825B1_GPIO_BTN_RESET 3
  30. #define DIR825B1_GPIO_BTN_WPS 8
  31. #define DIR825B1_GPIO_RTL8366_SDA 5
  32. #define DIR825B1_GPIO_RTL8366_SCK 7
  33. #define DIR825B1_KEYS_POLL_INTERVAL 20 /* msecs */
  34. #define DIR825B1_KEYS_DEBOUNCE_INTERVAL (3 * DIR825B1_KEYS_POLL_INTERVAL)
  35. #define DIR825B1_CAL0_OFFSET 0x1000
  36. #define DIR825B1_CAL1_OFFSET 0x5000
  37. #define DIR825B1_MAC0_OFFSET 0xffa0
  38. #define DIR825B1_MAC1_OFFSET 0xffb4
  39. #define DIR825B1_CAL_LOCATION_0 0x1f660000
  40. #define DIR825B1_CAL_LOCATION_1 0x1f7f0000
  41. static struct gpio_led dir825b1_leds_gpio[] __initdata = {
  42. {
  43. .name = "d-link:blue:usb",
  44. .gpio = DIR825B1_GPIO_LED_BLUE_USB,
  45. .active_low = 1,
  46. }, {
  47. .name = "d-link:orange:power",
  48. .gpio = DIR825B1_GPIO_LED_ORANGE_POWER,
  49. .active_low = 1,
  50. }, {
  51. .name = "d-link:blue:power",
  52. .gpio = DIR825B1_GPIO_LED_BLUE_POWER,
  53. .active_low = 1,
  54. }, {
  55. .name = "d-link:blue:wps",
  56. .gpio = DIR825B1_GPIO_LED_BLUE_WPS,
  57. .active_low = 1,
  58. }, {
  59. .name = "d-link:orange:planet",
  60. .gpio = DIR825B1_GPIO_LED_ORANGE_PLANET,
  61. .active_low = 1,
  62. }, {
  63. .name = "d-link:blue:planet",
  64. .gpio = DIR825B1_GPIO_LED_BLUE_PLANET,
  65. .active_low = 1,
  66. }
  67. };
  68. static struct gpio_keys_button dir825b1_gpio_keys[] __initdata = {
  69. {
  70. .desc = "reset",
  71. .type = EV_KEY,
  72. .code = KEY_RESTART,
  73. .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL,
  74. .gpio = DIR825B1_GPIO_BTN_RESET,
  75. .active_low = 1,
  76. }, {
  77. .desc = "wps",
  78. .type = EV_KEY,
  79. .code = KEY_WPS_BUTTON,
  80. .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL,
  81. .gpio = DIR825B1_GPIO_BTN_WPS,
  82. .active_low = 1,
  83. }
  84. };
  85. static struct rtl8366_initval dir825b1_rtl8366s_initvals[] = {
  86. { .reg = 0x06, .val = 0x0108 },
  87. };
  88. static struct rtl8366_platform_data dir825b1_rtl8366s_data = {
  89. .gpio_sda = DIR825B1_GPIO_RTL8366_SDA,
  90. .gpio_sck = DIR825B1_GPIO_RTL8366_SCK,
  91. .num_initvals = ARRAY_SIZE(dir825b1_rtl8366s_initvals),
  92. .initvals = dir825b1_rtl8366s_initvals,
  93. };
  94. static struct platform_device dir825b1_rtl8366s_device = {
  95. .name = RTL8366S_DRIVER_NAME,
  96. .id = -1,
  97. .dev = {
  98. .platform_data = &dir825b1_rtl8366s_data,
  99. }
  100. };
  101. static bool __init dir825b1_is_caldata_valid(u8 *p)
  102. {
  103. u16 *magic0, *magic1;
  104. magic0 = (u16 *)(p + DIR825B1_CAL0_OFFSET);
  105. magic1 = (u16 *)(p + DIR825B1_CAL1_OFFSET);
  106. return (*magic0 == 0xa55a && *magic1 == 0xa55a);
  107. }
  108. static void __init dir825b1_wlan_init(void)
  109. {
  110. u8 *caldata;
  111. u8 mac0[ETH_ALEN], mac1[ETH_ALEN];
  112. u8 wmac0[ETH_ALEN], wmac1[ETH_ALEN];
  113. caldata = (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0);
  114. if (!dir825b1_is_caldata_valid(caldata)) {
  115. caldata = (u8 *)KSEG1ADDR(DIR825B1_CAL_LOCATION_1);
  116. if (!dir825b1_is_caldata_valid(caldata)) {
  117. pr_err("no calibration data found\n");
  118. return;
  119. }
  120. }
  121. ath79_parse_ascii_mac(caldata + DIR825B1_MAC0_OFFSET, mac0);
  122. ath79_parse_ascii_mac(caldata + DIR825B1_MAC1_OFFSET, mac1);
  123. ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0);
  124. ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 0);
  125. ath79_init_mac(wmac0, mac0, 0);
  126. ath79_init_mac(wmac1, mac1, 1);
  127. ap9x_pci_setup_wmac_led_pin(0, 5);
  128. ap9x_pci_setup_wmac_led_pin(1, 5);
  129. ap94_pci_init(caldata + DIR825B1_CAL0_OFFSET, wmac0,
  130. caldata + DIR825B1_CAL1_OFFSET, wmac1);
  131. }
  132. static void __init dir825b1_setup(void)
  133. {
  134. dir825b1_wlan_init();
  135. ath79_register_mdio(0, 0x0);
  136. ath79_eth0_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
  137. ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
  138. ath79_eth0_data.speed = SPEED_1000;
  139. ath79_eth0_data.duplex = DUPLEX_FULL;
  140. ath79_eth0_pll_data.pll_1000 = 0x11110000;
  141. ath79_eth1_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
  142. ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
  143. ath79_eth1_data.phy_mask = 0x10;
  144. ath79_eth1_pll_data.pll_1000 = 0x11110000;
  145. ath79_register_eth(0);
  146. ath79_register_eth(1);
  147. ath79_register_m25p80(NULL);
  148. ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio),
  149. dir825b1_leds_gpio);
  150. ath79_register_gpio_keys_polled(-1, DIR825B1_KEYS_POLL_INTERVAL,
  151. ARRAY_SIZE(dir825b1_gpio_keys),
  152. dir825b1_gpio_keys);
  153. ath79_register_usb();
  154. platform_device_register(&dir825b1_rtl8366s_device);
  155. }
  156. MIPS_MACHINE(ATH79_MACH_DIR_825_B1, "DIR-825-B1", "D-Link DIR-825 rev. B1",
  157. dir825b1_setup);