mach-tew-823dru.c 4.8 KB

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  1. /*
  2. * TRENDnet TEW-823DRU board support
  3. *
  4. * Copyright (C) 2015 Cezary Jackiewicz <cezary.jackiewicz@gmail.com>
  5. * Copyright (C) 2014 Gabor Juhos <juhosg@openwrt.org>
  6. * Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License version 2 as published
  10. * by the Free Software Foundation.
  11. */
  12. #include <linux/gpio.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/ar8216_platform.h>
  15. #include <asm/mach-ath79/ar71xx_regs.h>
  16. #include "common.h"
  17. #include "pci.h"
  18. #include "dev-gpio-buttons.h"
  19. #include "dev-eth.h"
  20. #include "dev-leds-gpio.h"
  21. #include "dev-m25p80.h"
  22. #include "dev-usb.h"
  23. #include "dev-wmac.h"
  24. #include "machtypes.h"
  25. #define TEW_823DRU_GPIO_LED_POWER_ORANGE 14
  26. #define TEW_823DRU_GPIO_LED_POWER_GREEN 19
  27. #define TEW_823DRU_GPIO_LED_PLANET_GREEN 22
  28. #define TEW_823DRU_GPIO_LED_PLANET_ORANGE 23
  29. #define TEW_823DRU_GPIO_BTN_WPS 16
  30. #define TEW_823DRU_GPIO_BTN_RESET 17
  31. #define TEW_823DRU_KEYS_POLL_INTERVAL 20 /* msecs */
  32. #define TEW_823DRU_KEYS_DEBOUNCE_INTERVAL \
  33. (3 * TEW_823DRU_KEYS_POLL_INTERVAL)
  34. #define TEW_823DRU_WMAC_CALDATA_OFFSET 0x1000
  35. #define TEW_823DRU_LAN_MAC_OFFSET 0x04
  36. #define TEW_823DRU_WAN_MAC_OFFSET 0x18
  37. static struct gpio_led tew_823dru_leds_gpio[] __initdata = {
  38. {
  39. .name = "trendnet:green:power",
  40. .gpio = TEW_823DRU_GPIO_LED_POWER_GREEN,
  41. .active_low = 1,
  42. },
  43. {
  44. .name = "trendnet:orange:power",
  45. .gpio = TEW_823DRU_GPIO_LED_POWER_ORANGE,
  46. .active_low = 1,
  47. },
  48. {
  49. .name = "trendnet:green:planet",
  50. .gpio = TEW_823DRU_GPIO_LED_PLANET_GREEN,
  51. .active_low = 1,
  52. },
  53. {
  54. .name = "trendnet:orange:planet",
  55. .gpio = TEW_823DRU_GPIO_LED_PLANET_ORANGE,
  56. .active_low = 1,
  57. },
  58. };
  59. static struct gpio_keys_button tew_823dru_gpio_keys[] __initdata = {
  60. {
  61. .desc = "Reset button",
  62. .type = EV_KEY,
  63. .code = KEY_RESTART,
  64. .debounce_interval = TEW_823DRU_KEYS_DEBOUNCE_INTERVAL,
  65. .gpio = TEW_823DRU_GPIO_BTN_RESET,
  66. .active_low = 1,
  67. },
  68. {
  69. .desc = "WPS button",
  70. .type = EV_KEY,
  71. .code = KEY_WPS_BUTTON,
  72. .debounce_interval = TEW_823DRU_KEYS_DEBOUNCE_INTERVAL,
  73. .gpio = TEW_823DRU_GPIO_BTN_WPS,
  74. .active_low = 1,
  75. },
  76. };
  77. /* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */
  78. static struct ar8327_pad_cfg tew_823dru_ar8327_pad0_cfg = {
  79. .mode = AR8327_PAD_MAC_SGMII,
  80. .sgmii_delay_en = true,
  81. };
  82. /* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */
  83. static struct ar8327_pad_cfg tew_823dru_ar8327_pad6_cfg = {
  84. .mode = AR8327_PAD_MAC_RGMII,
  85. .txclk_delay_en = true,
  86. .rxclk_delay_en = true,
  87. .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
  88. .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
  89. };
  90. static struct ar8327_platform_data tew_823dru_ar8327_data = {
  91. .pad0_cfg = &tew_823dru_ar8327_pad0_cfg,
  92. .pad6_cfg = &tew_823dru_ar8327_pad6_cfg,
  93. .port0_cfg = {
  94. .force_link = 1,
  95. .speed = AR8327_PORT_SPEED_1000,
  96. .duplex = 1,
  97. .txpause = 1,
  98. .rxpause = 1,
  99. },
  100. .port6_cfg = {
  101. .force_link = 1,
  102. .speed = AR8327_PORT_SPEED_1000,
  103. .duplex = 1,
  104. .txpause = 1,
  105. .rxpause = 1,
  106. },
  107. };
  108. static struct mdio_board_info tew_823dru_mdio0_info[] = {
  109. {
  110. .bus_id = "ag71xx-mdio.0",
  111. .phy_addr = 0,
  112. .platform_data = &tew_823dru_ar8327_data,
  113. },
  114. };
  115. static void __init tew_823dru_setup(void)
  116. {
  117. u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000);
  118. u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
  119. u8 lan_mac[ETH_ALEN];
  120. u8 wan_mac[ETH_ALEN];
  121. ath79_parse_ascii_mac(mac + TEW_823DRU_LAN_MAC_OFFSET, lan_mac);
  122. ath79_parse_ascii_mac(mac + TEW_823DRU_WAN_MAC_OFFSET, wan_mac);
  123. ath79_register_m25p80(NULL);
  124. ath79_register_leds_gpio(-1, ARRAY_SIZE(tew_823dru_leds_gpio),
  125. tew_823dru_leds_gpio);
  126. ath79_register_gpio_keys_polled(-1, TEW_823DRU_KEYS_POLL_INTERVAL,
  127. ARRAY_SIZE(tew_823dru_gpio_keys),
  128. tew_823dru_gpio_keys);
  129. ath79_register_wmac(art + TEW_823DRU_WMAC_CALDATA_OFFSET, lan_mac);
  130. ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0);
  131. ath79_init_mac(ath79_eth0_data.mac_addr, wan_mac, 0);
  132. mdiobus_register_board_info(tew_823dru_mdio0_info,
  133. ARRAY_SIZE(tew_823dru_mdio0_info));
  134. ath79_register_mdio(0, 0x0);
  135. ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
  136. /* GMAC0 is connected to the RMGII interface */
  137. ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
  138. ath79_eth0_data.phy_mask = BIT(0);
  139. ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
  140. ath79_eth0_pll_data.pll_1000 = 0x56000000;
  141. ath79_register_eth(0);
  142. /* GMAC1 is connected to the SGMII interface */
  143. ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
  144. ath79_eth1_data.speed = SPEED_1000;
  145. ath79_eth1_data.duplex = DUPLEX_FULL;
  146. ath79_eth1_pll_data.pll_1000 = 0x03000101;
  147. ath79_register_eth(1);
  148. ath79_register_usb();
  149. ath79_register_pci();
  150. }
  151. MIPS_MACHINE(ATH79_MACH_TEW_823DRU, "TEW-823DRU", "TRENDnet TEW-823DRU",
  152. tew_823dru_setup);