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WLR-6000.dts 3.0 KB

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  1. /dts-v1/;
  2. #include "rt3883.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. / {
  6. model = "Sitecom WLR-6000";
  7. gpio-keys-polled {
  8. compatible = "gpio-keys-polled";
  9. #address-cells = <1>;
  10. #size-cells = <0>;
  11. poll-interval = <20>;
  12. reset {
  13. label = "reset";
  14. gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
  15. linux,code = <KEY_RESTART>;
  16. };
  17. };
  18. gpio-leds {
  19. compatible = "gpio-leds";
  20. power {
  21. label = "wlr-6000:red:power";
  22. gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  23. };
  24. ops {
  25. label = "wlr-6000:white:ops";
  26. gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
  27. };
  28. };
  29. gpio_export {
  30. compatible = "gpio-export";
  31. #size-cells = <0>;
  32. usb {
  33. gpio-export,name = "usb";
  34. gpio-export,output = <1>;
  35. gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
  36. };
  37. };
  38. };
  39. &gpio1 {
  40. status = "okay";
  41. };
  42. &pinctrl {
  43. state_default: pinctrl0 {
  44. gpio {
  45. ralink,group = "i2c", "jtag", "uartf";
  46. ralink,function = "gpio";
  47. };
  48. };
  49. };
  50. &ethernet {
  51. status = "okay";
  52. mtd-mac-address = <&factory 0x8004>;
  53. mtd-mac-address-increment = <1>;
  54. port@0 {
  55. phy-handle = <&phy0>;
  56. phy-mode = "rgmii";
  57. };
  58. mdio-bus {
  59. status = "okay";
  60. phy0: ethernet-phy@0 {
  61. reg = <0>;
  62. phy-mode = "rgmii";
  63. qca,ar8327-initvals = <
  64. 0x04 0x07600000 /* PORT0 PAD MODE CTRL */
  65. 0x0c 0x07600000 /* PORT6 PAD MODE CTRL */
  66. 0x10 0x40000000 /* Power-on Strapping: 176-pin interface configuration */
  67. 0x50 0xc437c437 /* LED Control Register 0 */
  68. 0x54 0xc337c337 /* LED Control Register 1 */
  69. 0x58 0x00000000 /* LED Control Register 2 */
  70. 0x5c 0x03ffff00 /* LED Control Register 3 */
  71. 0x7c 0x0000007e /* PORT0_STATUS */
  72. 0x94 0x0000007e /* PORT6 STATUS */
  73. >;
  74. };
  75. };
  76. };
  77. &spi0 {
  78. status = "okay";
  79. m25p80@0 {
  80. #address-cells = <1>;
  81. #size-cells = <1>;
  82. compatible = "jedec,spi-nor";
  83. reg = <0>;
  84. spi-max-frequency = <8600000>;
  85. m25p,fast-read;
  86. partition@0 {
  87. label = "u-boot";
  88. reg = <0x0 0x30000>;
  89. read-only;
  90. };
  91. partition@30000 {
  92. label = "u-boot-env";
  93. reg = <0x30000 0x10000>;
  94. read-only;
  95. };
  96. factory: partition@40000 {
  97. label = "factory";
  98. reg = <0x40000 0x10000>;
  99. read-only;
  100. };
  101. partition@50000 {
  102. label = "firmware";
  103. reg = <0x50000 0x713000>;
  104. };
  105. partition@763000 {
  106. label = "manufacture";
  107. reg = <0x763000 0x7D000>;
  108. read-only;
  109. };
  110. partition@7E0000 {
  111. label = "backup";
  112. reg = <0x7E0000 0x10000>;
  113. read-only;
  114. };
  115. partition@7F0000 {
  116. label = "storage";
  117. reg = <0x7F0000 0x10000>;
  118. read-only;
  119. };
  120. };
  121. };
  122. &pci {
  123. status = "okay";
  124. pinctrl-names = "default";
  125. pinctrl-0 = <&pci_pins>;
  126. pci_pins: pci {
  127. pci {
  128. ralink,group = "pci";
  129. ralink,function = "pci-fnc";
  130. };
  131. };
  132. host-bridge {
  133. pci-bridge@1 {
  134. status = "okay";
  135. wifi@1814,3091 {
  136. compatible = "pci1814,3091";
  137. reg = <0x10000 0 0 0 0>;
  138. ralink,mtd-eeprom = <&factory 0x8000>;
  139. };
  140. };
  141. };
  142. };
  143. &wmac {
  144. status = "okay";
  145. ralink,2ghz = <0>;
  146. ralink,mtd-eeprom = <&factory 0x0>;
  147. };
  148. &ehci {
  149. status = "okay";
  150. };
  151. &ohci {
  152. status = "okay";
  153. };