001-rockchip-rk3328-Add-support-for-FriendlyARM-NanoPi-R.patch 8.9 KB

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  1. From 0720be5371c806c1b89936984a321248fa739bea Mon Sep 17 00:00:00 2001
  2. From: David Bauer <mail@david-bauer.net>
  3. Date: Fri, 10 Jul 2020 15:57:46 +0200
  4. Subject: [PATCH] rockchip: rk3328: Add support for FriendlyARM NanoPi R2S
  5. This adds support for the NanoPi R2S from FriendlyARM.
  6. Rockchip RK3328 SoC
  7. 1GB DDR4 RAM
  8. Gigabit Ethernet (WAN)
  9. Gigabit Ethernet (USB3) (LAN)
  10. USB 2.0 Host Port
  11. MicroSD slot
  12. Reset button
  13. WAN - LAN - SYS LED
  14. Signed-off-by: David Bauer <mail@david-bauer.net>
  15. ---
  16. arch/arm64/boot/dts/rockchip/Makefile | 1 +
  17. .../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 368 ++++++++++++++++++
  18. 2 files changed, 369 insertions(+)
  19. create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
  20. --- a/arch/arm64/boot/dts/rockchip/Makefile
  21. +++ b/arch/arm64/boot/dts/rockchip/Makefile
  22. @@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-or
  23. dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb
  24. dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb
  25. dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb
  26. +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
  27. dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb
  28. dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb
  29. dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
  30. --- /dev/null
  31. +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
  32. @@ -0,0 +1,368 @@
  33. +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  34. +/*
  35. + * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
  36. + */
  37. +
  38. +/dts-v1/;
  39. +
  40. +#include <dt-bindings/input/input.h>
  41. +#include <dt-bindings/gpio/gpio.h>
  42. +#include "rk3328.dtsi"
  43. +
  44. +/ {
  45. + model = "FriendlyElec NanoPi R2S";
  46. + compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
  47. +
  48. + chosen {
  49. + stdout-path = "serial2:1500000n8";
  50. + };
  51. +
  52. + gmac_clk: gmac-clock {
  53. + compatible = "fixed-clock";
  54. + clock-frequency = <125000000>;
  55. + clock-output-names = "gmac_clk";
  56. + #clock-cells = <0>;
  57. + };
  58. +
  59. + keys {
  60. + compatible = "gpio-keys";
  61. + pinctrl-0 = <&reset_button_pin>;
  62. + pinctrl-names = "default";
  63. +
  64. + reset {
  65. + label = "reset";
  66. + gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
  67. + linux,code = <KEY_RESTART>;
  68. + debounce-interval = <50>;
  69. + };
  70. + };
  71. +
  72. + leds {
  73. + compatible = "gpio-leds";
  74. + pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
  75. + pinctrl-names = "default";
  76. +
  77. + lan_led: led-0 {
  78. + gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
  79. + label = "nanopi-r2s:green:lan";
  80. + };
  81. +
  82. + sys_led: led-1 {
  83. + gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
  84. + label = "nanopi-r2s:red:sys";
  85. + };
  86. +
  87. + wan_led: led-2 {
  88. + gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
  89. + label = "nanopi-r2s:green:wan";
  90. + };
  91. + };
  92. +
  93. + vcc_io_sdio: sdmmcio-regulator {
  94. + compatible = "regulator-gpio";
  95. + enable-active-high;
  96. + gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
  97. + pinctrl-0 = <&sdio_vcc_pin>;
  98. + pinctrl-names = "default";
  99. + regulator-name = "vcc_io_sdio";
  100. + regulator-always-on;
  101. + regulator-min-microvolt = <1800000>;
  102. + regulator-max-microvolt = <3300000>;
  103. + regulator-settling-time-us = <5000>;
  104. + regulator-type = "voltage";
  105. + startup-delay-us = <2000>;
  106. + states = <1800000 0x1
  107. + 3300000 0x0>;
  108. + vin-supply = <&vcc_io_33>;
  109. + };
  110. +
  111. + vcc_sd: sdmmc-regulator {
  112. + compatible = "regulator-fixed";
  113. + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
  114. + pinctrl-0 = <&sdmmc0m1_gpio>;
  115. + pinctrl-names = "default";
  116. + regulator-name = "vcc_sd";
  117. + regulator-boot-on;
  118. + regulator-min-microvolt = <3300000>;
  119. + regulator-max-microvolt = <3300000>;
  120. + vin-supply = <&vcc_io_33>;
  121. + };
  122. +
  123. + vdd_5v: vdd-5v {
  124. + compatible = "regulator-fixed";
  125. + regulator-name = "vdd_5v";
  126. + regulator-always-on;
  127. + regulator-boot-on;
  128. + regulator-min-microvolt = <5000000>;
  129. + regulator-max-microvolt = <5000000>;
  130. + };
  131. +};
  132. +
  133. +&cpu0 {
  134. + cpu-supply = <&vdd_arm>;
  135. +};
  136. +
  137. +&cpu1 {
  138. + cpu-supply = <&vdd_arm>;
  139. +};
  140. +
  141. +&cpu2 {
  142. + cpu-supply = <&vdd_arm>;
  143. +};
  144. +
  145. +&cpu3 {
  146. + cpu-supply = <&vdd_arm>;
  147. +};
  148. +
  149. +&gmac2io {
  150. + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
  151. + assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
  152. + clock_in_out = "input";
  153. + phy-handle = <&rtl8211e>;
  154. + phy-mode = "rgmii";
  155. + phy-supply = <&vcc_io_33>;
  156. + pinctrl-0 = <&rgmiim1_pins>;
  157. + pinctrl-names = "default";
  158. + rx_delay = <0x18>;
  159. + snps,aal;
  160. + tx_delay = <0x24>;
  161. + status = "okay";
  162. +
  163. + mdio {
  164. + compatible = "snps,dwmac-mdio";
  165. + #address-cells = <1>;
  166. + #size-cells = <0>;
  167. +
  168. + rtl8211e: ethernet-phy@1 {
  169. + reg = <1>;
  170. + pinctrl-0 = <&eth_phy_reset_pin>;
  171. + pinctrl-names = "default";
  172. + reset-assert-us = <10000>;
  173. + reset-deassert-us = <50000>;
  174. + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
  175. + };
  176. + };
  177. +};
  178. +
  179. +&i2c1 {
  180. + status = "okay";
  181. +
  182. + rk805: pmic@18 {
  183. + compatible = "rockchip,rk805";
  184. + reg = <0x18>;
  185. + interrupt-parent = <&gpio1>;
  186. + interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
  187. + #clock-cells = <1>;
  188. + clock-output-names = "xin32k", "rk805-clkout2";
  189. + gpio-controller;
  190. + #gpio-cells = <2>;
  191. + pinctrl-0 = <&pmic_int_l>;
  192. + pinctrl-names = "default";
  193. + rockchip,system-power-controller;
  194. + wakeup-source;
  195. +
  196. + vcc1-supply = <&vdd_5v>;
  197. + vcc2-supply = <&vdd_5v>;
  198. + vcc3-supply = <&vdd_5v>;
  199. + vcc4-supply = <&vdd_5v>;
  200. + vcc5-supply = <&vcc_io_33>;
  201. + vcc6-supply = <&vdd_5v>;
  202. +
  203. + regulators {
  204. + vdd_log: DCDC_REG1 {
  205. + regulator-name = "vdd_log";
  206. + regulator-always-on;
  207. + regulator-boot-on;
  208. + regulator-min-microvolt = <712500>;
  209. + regulator-max-microvolt = <1450000>;
  210. + regulator-ramp-delay = <12500>;
  211. +
  212. + regulator-state-mem {
  213. + regulator-on-in-suspend;
  214. + regulator-suspend-microvolt = <1000000>;
  215. + };
  216. + };
  217. +
  218. + vdd_arm: DCDC_REG2 {
  219. + regulator-name = "vdd_arm";
  220. + regulator-always-on;
  221. + regulator-boot-on;
  222. + regulator-min-microvolt = <712500>;
  223. + regulator-max-microvolt = <1450000>;
  224. + regulator-ramp-delay = <12500>;
  225. +
  226. + regulator-state-mem {
  227. + regulator-on-in-suspend;
  228. + regulator-suspend-microvolt = <950000>;
  229. + };
  230. + };
  231. +
  232. + vcc_ddr: DCDC_REG3 {
  233. + regulator-name = "vcc_ddr";
  234. + regulator-always-on;
  235. + regulator-boot-on;
  236. +
  237. + regulator-state-mem {
  238. + regulator-on-in-suspend;
  239. + };
  240. + };
  241. +
  242. + vcc_io_33: DCDC_REG4 {
  243. + regulator-name = "vcc_io_33";
  244. + regulator-always-on;
  245. + regulator-boot-on;
  246. + regulator-min-microvolt = <3300000>;
  247. + regulator-max-microvolt = <3300000>;
  248. +
  249. + regulator-state-mem {
  250. + regulator-on-in-suspend;
  251. + regulator-suspend-microvolt = <3300000>;
  252. + };
  253. + };
  254. +
  255. + vcc_18: LDO_REG1 {
  256. + regulator-name = "vcc_18";
  257. + regulator-always-on;
  258. + regulator-boot-on;
  259. + regulator-min-microvolt = <1800000>;
  260. + regulator-max-microvolt = <1800000>;
  261. +
  262. + regulator-state-mem {
  263. + regulator-on-in-suspend;
  264. + regulator-suspend-microvolt = <1800000>;
  265. + };
  266. + };
  267. +
  268. + vcc18_emmc: LDO_REG2 {
  269. + regulator-name = "vcc18_emmc";
  270. + regulator-always-on;
  271. + regulator-boot-on;
  272. + regulator-min-microvolt = <1800000>;
  273. + regulator-max-microvolt = <1800000>;
  274. +
  275. + regulator-state-mem {
  276. + regulator-on-in-suspend;
  277. + regulator-suspend-microvolt = <1800000>;
  278. + };
  279. + };
  280. +
  281. + vdd_10: LDO_REG3 {
  282. + regulator-name = "vdd_10";
  283. + regulator-always-on;
  284. + regulator-boot-on;
  285. + regulator-min-microvolt = <1000000>;
  286. + regulator-max-microvolt = <1000000>;
  287. +
  288. + regulator-state-mem {
  289. + regulator-on-in-suspend;
  290. + regulator-suspend-microvolt = <1000000>;
  291. + };
  292. + };
  293. + };
  294. + };
  295. +};
  296. +
  297. +&io_domains {
  298. + pmuio-supply = <&vcc_io_33>;
  299. + vccio1-supply = <&vcc_io_33>;
  300. + vccio2-supply = <&vcc18_emmc>;
  301. + vccio3-supply = <&vcc_io_sdio>;
  302. + vccio4-supply = <&vcc_18>;
  303. + vccio5-supply = <&vcc_io_33>;
  304. + vccio6-supply = <&vcc_io_33>;
  305. + status = "okay";
  306. +};
  307. +
  308. +&pinctrl {
  309. + button {
  310. + reset_button_pin: reset-button-pin {
  311. + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
  312. + };
  313. + };
  314. +
  315. + ethernet-phy {
  316. + eth_phy_reset_pin: eth-phy-reset-pin {
  317. + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
  318. + };
  319. + };
  320. +
  321. + leds {
  322. + lan_led_pin: lan-led-pin {
  323. + rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
  324. + };
  325. +
  326. + sys_led_pin: sys-led-pin {
  327. + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
  328. + };
  329. +
  330. + wan_led_pin: wan-led-pin {
  331. + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
  332. + };
  333. + };
  334. +
  335. + pmic {
  336. + pmic_int_l: pmic-int-l {
  337. + rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
  338. + };
  339. + };
  340. +
  341. + sd {
  342. + sdio_vcc_pin: sdio-vcc-pin {
  343. + rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
  344. + };
  345. + };
  346. +};
  347. +
  348. +&pwm2 {
  349. + status = "okay";
  350. +};
  351. +
  352. +&sdmmc {
  353. + bus-width = <4>;
  354. + cap-sd-highspeed;
  355. + disable-wp;
  356. + pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
  357. + pinctrl-names = "default";
  358. + sd-uhs-sdr12;
  359. + sd-uhs-sdr25;
  360. + sd-uhs-sdr50;
  361. + sd-uhs-sdr104;
  362. + vmmc-supply = <&vcc_sd>;
  363. + vqmmc-supply = <&vcc_io_sdio>;
  364. + status = "okay";
  365. +};
  366. +
  367. +&tsadc {
  368. + rockchip,hw-tshut-mode = <0>;
  369. + rockchip,hw-tshut-polarity = <0>;
  370. + status = "okay";
  371. +};
  372. +
  373. +&u2phy {
  374. + status = "okay";
  375. +};
  376. +
  377. +&u2phy_host {
  378. + status = "okay";
  379. +};
  380. +
  381. +&u2phy_otg {
  382. + status = "okay";
  383. +};
  384. +
  385. +&uart2 {
  386. + status = "okay";
  387. +};
  388. +
  389. +&usb20_otg {
  390. + status = "okay";
  391. + dr_mode = "host";
  392. +};
  393. +
  394. +&usb_host0_ehci {
  395. + status = "okay";
  396. +};
  397. +
  398. +&usb_host0_ohci {
  399. + status = "okay";
  400. +};