spi-rb4xx-cpld.c 7.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347
  1. /*
  2. * SPI driver for the CPLD chip on the Mikrotik RB4xx boards
  3. *
  4. * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
  5. *
  6. * This file was based on the patches for Linux 2.6.27.39 published by
  7. * MikroTik for their RouterBoard 4xx series devices.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License version 2 as published
  11. * by the Free Software Foundation.
  12. */
  13. #include <linux/types.h>
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/init.h>
  17. #include <linux/module.h>
  18. #include <linux/device.h>
  19. #include <linux/bitops.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/gpio.h>
  22. #include <linux/slab.h>
  23. #include <linux/version.h>
  24. #include <asm/mach-ath79/rb4xx_cpld.h>
  25. #define DRV_NAME "spi-rb4xx-cpld"
  26. #define DRV_DESC "RB4xx CPLD driver"
  27. #define DRV_VERSION "0.1.0"
  28. #define CPLD_CMD_WRITE_NAND 0x08 /* send cmd, n x send data, send indle */
  29. #define CPLD_CMD_WRITE_CFG 0x09 /* send cmd, n x send cfg */
  30. #define CPLD_CMD_READ_NAND 0x0a /* send cmd, send idle, n x read data */
  31. #define CPLD_CMD_READ_FAST 0x0b /* send cmd, 4 x idle, n x read data */
  32. #define CPLD_CMD_LED5_ON 0x0c /* send cmd */
  33. #define CPLD_CMD_LED5_OFF 0x0d /* send cmd */
  34. struct rb4xx_cpld {
  35. struct spi_device *spi;
  36. struct mutex lock;
  37. struct gpio_chip chip;
  38. unsigned int config;
  39. };
  40. static struct rb4xx_cpld *rb4xx_cpld;
  41. static inline struct rb4xx_cpld *gpio_to_cpld(struct gpio_chip *chip)
  42. {
  43. return container_of(chip, struct rb4xx_cpld, chip);
  44. }
  45. static int rb4xx_cpld_write_cmd(struct rb4xx_cpld *cpld, unsigned char cmd)
  46. {
  47. struct spi_transfer t[1];
  48. struct spi_message m;
  49. unsigned char tx_buf[1];
  50. int err;
  51. spi_message_init(&m);
  52. memset(&t, 0, sizeof(t));
  53. t[0].tx_buf = tx_buf;
  54. t[0].len = sizeof(tx_buf);
  55. spi_message_add_tail(&t[0], &m);
  56. tx_buf[0] = cmd;
  57. err = spi_sync(cpld->spi, &m);
  58. return err;
  59. }
  60. static int rb4xx_cpld_write_cfg(struct rb4xx_cpld *cpld, unsigned char config)
  61. {
  62. struct spi_transfer t[1];
  63. struct spi_message m;
  64. unsigned char cmd[2];
  65. int err;
  66. spi_message_init(&m);
  67. memset(&t, 0, sizeof(t));
  68. t[0].tx_buf = cmd;
  69. t[0].len = sizeof(cmd);
  70. spi_message_add_tail(&t[0], &m);
  71. cmd[0] = CPLD_CMD_WRITE_CFG;
  72. cmd[1] = config;
  73. err = spi_sync(cpld->spi, &m);
  74. return err;
  75. }
  76. static int __rb4xx_cpld_change_cfg(struct rb4xx_cpld *cpld, unsigned mask,
  77. unsigned value)
  78. {
  79. unsigned int config;
  80. int err;
  81. config = cpld->config & ~mask;
  82. config |= value;
  83. if ((cpld->config ^ config) & 0xff) {
  84. err = rb4xx_cpld_write_cfg(cpld, config);
  85. if (err)
  86. return err;
  87. }
  88. if ((cpld->config ^ config) & CPLD_CFG_nLED5) {
  89. err = rb4xx_cpld_write_cmd(cpld, (value) ? CPLD_CMD_LED5_ON :
  90. CPLD_CMD_LED5_OFF);
  91. if (err)
  92. return err;
  93. }
  94. cpld->config = config;
  95. return 0;
  96. }
  97. int rb4xx_cpld_change_cfg(unsigned mask, unsigned value)
  98. {
  99. int ret;
  100. if (rb4xx_cpld == NULL)
  101. return -ENODEV;
  102. mutex_lock(&rb4xx_cpld->lock);
  103. ret = __rb4xx_cpld_change_cfg(rb4xx_cpld, mask, value);
  104. mutex_unlock(&rb4xx_cpld->lock);
  105. return ret;
  106. }
  107. EXPORT_SYMBOL_GPL(rb4xx_cpld_change_cfg);
  108. int rb4xx_cpld_read(unsigned char *rx_buf, unsigned count)
  109. {
  110. static const unsigned char cmd[2] = { CPLD_CMD_READ_NAND, 0 };
  111. struct spi_transfer t[2] = {
  112. {
  113. .tx_buf = &cmd,
  114. .len = 2,
  115. }, {
  116. .rx_buf = rx_buf,
  117. .len = count,
  118. },
  119. };
  120. struct spi_message m;
  121. if (rb4xx_cpld == NULL)
  122. return -ENODEV;
  123. spi_message_init(&m);
  124. spi_message_add_tail(&t[0], &m);
  125. spi_message_add_tail(&t[1], &m);
  126. return spi_sync(rb4xx_cpld->spi, &m);
  127. }
  128. EXPORT_SYMBOL_GPL(rb4xx_cpld_read);
  129. int rb4xx_cpld_write(const unsigned char *buf, unsigned count)
  130. {
  131. static const unsigned char cmd = CPLD_CMD_WRITE_NAND;
  132. struct spi_transfer t[3] = {
  133. {
  134. .tx_buf = &cmd,
  135. .len = 1,
  136. }, {
  137. .tx_buf = buf,
  138. .len = count,
  139. .tx_nbits = SPI_NBITS_DUAL,
  140. }, {
  141. .len = 1,
  142. .tx_nbits = SPI_NBITS_DUAL,
  143. },
  144. };
  145. struct spi_message m;
  146. if (rb4xx_cpld == NULL)
  147. return -ENODEV;
  148. spi_message_init(&m);
  149. spi_message_add_tail(&t[0], &m);
  150. spi_message_add_tail(&t[1], &m);
  151. spi_message_add_tail(&t[2], &m);
  152. return spi_sync(rb4xx_cpld->spi, &m);
  153. }
  154. EXPORT_SYMBOL_GPL(rb4xx_cpld_write);
  155. static int rb4xx_cpld_gpio_get(struct gpio_chip *chip, unsigned offset)
  156. {
  157. struct rb4xx_cpld *cpld = gpio_to_cpld(chip);
  158. int ret;
  159. mutex_lock(&cpld->lock);
  160. ret = (cpld->config >> offset) & 1;
  161. mutex_unlock(&cpld->lock);
  162. return ret;
  163. }
  164. static void rb4xx_cpld_gpio_set(struct gpio_chip *chip, unsigned offset,
  165. int value)
  166. {
  167. struct rb4xx_cpld *cpld = gpio_to_cpld(chip);
  168. mutex_lock(&cpld->lock);
  169. __rb4xx_cpld_change_cfg(cpld, (1 << offset), !!value << offset);
  170. mutex_unlock(&cpld->lock);
  171. }
  172. static int rb4xx_cpld_gpio_direction_input(struct gpio_chip *chip,
  173. unsigned offset)
  174. {
  175. return -EOPNOTSUPP;
  176. }
  177. static int rb4xx_cpld_gpio_direction_output(struct gpio_chip *chip,
  178. unsigned offset,
  179. int value)
  180. {
  181. struct rb4xx_cpld *cpld = gpio_to_cpld(chip);
  182. int ret;
  183. mutex_lock(&cpld->lock);
  184. ret = __rb4xx_cpld_change_cfg(cpld, (1 << offset), !!value << offset);
  185. mutex_unlock(&cpld->lock);
  186. return ret;
  187. }
  188. static int rb4xx_cpld_gpio_init(struct rb4xx_cpld *cpld, unsigned int base)
  189. {
  190. int err;
  191. /* init config */
  192. cpld->config = CPLD_CFG_nLED1 | CPLD_CFG_nLED2 | CPLD_CFG_nLED3 |
  193. CPLD_CFG_nLED4 | CPLD_CFG_nCE;
  194. rb4xx_cpld_write_cfg(cpld, cpld->config);
  195. /* setup GPIO chip */
  196. cpld->chip.label = DRV_NAME;
  197. cpld->chip.get = rb4xx_cpld_gpio_get;
  198. cpld->chip.set = rb4xx_cpld_gpio_set;
  199. cpld->chip.direction_input = rb4xx_cpld_gpio_direction_input;
  200. cpld->chip.direction_output = rb4xx_cpld_gpio_direction_output;
  201. cpld->chip.base = base;
  202. cpld->chip.ngpio = CPLD_NUM_GPIOS;
  203. cpld->chip.can_sleep = 1;
  204. #if LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0)
  205. cpld->chip.dev = &cpld->spi->dev;
  206. #else
  207. cpld->chip.parent = &cpld->spi->dev;
  208. #endif
  209. cpld->chip.owner = THIS_MODULE;
  210. err = gpiochip_add(&cpld->chip);
  211. if (err)
  212. dev_err(&cpld->spi->dev, "adding GPIO chip failed, err=%d\n",
  213. err);
  214. return err;
  215. }
  216. static int rb4xx_cpld_probe(struct spi_device *spi)
  217. {
  218. struct rb4xx_cpld *cpld;
  219. struct rb4xx_cpld_platform_data *pdata;
  220. int err;
  221. pdata = spi->dev.platform_data;
  222. if (!pdata) {
  223. dev_dbg(&spi->dev, "no platform data\n");
  224. return -EINVAL;
  225. }
  226. cpld = kzalloc(sizeof(*cpld), GFP_KERNEL);
  227. if (!cpld) {
  228. dev_err(&spi->dev, "no memory for private data\n");
  229. return -ENOMEM;
  230. }
  231. mutex_init(&cpld->lock);
  232. cpld->spi = spi_dev_get(spi);
  233. dev_set_drvdata(&spi->dev, cpld);
  234. spi->mode = SPI_MODE_0 | SPI_TX_DUAL;
  235. spi->bits_per_word = 8;
  236. err = spi_setup(spi);
  237. if (err) {
  238. dev_err(&spi->dev, "spi_setup failed, err=%d\n", err);
  239. goto err_drvdata;
  240. }
  241. err = rb4xx_cpld_gpio_init(cpld, pdata->gpio_base);
  242. if (err)
  243. goto err_drvdata;
  244. rb4xx_cpld = cpld;
  245. return 0;
  246. err_drvdata:
  247. dev_set_drvdata(&spi->dev, NULL);
  248. kfree(cpld);
  249. return err;
  250. }
  251. static int rb4xx_cpld_remove(struct spi_device *spi)
  252. {
  253. struct rb4xx_cpld *cpld;
  254. rb4xx_cpld = NULL;
  255. cpld = dev_get_drvdata(&spi->dev);
  256. dev_set_drvdata(&spi->dev, NULL);
  257. kfree(cpld);
  258. return 0;
  259. }
  260. static struct spi_driver rb4xx_cpld_driver = {
  261. .driver = {
  262. .name = DRV_NAME,
  263. .bus = &spi_bus_type,
  264. .owner = THIS_MODULE,
  265. },
  266. .probe = rb4xx_cpld_probe,
  267. .remove = rb4xx_cpld_remove,
  268. };
  269. static int __init rb4xx_cpld_init(void)
  270. {
  271. return spi_register_driver(&rb4xx_cpld_driver);
  272. }
  273. module_init(rb4xx_cpld_init);
  274. static void __exit rb4xx_cpld_exit(void)
  275. {
  276. spi_unregister_driver(&rb4xx_cpld_driver);
  277. }
  278. module_exit(rb4xx_cpld_exit);
  279. MODULE_DESCRIPTION(DRV_DESC);
  280. MODULE_VERSION(DRV_VERSION);
  281. MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
  282. MODULE_LICENSE("GPL v2");