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board.c 1.3 KB

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  1. /*
  2. * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
  3. *
  4. * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published
  8. * by the Free Software Foundation.
  9. */
  10. #include <stddef.h>
  11. #include "config.h"
  12. #include "ar71xx_regs.h"
  13. #define READREG(r) *(volatile unsigned int *)(r)
  14. #define WRITEREG(r,v) *(volatile unsigned int *)(r) = v
  15. #define KSEG1ADDR(_x) (((_x) & 0x1fffffff) | 0xa0000000)
  16. #define UART_BASE 0xb8020000
  17. #define UART_TX 0
  18. #define UART_LSR 5
  19. #define UART_LSR_THRE 0x20
  20. #define UART_READ(r) READREG(UART_BASE + 4 * (r))
  21. #define UART_WRITE(r,v) WRITEREG(UART_BASE + 4 * (r), (v))
  22. void board_putc(int ch)
  23. {
  24. while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0);
  25. UART_WRITE(UART_TX, ch);
  26. while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0);
  27. }
  28. #ifdef CONFIG_BOARD_TL_WR1043ND_V1
  29. static void tlwr1043nd_init(void)
  30. {
  31. unsigned int reg = KSEG1ADDR(AR71XX_RESET_BASE);
  32. unsigned int t;
  33. t = READREG(reg + AR913X_RESET_REG_RESET_MODULE);
  34. t |= AR71XX_RESET_GE0_PHY;
  35. WRITEREG(reg + AR913X_RESET_REG_RESET_MODULE, t);
  36. /* flush write */
  37. t = READREG(reg + AR913X_RESET_REG_RESET_MODULE);
  38. }
  39. #else
  40. static inline void tlwr1043nd_init(void) {}
  41. #endif
  42. void board_init(void)
  43. {
  44. tlwr1043nd_init();
  45. }