ar7240.dtsi 1.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include "ar724x.dtsi"
  3. / {
  4. usb_phy: usb-phy {
  5. compatible = "qca,ar7200-usb-phy";
  6. reset-names = "usb-phy", "usb-ohci-dll";
  7. resets = <&rst 4>, <&rst 3>;
  8. #phy-cells = <0>;
  9. status = "disabled";
  10. };
  11. };
  12. &ahb {
  13. usb: usb@1b000000 {
  14. compatible = "generic-ohci";
  15. reg = <0x1b000000 0x1000>;
  16. interrupts = <3>;
  17. resets = <&rst 5>;
  18. reset-names = "usb-host";
  19. phy-names = "usb-phy";
  20. phys = <&usb_phy>;
  21. status = "disabled";
  22. };
  23. };
  24. &mdio0 {
  25. status = "okay";
  26. compatible = "qca,ar7240-mdio";
  27. builtin-switch;
  28. builtin_switch: switch0@1f {
  29. compatible = "qca,ar7240sw";
  30. reg = <0x1f>;
  31. resets = <&rst 8>;
  32. reset-names = "switch";
  33. qca,mib-poll-interval = <500>;
  34. mdio-bus {
  35. #address-cells = <1>;
  36. #size-cells = <0>;
  37. swphy4: ethernet-phy@4 {
  38. reg = <4>;
  39. phy-mode = "mii";
  40. };
  41. };
  42. };
  43. };
  44. &eth0 {
  45. compatible = "qca,ar7240-eth", "syscon";
  46. pll-data = <0x00110000 0x00001099 0x00991099>;
  47. resets = <&rst 9>;
  48. reset-names = "mac";
  49. phy-mode = "mii";
  50. phy-handle = <&swphy4>;
  51. };
  52. &eth1 {
  53. compatible = "qca,ar7240-eth", "syscon";
  54. pll-data = <0x00110000 0x00001099 0x00991099>;
  55. resets = <&rst 13>;
  56. reset-names = "mac";
  57. phy-mode = "gmii";
  58. fixed-link {
  59. speed = <1000>;
  60. full-duplex;
  61. };
  62. };