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ar7242_tplink_tl-wr2543-v1.dts 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. /dts-v1/;
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include "ar7242.dtsi"
  6. / {
  7. compatible = "tplink,tl-wr2543-v1", "qca,ar7242";
  8. model = "TP-Link TL-WR2543N/ND";
  9. aliases {
  10. led-boot = &system;
  11. led-failsafe = &system;
  12. led-running = &system;
  13. led-upgrade = &system;
  14. };
  15. chosen {
  16. bootargs = "console=ttyS0,115200n8";
  17. };
  18. extosc: ref {
  19. compatible = "fixed-clock";
  20. #clock-cells = <0>;
  21. clock-frequency = <40000000>;
  22. };
  23. keys {
  24. compatible = "gpio-keys-polled";
  25. poll-interval = <20>;
  26. reset {
  27. label = "reset";
  28. linux,code = <KEY_RESTART>;
  29. gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
  30. debounce-interval = <60>;
  31. };
  32. wps {
  33. label = "wps";
  34. linux,code = <KEY_WPS_BUTTON>;
  35. gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
  36. debounce-interval = <60>;
  37. };
  38. };
  39. leds {
  40. compatible = "gpio-leds";
  41. system: wps {
  42. label = "tplink:green:wps";
  43. gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
  44. };
  45. usb {
  46. label = "tplink:green:usb";
  47. gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
  48. trigger-sources = <&hub_port>;
  49. linux,default-trigger = "usbport";
  50. };
  51. };
  52. ath9k-leds {
  53. compatible = "gpio-leds";
  54. wlan2g {
  55. label = "tplink:green:wlan2g";
  56. gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
  57. linux,default-trigger = "phy0tpt";
  58. };
  59. wlan5g {
  60. label = "tplink:green:wlan5g";
  61. gpios = <&ath9k 1 GPIO_ACTIVE_LOW>;
  62. linux,default-trigger = "phy0tpt";
  63. };
  64. };
  65. rtl8367 {
  66. compatible = "realtek,rtl8367";
  67. gpio-sda = <&gpio 1 GPIO_ACTIVE_HIGH>;
  68. gpio-sck = <&gpio 6 GPIO_ACTIVE_HIGH>;
  69. realtek,extif0 = <1 0 1 1 1 1 1 1 2>;
  70. mdio-bus {
  71. #address-cells = <1>;
  72. #size-cells = <0>;
  73. status = "okay";
  74. phy0: ethernet-phy@0 {
  75. reg = <0>;
  76. };
  77. };
  78. };
  79. };
  80. &pll {
  81. clocks = <&extosc>;
  82. };
  83. &spi {
  84. status = "okay";
  85. num-cs = <1>;
  86. flash@0 {
  87. compatible = "jedec,spi-nor";
  88. reg = <0>;
  89. spi-max-frequency = <25000000>;
  90. partitions {
  91. compatible = "fixed-partitions";
  92. #address-cells = <1>;
  93. #size-cells = <1>;
  94. uboot: partition@0 {
  95. label = "u-boot";
  96. reg = <0x000000 0x020000>;
  97. read-only;
  98. };
  99. partition@20000 {
  100. compatible = "tplink,firmware";
  101. label = "firmware";
  102. reg = <0x020000 0x7d0000>;
  103. };
  104. partition@7f0000 {
  105. label = "art";
  106. reg = <0x7f0000 0x010000>;
  107. read-only;
  108. };
  109. };
  110. };
  111. };
  112. &uart {
  113. status = "okay";
  114. };
  115. &usb {
  116. #address-cells = <1>;
  117. #size-cells = <0>;
  118. status = "okay";
  119. hub_port: port@1 {
  120. reg = <1>;
  121. #trigger-source-cells = <0>;
  122. };
  123. };
  124. &usb_phy {
  125. status = "okay";
  126. };
  127. &pcie {
  128. status = "okay";
  129. ath9k: wifi@0,0 {
  130. reg = <0x0000 0 0 0 0>;
  131. #gpio-cells = <2>;
  132. gpio-controller;
  133. qca,no-eeprom;
  134. mtd-mac-address = <&uboot 0x1fc00>;
  135. };
  136. };
  137. &eth0 {
  138. status = "okay";
  139. phy-mode = "rgmii";
  140. mtd-mac-address = <&uboot 0x1fc00>;
  141. phy-handle = <&phy0>;
  142. fixed-link {
  143. speed = <1000>;
  144. full-duplex;
  145. };
  146. };