ar9344_zbtlink_zbt-wd323.dts 2.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. /dts-v1/;
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include "ar9344.dtsi"
  6. / {
  7. model = "ZBT WD323";
  8. compatible = "zbtlink,zbt-wd323", "qca,ar9344";
  9. keys {
  10. compatible = "gpio-keys";
  11. reset {
  12. label = "reset";
  13. gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
  14. linux,code = <KEY_RESTART>;
  15. };
  16. };
  17. i2c {
  18. compatible = "i2c-gpio";
  19. #address-cells = <1>;
  20. #size-cells = <0>;
  21. pinctrl-names = "default";
  22. pinctrl-0 = <&enable_gpio15 &enable_gpio19>;
  23. sda-gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
  24. scl-gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
  25. /* can be removed on 4.19 */
  26. gpios = <&gpio 19 GPIO_ACTIVE_LOW>,
  27. <&gpio 15 GPIO_ACTIVE_LOW>;
  28. pcf8563: pcf8563@51 {
  29. compatible = "nxp,pcf8563";
  30. reg = <0x51>;
  31. #clock-cells = <0>;
  32. };
  33. };
  34. leds {
  35. compatible = "gpio-leds";
  36. pinctrl-names = "default";
  37. pinctrl-0 = <&enable_gpio20_gpio22>;
  38. wifi {
  39. label = "zbt-wd323:green:wifi";
  40. gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
  41. linux,default-trigger = "phy0tpt";
  42. };
  43. lan1 {
  44. label = "zbt-wd323:orange:lan1";
  45. gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
  46. };
  47. lan2 {
  48. label = "zbt-wd323:orange:lan2";
  49. gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
  50. };
  51. };
  52. };
  53. &wdt {
  54. status = "okay";
  55. pinctrl-names = "default";
  56. pinctrl-0 = <&enable_gpio21>;
  57. };
  58. &uart {
  59. status = "okay";
  60. };
  61. &gpio {
  62. status = "okay";
  63. pinctrl-names = "default";
  64. pinctrl-0 = <&jtag_disable_pins>;
  65. };
  66. &usb {
  67. status = "okay";
  68. };
  69. &usb_phy {
  70. status = "okay";
  71. };
  72. &eth0 {
  73. status = "okay";
  74. phy-handle = <&swphy4>;
  75. mtd-mac-address = <&art 0x0>;
  76. };
  77. &eth1 {
  78. status = "okay";
  79. mtd-mac-address = <&art 0x6>;
  80. };
  81. &spi {
  82. num-chipselects = <1>;
  83. status = "okay";
  84. flash@0 {
  85. compatible = "jedec,spi-nor";
  86. spi-max-frequency = <22000000>;
  87. reg = <0>;
  88. partitions {
  89. compatible = "fixed-partitions";
  90. #address-cells = <1>;
  91. #size-cells = <1>;
  92. uboot@0 {
  93. reg = <0x0 0x40000>;
  94. read-only;
  95. };
  96. uboot-env@40000 {
  97. reg = <0x40000 0x10000>;
  98. read-only;
  99. };
  100. firmware@50000 {
  101. compatible = "denx,uimage";
  102. reg = <0x50000 0xfa0000>;
  103. };
  104. art: art@ff0000 {
  105. reg = <0xff0000 0x10000>;
  106. read-only;
  107. };
  108. };
  109. };
  110. };
  111. &wmac {
  112. status = "okay";
  113. mtd-cal-data = <&art 0x1000>;
  114. mtd-mac-address = <&art 0x1002>;
  115. };
  116. &pinmux {
  117. enable_gpio15: pinmux_enable_gpio15 {
  118. pinctrl-single,bits = <0xc 0x0 0xff000000>;
  119. };
  120. enable_gpio19: pinmux_enable_gpio19 {
  121. pinctrl-single,bits = <0x10 0x0 0xff000000>;
  122. };
  123. enable_gpio20_gpio22: pinmux_enable_gpio20_gpio22 {
  124. pinctrl-single,bits = <0x14 0x0 0xff00ff>;
  125. };
  126. enable_gpio21: pinmux_enable_gpio21 {
  127. pinctrl-single,bits = <0x14 0x0 0xff00>;
  128. };
  129. };