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qca956x.dtsi 5.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include <dt-bindings/clock/ath79-clk.h>
  3. #include "ath79.dtsi"
  4. / {
  5. compatible = "qca,qca9560";
  6. #address-cells = <1>;
  7. #size-cells = <1>;
  8. cpus {
  9. #address-cells = <1>;
  10. #size-cells = <0>;
  11. cpu@0 {
  12. device_type = "cpu";
  13. compatible = "mips,mips74Kc";
  14. clocks = <&pll ATH79_CLK_CPU>;
  15. reg = <0>;
  16. };
  17. };
  18. extosc: ref {
  19. compatible = "fixed-clock";
  20. #clock-cells = <0>;
  21. clock-output-names = "ref";
  22. clock-frequency = <25000000>;
  23. };
  24. ahb {
  25. apb {
  26. ddr_ctrl: memory-controller@18000000 {
  27. compatible = "qca,qca9560-ddr-controller",
  28. "qca,ar7240-ddr-controller";
  29. reg = <0x18000000 0x100>;
  30. #qca,ddr-wb-channel-cells = <1>;
  31. };
  32. uart: uart@18020000 {
  33. compatible = "ns16550a";
  34. reg = <0x18020000 0x20>;
  35. interrupts = <3>;
  36. clocks = <&pll ATH79_CLK_REF>;
  37. clock-names = "uart";
  38. reg-io-width = <4>;
  39. reg-shift = <2>;
  40. no-loopback-test;
  41. status = "disabled";
  42. };
  43. gpio: gpio@18040000 {
  44. compatible = "qca,qca9560-gpio",
  45. "qca,ar9340-gpio";
  46. reg = <0x18040000 0x28>;
  47. interrupts = <2>;
  48. ngpios = <24>;
  49. gpio-controller;
  50. #gpio-cells = <2>;
  51. interrupt-controller;
  52. #interrupt-cells = <2>;
  53. };
  54. pinmux: pinmux@1804002c {
  55. compatible = "pinctrl-single";
  56. reg = <0x1804002c 0x44>;
  57. #size-cells = <0>;
  58. pinctrl-single,bit-per-mux;
  59. pinctrl-single,register-width = <32>;
  60. pinctrl-single,function-mask = <0x1>;
  61. #pinctrl-cells = <2>;
  62. jtag_disable_pins: pinmux_jtag_disable_pins {
  63. pinctrl-single,bits = <0x40 0x2 0x2>;
  64. };
  65. };
  66. pll: pll-controller@18050000 {
  67. compatible = "qca,qca9560-pll", "syscon";
  68. reg = <0x18050000 0x50>;
  69. #clock-cells = <1>;
  70. clock-output-names = "cpu", "ddr", "ahb";
  71. clocks = <&extosc>;
  72. };
  73. wdt: wdt@18060008 {
  74. compatible = "qca,ar7130-wdt";
  75. reg = <0x18060008 0x8>;
  76. interrupts = <4>;
  77. clocks = <&pll ATH79_CLK_AHB>;
  78. clock-names = "wdt";
  79. };
  80. rst: reset-controller@1806001c {
  81. compatible = "qca,qca9560-reset",
  82. "qca,ar7100-reset";
  83. reg = <0x1806001c 0x4>;
  84. #reset-cells = <1>;
  85. interrupt-parent = <&cpuintc>;
  86. intc3: interrupt-controller {
  87. compatible = "qca,ar9340-intc";
  88. interrupt-parent = <&cpuintc>;
  89. interrupts = <3>;
  90. interrupt-controller;
  91. #interrupt-cells = <1>;
  92. qca,int-status-addr = <0xac>;
  93. qca,pending-bits = <0x1f000>, /* pcie rc */
  94. <0x1000000>, /* usb1 */
  95. <0x10000000>; /* usb2 */
  96. };
  97. };
  98. rst2: reset-controller@180600c0 {
  99. compatible = "qca,qca9560-reset",
  100. "qca,ar7100-reset",
  101. "simple-bus";
  102. reg = <0x180600c0 0x4>;
  103. #reset-cells = <1>;
  104. };
  105. wmac: wmac@18100000 {
  106. compatible = "qca,qca9560-wmac";
  107. reg = <0x18100000 0x10000>;
  108. interrupt-parent = <&cpuintc>;
  109. interrupts = <2>;
  110. status = "disabled";
  111. };
  112. pcie: pcie-controller@18250000 {
  113. compatible = "qcom,ar7240-pci";
  114. #address-cells = <3>;
  115. #size-cells = <2>;
  116. bus-range = <0x0 0x0>;
  117. reg = <0x18250000 0x1000>, /* CRP */
  118. <0x18280000 0x100>, /* CTRL */
  119. <0x16000000 0x1000>; /* CFG */
  120. reg-names = "crp_base", "ctrl_base", "cfg_base";
  121. ranges = <0x2000000 0 0x12000000 0x12000000 0 0x02000000 /* pci memory */
  122. 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
  123. interrupt-parent = <&intc3>;
  124. interrupts = <0>;
  125. interrupt-controller;
  126. #interrupt-cells = <1>;
  127. interrupt-map-mask = <0 0 0 1>;
  128. interrupt-map = <0 0 0 0 &pcie 0>;
  129. status = "disabled";
  130. };
  131. };
  132. usb0: usb@1b000000 {
  133. compatible = "generic-ehci";
  134. reg = <0x1b000000 0x1d8>;
  135. interrupt-parent = <&intc3>;
  136. interrupts = <1>;
  137. resets = <&rst 5>;
  138. reset-names = "usb-host";
  139. has-transaction-translator;
  140. caps-offset = <0x100>;
  141. phy-names = "usb-phy0";
  142. phys = <&usb_phy0>;
  143. status = "disabled";
  144. };
  145. usb1: usb@1b400000 {
  146. compatible = "generic-ehci";
  147. reg = <0x1b400000 0x1d8>;
  148. interrupt-parent = <&intc3>;
  149. interrupts = <2>;
  150. resets = <&rst2 5>;
  151. reset-names = "usb-host";
  152. has-transaction-translator;
  153. caps-offset = <0x100>;
  154. phy-names = "usb-phy1";
  155. phys = <&usb_phy1>;
  156. status = "disabled";
  157. };
  158. spi: spi@1f000000 {
  159. compatible = "qca,qca9560-spi", "qca,ar7100-spi";
  160. reg = <0x1f000000 0x10>;
  161. clocks = <&pll ATH79_CLK_AHB>;
  162. clock-names = "ahb";
  163. status = "disabled";
  164. #address-cells = <1>;
  165. #size-cells = <0>;
  166. };
  167. gmac: gmac@18070000 {
  168. compatible = "qca,qca9560-gmac";
  169. reg = <0x18070000 0x64>;
  170. };
  171. };
  172. usb_phy0: usb-phy {
  173. compatible = "qca,qca9560-usb-phy", "qca,ar7200-usb-phy";
  174. reset-names = "usb-phy", "usb-suspend-override";
  175. resets = <&rst 4>, <&rst 3>;
  176. #phy-cells = <0>;
  177. status = "disabled";
  178. };
  179. usb_phy1: usb-phy {
  180. compatible = "qca,qca9560-usb-phy", "qca,ar7200-usb-phy";
  181. reset-names = "usb-phy", "usb-suspend-override";
  182. resets = <&rst2 4>, <&rst2 3>;
  183. #phy-cells = <0>;
  184. status = "disabled";
  185. };
  186. };
  187. &mdio0 {
  188. resets = <&rst 22>;
  189. reset-names = "mdio";
  190. };
  191. &eth0 {
  192. compatible = "qca,qca9560-eth", "syscon";
  193. pll-data = <0x03000000 0x00000101 0x00001919>;
  194. pll-reg = <0 0x48 0>;
  195. pll-handle = <&pll>;
  196. resets = <&rst 9>;
  197. reset-names = "mac";
  198. };
  199. &mdio1 {
  200. status = "okay";
  201. resets = <&rst 23>;
  202. reset-names = "mdio";
  203. builtin-switch;
  204. builtin_switch: switch0@1f {
  205. compatible = "qca,ar8229";
  206. reg = <0x1f>;
  207. resets = <&rst 8>;
  208. reset-names = "switch";
  209. phy-mode = "gmii";
  210. qca,phy4-mii-enable;
  211. qca,mib-poll-interval = <500>;
  212. mdio-bus {
  213. #address-cells = <1>;
  214. #size-cells = <0>;
  215. swphy0: ethernet-phy@0 {
  216. reg = <0>;
  217. phy-mode = "mii";
  218. };
  219. swphy4: ethernet-phy@4 {
  220. reg = <4>;
  221. phy-mode = "mii";
  222. };
  223. };
  224. };
  225. };
  226. &eth1 {
  227. compatible = "qca,qca9560-eth", "syscon";
  228. phy-mode = "gmii";
  229. resets = <&rst 13>;
  230. reset-names = "mac";
  231. status = "disabled";
  232. fixed-link {
  233. speed = <1000>;
  234. full-duplex;
  235. };
  236. };