0028-MIPS-ath79-drop-machfiles.patch 27 KB

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  1. From badf28957b6dc400dff27bd23ba2ae75d9514be5 Mon Sep 17 00:00:00 2001
  2. From: John Crispin <john@phrozen.org>
  3. Date: Sat, 23 Jun 2018 15:04:09 +0200
  4. Subject: [PATCH 28/33] MIPS: ath79: drop machfiles
  5. With the target now being fully OF based, we can drop the legacy mach
  6. files. Boards can now boot fully of devicetree files.
  7. Signed-off-by: John Crispin <john@phrozen.org>
  8. ---
  9. arch/mips/Kconfig | 1 -
  10. arch/mips/ath79/Kconfig | 73 -------------------
  11. arch/mips/ath79/Makefile | 10 ---
  12. arch/mips/ath79/clock.c | 1 -
  13. arch/mips/ath79/mach-ap121.c | 92 ------------------------
  14. arch/mips/ath79/mach-ap136.c | 156 -----------------------------------------
  15. arch/mips/ath79/mach-ap81.c | 100 --------------------------
  16. arch/mips/ath79/mach-db120.c | 136 -----------------------------------
  17. arch/mips/ath79/mach-pb44.c | 128 ---------------------------------
  18. arch/mips/ath79/mach-ubnt-xm.c | 126 ---------------------------------
  19. arch/mips/ath79/machtypes.h | 28 --------
  20. arch/mips/ath79/setup.c | 77 +++-----------------
  21. 12 files changed, 9 insertions(+), 919 deletions(-)
  22. delete mode 100644 arch/mips/ath79/mach-ap121.c
  23. delete mode 100644 arch/mips/ath79/mach-ap136.c
  24. delete mode 100644 arch/mips/ath79/mach-ap81.c
  25. delete mode 100644 arch/mips/ath79/mach-db120.c
  26. delete mode 100644 arch/mips/ath79/mach-pb44.c
  27. delete mode 100644 arch/mips/ath79/mach-ubnt-xm.c
  28. delete mode 100644 arch/mips/ath79/machtypes.h
  29. --- a/arch/mips/Kconfig
  30. +++ b/arch/mips/Kconfig
  31. @@ -198,7 +198,6 @@ config ATH79
  32. select COMMON_CLK
  33. select CLKDEV_LOOKUP
  34. select IRQ_MIPS_CPU
  35. - select MIPS_MACHINE
  36. select SYS_HAS_CPU_MIPS32_R2
  37. select SYS_HAS_EARLY_PRINTK
  38. select SYS_SUPPORTS_32BIT_KERNEL
  39. --- a/arch/mips/ath79/Kconfig
  40. +++ b/arch/mips/ath79/Kconfig
  41. @@ -1,79 +1,6 @@
  42. # SPDX-License-Identifier: GPL-2.0
  43. if ATH79
  44. -menu "Atheros AR71XX/AR724X/AR913X machine selection"
  45. -
  46. -config ATH79_MACH_AP121
  47. - bool "Atheros AP121 reference board"
  48. - select SOC_AR933X
  49. - select ATH79_DEV_GPIO_BUTTONS
  50. - select ATH79_DEV_LEDS_GPIO
  51. - select ATH79_DEV_SPI
  52. - select ATH79_DEV_USB
  53. - select ATH79_DEV_WMAC
  54. - help
  55. - Say 'Y' here if you want your kernel to support the
  56. - Atheros AP121 reference board.
  57. -
  58. -config ATH79_MACH_AP136
  59. - bool "Atheros AP136 reference board"
  60. - select SOC_QCA955X
  61. - select ATH79_DEV_GPIO_BUTTONS
  62. - select ATH79_DEV_LEDS_GPIO
  63. - select ATH79_DEV_SPI
  64. - select ATH79_DEV_USB
  65. - select ATH79_DEV_WMAC
  66. - help
  67. - Say 'Y' here if you want your kernel to support the
  68. - Atheros AP136 reference board.
  69. -
  70. -config ATH79_MACH_AP81
  71. - bool "Atheros AP81 reference board"
  72. - select SOC_AR913X
  73. - select ATH79_DEV_GPIO_BUTTONS
  74. - select ATH79_DEV_LEDS_GPIO
  75. - select ATH79_DEV_SPI
  76. - select ATH79_DEV_USB
  77. - select ATH79_DEV_WMAC
  78. - help
  79. - Say 'Y' here if you want your kernel to support the
  80. - Atheros AP81 reference board.
  81. -
  82. -config ATH79_MACH_DB120
  83. - bool "Atheros DB120 reference board"
  84. - select SOC_AR934X
  85. - select ATH79_DEV_GPIO_BUTTONS
  86. - select ATH79_DEV_LEDS_GPIO
  87. - select ATH79_DEV_SPI
  88. - select ATH79_DEV_USB
  89. - select ATH79_DEV_WMAC
  90. - help
  91. - Say 'Y' here if you want your kernel to support the
  92. - Atheros DB120 reference board.
  93. -
  94. -config ATH79_MACH_PB44
  95. - bool "Atheros PB44 reference board"
  96. - select SOC_AR71XX
  97. - select ATH79_DEV_GPIO_BUTTONS
  98. - select ATH79_DEV_LEDS_GPIO
  99. - select ATH79_DEV_SPI
  100. - select ATH79_DEV_USB
  101. - help
  102. - Say 'Y' here if you want your kernel to support the
  103. - Atheros PB44 reference board.
  104. -
  105. -config ATH79_MACH_UBNT_XM
  106. - bool "Ubiquiti Networks XM (rev 1.0) board"
  107. - select SOC_AR724X
  108. - select ATH79_DEV_GPIO_BUTTONS
  109. - select ATH79_DEV_LEDS_GPIO
  110. - select ATH79_DEV_SPI
  111. - help
  112. - Say 'Y' here if you want your kernel to support the
  113. - Ubiquiti Networks XM (rev 1.0) board.
  114. -
  115. -endmenu
  116. -
  117. config SOC_AR71XX
  118. select HW_HAS_PCI
  119. def_bool n
  120. --- a/arch/mips/ath79/Makefile
  121. +++ b/arch/mips/ath79/Makefile
  122. @@ -22,13 +22,3 @@ obj-$(CONFIG_ATH79_DEV_LEDS_GPIO) += dev
  123. obj-$(CONFIG_ATH79_DEV_SPI) += dev-spi.o
  124. obj-$(CONFIG_ATH79_DEV_USB) += dev-usb.o
  125. obj-$(CONFIG_ATH79_DEV_WMAC) += dev-wmac.o
  126. -
  127. -#
  128. -# Machines
  129. -#
  130. -obj-$(CONFIG_ATH79_MACH_AP121) += mach-ap121.o
  131. -obj-$(CONFIG_ATH79_MACH_AP136) += mach-ap136.o
  132. -obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o
  133. -obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o
  134. -obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o
  135. -obj-$(CONFIG_ATH79_MACH_UBNT_XM) += mach-ubnt-xm.o
  136. --- a/arch/mips/ath79/clock.c
  137. +++ b/arch/mips/ath79/clock.c
  138. @@ -26,7 +26,6 @@
  139. #include <asm/mach-ath79/ath79.h>
  140. #include <asm/mach-ath79/ar71xx_regs.h>
  141. #include "common.h"
  142. -#include "machtypes.h"
  143. #define AR71XX_BASE_FREQ 40000000
  144. #define AR724X_BASE_FREQ 40000000
  145. --- a/arch/mips/ath79/mach-ap121.c
  146. +++ /dev/null
  147. @@ -1,92 +0,0 @@
  148. -/*
  149. - * Atheros AP121 board support
  150. - *
  151. - * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
  152. - *
  153. - * This program is free software; you can redistribute it and/or modify it
  154. - * under the terms of the GNU General Public License version 2 as published
  155. - * by the Free Software Foundation.
  156. - */
  157. -
  158. -#include "machtypes.h"
  159. -#include "dev-gpio-buttons.h"
  160. -#include "dev-leds-gpio.h"
  161. -#include "dev-spi.h"
  162. -#include "dev-usb.h"
  163. -#include "dev-wmac.h"
  164. -
  165. -#define AP121_GPIO_LED_WLAN 0
  166. -#define AP121_GPIO_LED_USB 1
  167. -
  168. -#define AP121_GPIO_BTN_JUMPSTART 11
  169. -#define AP121_GPIO_BTN_RESET 12
  170. -
  171. -#define AP121_KEYS_POLL_INTERVAL 20 /* msecs */
  172. -#define AP121_KEYS_DEBOUNCE_INTERVAL (3 * AP121_KEYS_POLL_INTERVAL)
  173. -
  174. -#define AP121_CAL_DATA_ADDR 0x1fff1000
  175. -
  176. -static struct gpio_led ap121_leds_gpio[] __initdata = {
  177. - {
  178. - .name = "ap121:green:usb",
  179. - .gpio = AP121_GPIO_LED_USB,
  180. - .active_low = 0,
  181. - },
  182. - {
  183. - .name = "ap121:green:wlan",
  184. - .gpio = AP121_GPIO_LED_WLAN,
  185. - .active_low = 0,
  186. - },
  187. -};
  188. -
  189. -static struct gpio_keys_button ap121_gpio_keys[] __initdata = {
  190. - {
  191. - .desc = "jumpstart button",
  192. - .type = EV_KEY,
  193. - .code = KEY_WPS_BUTTON,
  194. - .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL,
  195. - .gpio = AP121_GPIO_BTN_JUMPSTART,
  196. - .active_low = 1,
  197. - },
  198. - {
  199. - .desc = "reset button",
  200. - .type = EV_KEY,
  201. - .code = KEY_RESTART,
  202. - .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL,
  203. - .gpio = AP121_GPIO_BTN_RESET,
  204. - .active_low = 1,
  205. - }
  206. -};
  207. -
  208. -static struct spi_board_info ap121_spi_info[] = {
  209. - {
  210. - .bus_num = 0,
  211. - .chip_select = 0,
  212. - .max_speed_hz = 25000000,
  213. - .modalias = "mx25l1606e",
  214. - }
  215. -};
  216. -
  217. -static struct ath79_spi_platform_data ap121_spi_data = {
  218. - .bus_num = 0,
  219. - .num_chipselect = 1,
  220. -};
  221. -
  222. -static void __init ap121_setup(void)
  223. -{
  224. - u8 *cal_data = (u8 *) KSEG1ADDR(AP121_CAL_DATA_ADDR);
  225. -
  226. - ath79_register_leds_gpio(-1, ARRAY_SIZE(ap121_leds_gpio),
  227. - ap121_leds_gpio);
  228. - ath79_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL,
  229. - ARRAY_SIZE(ap121_gpio_keys),
  230. - ap121_gpio_keys);
  231. -
  232. - ath79_register_spi(&ap121_spi_data, ap121_spi_info,
  233. - ARRAY_SIZE(ap121_spi_info));
  234. - ath79_register_usb();
  235. - ath79_register_wmac(cal_data);
  236. -}
  237. -
  238. -MIPS_MACHINE(ATH79_MACH_AP121, "AP121", "Atheros AP121 reference board",
  239. - ap121_setup);
  240. --- a/arch/mips/ath79/mach-ap136.c
  241. +++ /dev/null
  242. @@ -1,156 +0,0 @@
  243. -/*
  244. - * Qualcomm Atheros AP136 reference board support
  245. - *
  246. - * Copyright (c) 2012 Qualcomm Atheros
  247. - * Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
  248. - *
  249. - * Permission to use, copy, modify, and/or distribute this software for any
  250. - * purpose with or without fee is hereby granted, provided that the above
  251. - * copyright notice and this permission notice appear in all copies.
  252. - *
  253. - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  254. - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  255. - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  256. - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  257. - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  258. - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  259. - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  260. - *
  261. - */
  262. -
  263. -#include <linux/pci.h>
  264. -#include <linux/ath9k_platform.h>
  265. -
  266. -#include "machtypes.h"
  267. -#include "dev-gpio-buttons.h"
  268. -#include "dev-leds-gpio.h"
  269. -#include "dev-spi.h"
  270. -#include "dev-usb.h"
  271. -#include "dev-wmac.h"
  272. -#include "pci.h"
  273. -
  274. -#define AP136_GPIO_LED_STATUS_RED 14
  275. -#define AP136_GPIO_LED_STATUS_GREEN 19
  276. -#define AP136_GPIO_LED_USB 4
  277. -#define AP136_GPIO_LED_WLAN_2G 13
  278. -#define AP136_GPIO_LED_WLAN_5G 12
  279. -#define AP136_GPIO_LED_WPS_RED 15
  280. -#define AP136_GPIO_LED_WPS_GREEN 20
  281. -
  282. -#define AP136_GPIO_BTN_WPS 16
  283. -#define AP136_GPIO_BTN_RFKILL 21
  284. -
  285. -#define AP136_KEYS_POLL_INTERVAL 20 /* msecs */
  286. -#define AP136_KEYS_DEBOUNCE_INTERVAL (3 * AP136_KEYS_POLL_INTERVAL)
  287. -
  288. -#define AP136_WMAC_CALDATA_OFFSET 0x1000
  289. -#define AP136_PCIE_CALDATA_OFFSET 0x5000
  290. -
  291. -static struct gpio_led ap136_leds_gpio[] __initdata = {
  292. - {
  293. - .name = "qca:green:status",
  294. - .gpio = AP136_GPIO_LED_STATUS_GREEN,
  295. - .active_low = 1,
  296. - },
  297. - {
  298. - .name = "qca:red:status",
  299. - .gpio = AP136_GPIO_LED_STATUS_RED,
  300. - .active_low = 1,
  301. - },
  302. - {
  303. - .name = "qca:green:wps",
  304. - .gpio = AP136_GPIO_LED_WPS_GREEN,
  305. - .active_low = 1,
  306. - },
  307. - {
  308. - .name = "qca:red:wps",
  309. - .gpio = AP136_GPIO_LED_WPS_RED,
  310. - .active_low = 1,
  311. - },
  312. - {
  313. - .name = "qca:red:wlan-2g",
  314. - .gpio = AP136_GPIO_LED_WLAN_2G,
  315. - .active_low = 1,
  316. - },
  317. - {
  318. - .name = "qca:red:usb",
  319. - .gpio = AP136_GPIO_LED_USB,
  320. - .active_low = 1,
  321. - }
  322. -};
  323. -
  324. -static struct gpio_keys_button ap136_gpio_keys[] __initdata = {
  325. - {
  326. - .desc = "WPS button",
  327. - .type = EV_KEY,
  328. - .code = KEY_WPS_BUTTON,
  329. - .debounce_interval = AP136_KEYS_DEBOUNCE_INTERVAL,
  330. - .gpio = AP136_GPIO_BTN_WPS,
  331. - .active_low = 1,
  332. - },
  333. - {
  334. - .desc = "RFKILL button",
  335. - .type = EV_KEY,
  336. - .code = KEY_RFKILL,
  337. - .debounce_interval = AP136_KEYS_DEBOUNCE_INTERVAL,
  338. - .gpio = AP136_GPIO_BTN_RFKILL,
  339. - .active_low = 1,
  340. - },
  341. -};
  342. -
  343. -static struct spi_board_info ap136_spi_info[] = {
  344. - {
  345. - .bus_num = 0,
  346. - .chip_select = 0,
  347. - .max_speed_hz = 25000000,
  348. - .modalias = "mx25l6405d",
  349. - }
  350. -};
  351. -
  352. -static struct ath79_spi_platform_data ap136_spi_data = {
  353. - .bus_num = 0,
  354. - .num_chipselect = 1,
  355. -};
  356. -
  357. -#ifdef CONFIG_PCI
  358. -static struct ath9k_platform_data ap136_ath9k_data;
  359. -
  360. -static int ap136_pci_plat_dev_init(struct pci_dev *dev)
  361. -{
  362. - if (dev->bus->number == 1 && (PCI_SLOT(dev->devfn)) == 0)
  363. - dev->dev.platform_data = &ap136_ath9k_data;
  364. -
  365. - return 0;
  366. -}
  367. -
  368. -static void __init ap136_pci_init(u8 *eeprom)
  369. -{
  370. - memcpy(ap136_ath9k_data.eeprom_data, eeprom,
  371. - sizeof(ap136_ath9k_data.eeprom_data));
  372. -
  373. - ath79_pci_set_plat_dev_init(ap136_pci_plat_dev_init);
  374. - ath79_register_pci();
  375. -}
  376. -#else
  377. -static inline void ap136_pci_init(u8 *eeprom) {}
  378. -#endif /* CONFIG_PCI */
  379. -
  380. -static void __init ap136_setup(void)
  381. -{
  382. - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
  383. -
  384. - ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio),
  385. - ap136_leds_gpio);
  386. - ath79_register_gpio_keys_polled(-1, AP136_KEYS_POLL_INTERVAL,
  387. - ARRAY_SIZE(ap136_gpio_keys),
  388. - ap136_gpio_keys);
  389. - ath79_register_spi(&ap136_spi_data, ap136_spi_info,
  390. - ARRAY_SIZE(ap136_spi_info));
  391. - ath79_register_usb();
  392. - ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET);
  393. - ap136_pci_init(art + AP136_PCIE_CALDATA_OFFSET);
  394. -}
  395. -
  396. -MIPS_MACHINE(ATH79_MACH_AP136_010, "AP136-010",
  397. - "Atheros AP136-010 reference board",
  398. - ap136_setup);
  399. --- a/arch/mips/ath79/mach-ap81.c
  400. +++ /dev/null
  401. @@ -1,100 +0,0 @@
  402. -/*
  403. - * Atheros AP81 board support
  404. - *
  405. - * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
  406. - * Copyright (C) 2009 Imre Kaloz <kaloz@openwrt.org>
  407. - *
  408. - * This program is free software; you can redistribute it and/or modify it
  409. - * under the terms of the GNU General Public License version 2 as published
  410. - * by the Free Software Foundation.
  411. - */
  412. -
  413. -#include "machtypes.h"
  414. -#include "dev-wmac.h"
  415. -#include "dev-gpio-buttons.h"
  416. -#include "dev-leds-gpio.h"
  417. -#include "dev-spi.h"
  418. -#include "dev-usb.h"
  419. -
  420. -#define AP81_GPIO_LED_STATUS 1
  421. -#define AP81_GPIO_LED_AOSS 3
  422. -#define AP81_GPIO_LED_WLAN 6
  423. -#define AP81_GPIO_LED_POWER 14
  424. -
  425. -#define AP81_GPIO_BTN_SW4 12
  426. -#define AP81_GPIO_BTN_SW1 21
  427. -
  428. -#define AP81_KEYS_POLL_INTERVAL 20 /* msecs */
  429. -#define AP81_KEYS_DEBOUNCE_INTERVAL (3 * AP81_KEYS_POLL_INTERVAL)
  430. -
  431. -#define AP81_CAL_DATA_ADDR 0x1fff1000
  432. -
  433. -static struct gpio_led ap81_leds_gpio[] __initdata = {
  434. - {
  435. - .name = "ap81:green:status",
  436. - .gpio = AP81_GPIO_LED_STATUS,
  437. - .active_low = 1,
  438. - }, {
  439. - .name = "ap81:amber:aoss",
  440. - .gpio = AP81_GPIO_LED_AOSS,
  441. - .active_low = 1,
  442. - }, {
  443. - .name = "ap81:green:wlan",
  444. - .gpio = AP81_GPIO_LED_WLAN,
  445. - .active_low = 1,
  446. - }, {
  447. - .name = "ap81:green:power",
  448. - .gpio = AP81_GPIO_LED_POWER,
  449. - .active_low = 1,
  450. - }
  451. -};
  452. -
  453. -static struct gpio_keys_button ap81_gpio_keys[] __initdata = {
  454. - {
  455. - .desc = "sw1",
  456. - .type = EV_KEY,
  457. - .code = BTN_0,
  458. - .debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL,
  459. - .gpio = AP81_GPIO_BTN_SW1,
  460. - .active_low = 1,
  461. - } , {
  462. - .desc = "sw4",
  463. - .type = EV_KEY,
  464. - .code = BTN_1,
  465. - .debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL,
  466. - .gpio = AP81_GPIO_BTN_SW4,
  467. - .active_low = 1,
  468. - }
  469. -};
  470. -
  471. -static struct spi_board_info ap81_spi_info[] = {
  472. - {
  473. - .bus_num = 0,
  474. - .chip_select = 0,
  475. - .max_speed_hz = 25000000,
  476. - .modalias = "m25p64",
  477. - }
  478. -};
  479. -
  480. -static struct ath79_spi_platform_data ap81_spi_data = {
  481. - .bus_num = 0,
  482. - .num_chipselect = 1,
  483. -};
  484. -
  485. -static void __init ap81_setup(void)
  486. -{
  487. - u8 *cal_data = (u8 *) KSEG1ADDR(AP81_CAL_DATA_ADDR);
  488. -
  489. - ath79_register_leds_gpio(-1, ARRAY_SIZE(ap81_leds_gpio),
  490. - ap81_leds_gpio);
  491. - ath79_register_gpio_keys_polled(-1, AP81_KEYS_POLL_INTERVAL,
  492. - ARRAY_SIZE(ap81_gpio_keys),
  493. - ap81_gpio_keys);
  494. - ath79_register_spi(&ap81_spi_data, ap81_spi_info,
  495. - ARRAY_SIZE(ap81_spi_info));
  496. - ath79_register_wmac(cal_data);
  497. - ath79_register_usb();
  498. -}
  499. -
  500. -MIPS_MACHINE(ATH79_MACH_AP81, "AP81", "Atheros AP81 reference board",
  501. - ap81_setup);
  502. --- a/arch/mips/ath79/mach-db120.c
  503. +++ /dev/null
  504. @@ -1,136 +0,0 @@
  505. -/*
  506. - * Atheros DB120 reference board support
  507. - *
  508. - * Copyright (c) 2011 Qualcomm Atheros
  509. - * Copyright (c) 2011 Gabor Juhos <juhosg@openwrt.org>
  510. - *
  511. - * Permission to use, copy, modify, and/or distribute this software for any
  512. - * purpose with or without fee is hereby granted, provided that the above
  513. - * copyright notice and this permission notice appear in all copies.
  514. - *
  515. - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  516. - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  517. - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  518. - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  519. - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  520. - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  521. - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  522. - *
  523. - */
  524. -
  525. -#include <linux/pci.h>
  526. -#include <linux/ath9k_platform.h>
  527. -
  528. -#include "machtypes.h"
  529. -#include "dev-gpio-buttons.h"
  530. -#include "dev-leds-gpio.h"
  531. -#include "dev-spi.h"
  532. -#include "dev-usb.h"
  533. -#include "dev-wmac.h"
  534. -#include "pci.h"
  535. -
  536. -#define DB120_GPIO_LED_WLAN_5G 12
  537. -#define DB120_GPIO_LED_WLAN_2G 13
  538. -#define DB120_GPIO_LED_STATUS 14
  539. -#define DB120_GPIO_LED_WPS 15
  540. -
  541. -#define DB120_GPIO_BTN_WPS 16
  542. -
  543. -#define DB120_KEYS_POLL_INTERVAL 20 /* msecs */
  544. -#define DB120_KEYS_DEBOUNCE_INTERVAL (3 * DB120_KEYS_POLL_INTERVAL)
  545. -
  546. -#define DB120_WMAC_CALDATA_OFFSET 0x1000
  547. -#define DB120_PCIE_CALDATA_OFFSET 0x5000
  548. -
  549. -static struct gpio_led db120_leds_gpio[] __initdata = {
  550. - {
  551. - .name = "db120:green:status",
  552. - .gpio = DB120_GPIO_LED_STATUS,
  553. - .active_low = 1,
  554. - },
  555. - {
  556. - .name = "db120:green:wps",
  557. - .gpio = DB120_GPIO_LED_WPS,
  558. - .active_low = 1,
  559. - },
  560. - {
  561. - .name = "db120:green:wlan-5g",
  562. - .gpio = DB120_GPIO_LED_WLAN_5G,
  563. - .active_low = 1,
  564. - },
  565. - {
  566. - .name = "db120:green:wlan-2g",
  567. - .gpio = DB120_GPIO_LED_WLAN_2G,
  568. - .active_low = 1,
  569. - },
  570. -};
  571. -
  572. -static struct gpio_keys_button db120_gpio_keys[] __initdata = {
  573. - {
  574. - .desc = "WPS button",
  575. - .type = EV_KEY,
  576. - .code = KEY_WPS_BUTTON,
  577. - .debounce_interval = DB120_KEYS_DEBOUNCE_INTERVAL,
  578. - .gpio = DB120_GPIO_BTN_WPS,
  579. - .active_low = 1,
  580. - },
  581. -};
  582. -
  583. -static struct spi_board_info db120_spi_info[] = {
  584. - {
  585. - .bus_num = 0,
  586. - .chip_select = 0,
  587. - .max_speed_hz = 25000000,
  588. - .modalias = "s25sl064a",
  589. - }
  590. -};
  591. -
  592. -static struct ath79_spi_platform_data db120_spi_data = {
  593. - .bus_num = 0,
  594. - .num_chipselect = 1,
  595. -};
  596. -
  597. -#ifdef CONFIG_PCI
  598. -static struct ath9k_platform_data db120_ath9k_data;
  599. -
  600. -static int db120_pci_plat_dev_init(struct pci_dev *dev)
  601. -{
  602. - switch (PCI_SLOT(dev->devfn)) {
  603. - case 0:
  604. - dev->dev.platform_data = &db120_ath9k_data;
  605. - break;
  606. - }
  607. -
  608. - return 0;
  609. -}
  610. -
  611. -static void __init db120_pci_init(u8 *eeprom)
  612. -{
  613. - memcpy(db120_ath9k_data.eeprom_data, eeprom,
  614. - sizeof(db120_ath9k_data.eeprom_data));
  615. -
  616. - ath79_pci_set_plat_dev_init(db120_pci_plat_dev_init);
  617. - ath79_register_pci();
  618. -}
  619. -#else
  620. -static inline void db120_pci_init(u8 *eeprom) {}
  621. -#endif /* CONFIG_PCI */
  622. -
  623. -static void __init db120_setup(void)
  624. -{
  625. - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
  626. -
  627. - ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio),
  628. - db120_leds_gpio);
  629. - ath79_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL,
  630. - ARRAY_SIZE(db120_gpio_keys),
  631. - db120_gpio_keys);
  632. - ath79_register_spi(&db120_spi_data, db120_spi_info,
  633. - ARRAY_SIZE(db120_spi_info));
  634. - ath79_register_usb();
  635. - ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET);
  636. - db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET);
  637. -}
  638. -
  639. -MIPS_MACHINE(ATH79_MACH_DB120, "DB120", "Atheros DB120 reference board",
  640. - db120_setup);
  641. --- a/arch/mips/ath79/mach-pb44.c
  642. +++ /dev/null
  643. @@ -1,122 +0,0 @@
  644. -/*
  645. - * Atheros PB44 reference board support
  646. - *
  647. - * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
  648. - *
  649. - * This program is free software; you can redistribute it and/or modify it
  650. - * under the terms of the GNU General Public License version 2 as published
  651. - * by the Free Software Foundation.
  652. - */
  653. -
  654. -#include <linux/init.h>
  655. -#include <linux/platform_device.h>
  656. -#include <linux/i2c.h>
  657. -#include <linux/i2c-gpio.h>
  658. -#include <linux/platform_data/pcf857x.h>
  659. -
  660. -#include "machtypes.h"
  661. -#include "dev-gpio-buttons.h"
  662. -#include "dev-leds-gpio.h"
  663. -#include "dev-spi.h"
  664. -#include "dev-usb.h"
  665. -#include "pci.h"
  666. -
  667. -#define PB44_GPIO_I2C_SCL 0
  668. -#define PB44_GPIO_I2C_SDA 1
  669. -
  670. -#define PB44_GPIO_EXP_BASE 16
  671. -#define PB44_GPIO_SW_RESET (PB44_GPIO_EXP_BASE + 6)
  672. -#define PB44_GPIO_SW_JUMP (PB44_GPIO_EXP_BASE + 8)
  673. -#define PB44_GPIO_LED_JUMP1 (PB44_GPIO_EXP_BASE + 9)
  674. -#define PB44_GPIO_LED_JUMP2 (PB44_GPIO_EXP_BASE + 10)
  675. -
  676. -#define PB44_KEYS_POLL_INTERVAL 20 /* msecs */
  677. -#define PB44_KEYS_DEBOUNCE_INTERVAL (3 * PB44_KEYS_POLL_INTERVAL)
  678. -
  679. -static struct i2c_gpio_platform_data pb44_i2c_gpio_data = {
  680. - .sda_pin = PB44_GPIO_I2C_SDA,
  681. - .scl_pin = PB44_GPIO_I2C_SCL,
  682. -};
  683. -
  684. -static struct platform_device pb44_i2c_gpio_device = {
  685. - .name = "i2c-gpio",
  686. - .id = 0,
  687. - .dev = {
  688. - .platform_data = &pb44_i2c_gpio_data,
  689. - }
  690. -};
  691. -
  692. -static struct pcf857x_platform_data pb44_pcf857x_data = {
  693. - .gpio_base = PB44_GPIO_EXP_BASE,
  694. -};
  695. -
  696. -static struct i2c_board_info pb44_i2c_board_info[] __initdata = {
  697. - {
  698. - I2C_BOARD_INFO("pcf8575", 0x20),
  699. - .platform_data = &pb44_pcf857x_data,
  700. - },
  701. -};
  702. -
  703. -static struct gpio_led pb44_leds_gpio[] __initdata = {
  704. - {
  705. - .name = "pb44:amber:jump1",
  706. - .gpio = PB44_GPIO_LED_JUMP1,
  707. - .active_low = 1,
  708. - }, {
  709. - .name = "pb44:green:jump2",
  710. - .gpio = PB44_GPIO_LED_JUMP2,
  711. - .active_low = 1,
  712. - },
  713. -};
  714. -
  715. -static struct gpio_keys_button pb44_gpio_keys[] __initdata = {
  716. - {
  717. - .desc = "soft_reset",
  718. - .type = EV_KEY,
  719. - .code = KEY_RESTART,
  720. - .debounce_interval = PB44_KEYS_DEBOUNCE_INTERVAL,
  721. - .gpio = PB44_GPIO_SW_RESET,
  722. - .active_low = 1,
  723. - } , {
  724. - .desc = "jumpstart",
  725. - .type = EV_KEY,
  726. - .code = KEY_WPS_BUTTON,
  727. - .debounce_interval = PB44_KEYS_DEBOUNCE_INTERVAL,
  728. - .gpio = PB44_GPIO_SW_JUMP,
  729. - .active_low = 1,
  730. - }
  731. -};
  732. -
  733. -static struct spi_board_info pb44_spi_info[] = {
  734. - {
  735. - .bus_num = 0,
  736. - .chip_select = 0,
  737. - .max_speed_hz = 25000000,
  738. - .modalias = "m25p64",
  739. - },
  740. -};
  741. -
  742. -static struct ath79_spi_platform_data pb44_spi_data = {
  743. - .bus_num = 0,
  744. - .num_chipselect = 1,
  745. -};
  746. -
  747. -static void __init pb44_init(void)
  748. -{
  749. - i2c_register_board_info(0, pb44_i2c_board_info,
  750. - ARRAY_SIZE(pb44_i2c_board_info));
  751. - platform_device_register(&pb44_i2c_gpio_device);
  752. -
  753. - ath79_register_leds_gpio(-1, ARRAY_SIZE(pb44_leds_gpio),
  754. - pb44_leds_gpio);
  755. - ath79_register_gpio_keys_polled(-1, PB44_KEYS_POLL_INTERVAL,
  756. - ARRAY_SIZE(pb44_gpio_keys),
  757. - pb44_gpio_keys);
  758. - ath79_register_spi(&pb44_spi_data, pb44_spi_info,
  759. - ARRAY_SIZE(pb44_spi_info));
  760. - ath79_register_usb();
  761. - ath79_register_pci();
  762. -}
  763. -
  764. -MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board",
  765. - pb44_init);
  766. --- a/arch/mips/ath79/mach-ubnt-xm.c
  767. +++ /dev/null
  768. @@ -1,126 +0,0 @@
  769. -/*
  770. - * Ubiquiti Networks XM (rev 1.0) board support
  771. - *
  772. - * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
  773. - *
  774. - * Derived from: mach-pb44.c
  775. - *
  776. - * This program is free software; you can redistribute it and/or modify it
  777. - * under the terms of the GNU General Public License version 2 as published
  778. - * by the Free Software Foundation.
  779. - */
  780. -
  781. -#include <linux/init.h>
  782. -#include <linux/pci.h>
  783. -#include <linux/ath9k_platform.h>
  784. -
  785. -#include <asm/mach-ath79/irq.h>
  786. -
  787. -#include "machtypes.h"
  788. -#include "dev-gpio-buttons.h"
  789. -#include "dev-leds-gpio.h"
  790. -#include "dev-spi.h"
  791. -#include "pci.h"
  792. -
  793. -#define UBNT_XM_GPIO_LED_L1 0
  794. -#define UBNT_XM_GPIO_LED_L2 1
  795. -#define UBNT_XM_GPIO_LED_L3 11
  796. -#define UBNT_XM_GPIO_LED_L4 7
  797. -
  798. -#define UBNT_XM_GPIO_BTN_RESET 12
  799. -
  800. -#define UBNT_XM_KEYS_POLL_INTERVAL 20
  801. -#define UBNT_XM_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_XM_KEYS_POLL_INTERVAL)
  802. -
  803. -#define UBNT_XM_EEPROM_ADDR (u8 *) KSEG1ADDR(0x1fff1000)
  804. -
  805. -static struct gpio_led ubnt_xm_leds_gpio[] __initdata = {
  806. - {
  807. - .name = "ubnt-xm:red:link1",
  808. - .gpio = UBNT_XM_GPIO_LED_L1,
  809. - .active_low = 0,
  810. - }, {
  811. - .name = "ubnt-xm:orange:link2",
  812. - .gpio = UBNT_XM_GPIO_LED_L2,
  813. - .active_low = 0,
  814. - }, {
  815. - .name = "ubnt-xm:green:link3",
  816. - .gpio = UBNT_XM_GPIO_LED_L3,
  817. - .active_low = 0,
  818. - }, {
  819. - .name = "ubnt-xm:green:link4",
  820. - .gpio = UBNT_XM_GPIO_LED_L4,
  821. - .active_low = 0,
  822. - },
  823. -};
  824. -
  825. -static struct gpio_keys_button ubnt_xm_gpio_keys[] __initdata = {
  826. - {
  827. - .desc = "reset",
  828. - .type = EV_KEY,
  829. - .code = KEY_RESTART,
  830. - .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL,
  831. - .gpio = UBNT_XM_GPIO_BTN_RESET,
  832. - .active_low = 1,
  833. - }
  834. -};
  835. -
  836. -static struct spi_board_info ubnt_xm_spi_info[] = {
  837. - {
  838. - .bus_num = 0,
  839. - .chip_select = 0,
  840. - .max_speed_hz = 25000000,
  841. - .modalias = "mx25l6405d",
  842. - }
  843. -};
  844. -
  845. -static struct ath79_spi_platform_data ubnt_xm_spi_data = {
  846. - .bus_num = 0,
  847. - .num_chipselect = 1,
  848. -};
  849. -
  850. -#ifdef CONFIG_PCI
  851. -static struct ath9k_platform_data ubnt_xm_eeprom_data;
  852. -
  853. -static int ubnt_xm_pci_plat_dev_init(struct pci_dev *dev)
  854. -{
  855. - switch (PCI_SLOT(dev->devfn)) {
  856. - case 0:
  857. - dev->dev.platform_data = &ubnt_xm_eeprom_data;
  858. - break;
  859. - }
  860. -
  861. - return 0;
  862. -}
  863. -
  864. -static void __init ubnt_xm_pci_init(void)
  865. -{
  866. - memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR,
  867. - sizeof(ubnt_xm_eeprom_data.eeprom_data));
  868. -
  869. - ath79_pci_set_plat_dev_init(ubnt_xm_pci_plat_dev_init);
  870. - ath79_register_pci();
  871. -}
  872. -#else
  873. -static inline void ubnt_xm_pci_init(void) {}
  874. -#endif /* CONFIG_PCI */
  875. -
  876. -static void __init ubnt_xm_init(void)
  877. -{
  878. - ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xm_leds_gpio),
  879. - ubnt_xm_leds_gpio);
  880. -
  881. - ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL,
  882. - ARRAY_SIZE(ubnt_xm_gpio_keys),
  883. - ubnt_xm_gpio_keys);
  884. -
  885. - ath79_register_spi(&ubnt_xm_spi_data, ubnt_xm_spi_info,
  886. - ARRAY_SIZE(ubnt_xm_spi_info));
  887. -
  888. - ubnt_xm_pci_init();
  889. -}
  890. -
  891. -MIPS_MACHINE(ATH79_MACH_UBNT_XM,
  892. - "UBNT-XM",
  893. - "Ubiquiti Networks XM (rev 1.0) board",
  894. - ubnt_xm_init);
  895. --- a/arch/mips/ath79/machtypes.h
  896. +++ /dev/null
  897. @@ -1,28 +0,0 @@
  898. -/*
  899. - * Atheros AR71XX/AR724X/AR913X machine type definitions
  900. - *
  901. - * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
  902. - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  903. - *
  904. - * This program is free software; you can redistribute it and/or modify it
  905. - * under the terms of the GNU General Public License version 2 as published
  906. - * by the Free Software Foundation.
  907. - */
  908. -
  909. -#ifndef _ATH79_MACHTYPE_H
  910. -#define _ATH79_MACHTYPE_H
  911. -
  912. -#include <asm/mips_machine.h>
  913. -
  914. -enum ath79_mach_type {
  915. - ATH79_MACH_GENERIC_OF = -1, /* Device tree board */
  916. - ATH79_MACH_GENERIC = 0,
  917. - ATH79_MACH_AP121, /* Atheros AP121 reference board */
  918. - ATH79_MACH_AP136_010, /* Atheros AP136-010 reference board */
  919. - ATH79_MACH_AP81, /* Atheros AP81 reference board */
  920. - ATH79_MACH_DB120, /* Atheros DB120 reference board */
  921. - ATH79_MACH_PB44, /* Atheros PB44 reference board */
  922. - ATH79_MACH_UBNT_XM, /* Ubiquiti Networks XM board rev 1.0 */
  923. -};
  924. -
  925. -#endif /* _ATH79_MACHTYPE_H */
  926. --- a/arch/mips/ath79/setup.c
  927. +++ b/arch/mips/ath79/setup.c
  928. @@ -33,7 +33,6 @@
  929. #include <asm/mach-ath79/ar71xx_regs.h>
  930. #include "common.h"
  931. #include "dev-common.h"
  932. -#include "machtypes.h"
  933. #define ATH79_SYS_TYPE_LEN 64
  934. @@ -230,25 +229,21 @@ void __init plat_mem_setup(void)
  935. else if (fw_passed_dtb)
  936. __dt_setup_arch((void *)KSEG0ADDR(fw_passed_dtb));
  937. - if (mips_machtype != ATH79_MACH_GENERIC_OF) {
  938. - ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE,
  939. - AR71XX_RESET_SIZE);
  940. - ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE,
  941. - AR71XX_PLL_SIZE);
  942. - ath79_detect_sys_type();
  943. - ath79_ddr_ctrl_init();
  944. + ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE,
  945. + AR71XX_RESET_SIZE);
  946. + ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE,
  947. + AR71XX_PLL_SIZE);
  948. + ath79_detect_sys_type();
  949. + ath79_ddr_ctrl_init();
  950. - detect_memory_region(0, ATH79_MEM_SIZE_MIN, ATH79_MEM_SIZE_MAX);
  951. -
  952. - /* OF machines should use the reset driver */
  953. - _machine_restart = ath79_restart;
  954. - }
  955. + detect_memory_region(0, ATH79_MEM_SIZE_MIN, ATH79_MEM_SIZE_MAX);
  956. + _machine_restart = ath79_restart;
  957. _machine_halt = ath79_halt;
  958. pm_power_off = ath79_halt;
  959. }
  960. -static void __init ath79_of_plat_time_init(void)
  961. +void __init plat_time_init(void)
  962. {
  963. struct device_node *np;
  964. struct clk *clk;
  965. @@ -278,66 +273,12 @@ static void __init ath79_of_plat_time_in
  966. clk_put(clk);
  967. }
  968. -void __init plat_time_init(void)
  969. -{
  970. - unsigned long cpu_clk_rate;
  971. - unsigned long ahb_clk_rate;
  972. - unsigned long ddr_clk_rate;
  973. - unsigned long ref_clk_rate;
  974. -
  975. - if (IS_ENABLED(CONFIG_OF) && mips_machtype == ATH79_MACH_GENERIC_OF) {
  976. - ath79_of_plat_time_init();
  977. - return;
  978. - }
  979. -
  980. - ath79_clocks_init();
  981. -
  982. - cpu_clk_rate = ath79_get_sys_clk_rate("cpu");
  983. - ahb_clk_rate = ath79_get_sys_clk_rate("ahb");
  984. - ddr_clk_rate = ath79_get_sys_clk_rate("ddr");
  985. - ref_clk_rate = ath79_get_sys_clk_rate("ref");
  986. -
  987. - pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, Ref:%lu.%03luMHz\n",
  988. - cpu_clk_rate / 1000000, (cpu_clk_rate / 1000) % 1000,
  989. - ddr_clk_rate / 1000000, (ddr_clk_rate / 1000) % 1000,
  990. - ahb_clk_rate / 1000000, (ahb_clk_rate / 1000) % 1000,
  991. - ref_clk_rate / 1000000, (ref_clk_rate / 1000) % 1000);
  992. -
  993. - mips_hpt_frequency = cpu_clk_rate / 2;
  994. -}
  995. -
  996. void __init arch_init_irq(void)
  997. {
  998. irqchip_init();
  999. }
  1000. -static int __init ath79_setup(void)
  1001. -{
  1002. - if (mips_machtype == ATH79_MACH_GENERIC_OF)
  1003. - return 0;
  1004. -
  1005. - ath79_gpio_init();
  1006. - ath79_register_uart();
  1007. - ath79_register_wdt();
  1008. -
  1009. - mips_machine_setup();
  1010. -
  1011. - return 0;
  1012. -}
  1013. -
  1014. -arch_initcall(ath79_setup);
  1015. -
  1016. void __init device_tree_init(void)
  1017. {
  1018. unflatten_and_copy_device_tree();
  1019. }
  1020. -
  1021. -MIPS_MACHINE(ATH79_MACH_GENERIC,
  1022. - "Generic",
  1023. - "Generic AR71XX/AR724X/AR913X based board",
  1024. - NULL);
  1025. -
  1026. -MIPS_MACHINE(ATH79_MACH_GENERIC_OF,
  1027. - "DTB",
  1028. - "Generic AR71XX/AR724X/AR913X based board (DT)",
  1029. - NULL);