031-arm64-Implement-arch_counter_get_cntpct-to-read-the-.patch 4.3 KB

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  1. From f2e600c149fda3453344f89c7e9353fe278ebd32 Mon Sep 17 00:00:00 2001
  2. From: Christoffer Dall <christoffer.dall@linaro.org>
  3. Date: Wed, 18 Oct 2017 13:06:25 +0200
  4. Subject: [PATCH] arm64: Implement arch_counter_get_cntpct to read the physical
  5. counter
  6. As we are about to use the physical counter on arm64 systems that have
  7. KVM support, implement arch_counter_get_cntpct() and the associated
  8. errata workaround functionality for stable timer reads.
  9. Cc: Will Deacon <will.deacon@arm.com>
  10. Cc: Mark Rutland <mark.rutland@arm.com>
  11. Acked-by: Catalin Marinas <catalin.marinas@arm.com>
  12. Acked-by: Marc Zyngier <marc.zyngier@arm.com>
  13. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
  14. ---
  15. arch/arm64/include/asm/arch_timer.h | 8 +++-----
  16. drivers/clocksource/arm_arch_timer.c | 23 +++++++++++++++++++++++
  17. 2 files changed, 26 insertions(+), 5 deletions(-)
  18. --- a/arch/arm64/include/asm/arch_timer.h
  19. +++ b/arch/arm64/include/asm/arch_timer.h
  20. @@ -52,6 +52,7 @@ struct arch_timer_erratum_workaround {
  21. const char *desc;
  22. u32 (*read_cntp_tval_el0)(void);
  23. u32 (*read_cntv_tval_el0)(void);
  24. + u64 (*read_cntpct_el0)(void);
  25. u64 (*read_cntvct_el0)(void);
  26. int (*set_next_event_phys)(unsigned long, struct clock_event_device *);
  27. int (*set_next_event_virt)(unsigned long, struct clock_event_device *);
  28. @@ -148,11 +149,8 @@ static inline void arch_timer_set_cntkct
  29. static inline u64 arch_counter_get_cntpct(void)
  30. {
  31. - /*
  32. - * AArch64 kernel and user space mandate the use of CNTVCT.
  33. - */
  34. - BUG();
  35. - return 0;
  36. + isb();
  37. + return arch_timer_reg_read_stable(cntpct_el0);
  38. }
  39. static inline u64 arch_counter_get_cntvct(void)
  40. --- a/drivers/clocksource/arm_arch_timer.c
  41. +++ b/drivers/clocksource/arm_arch_timer.c
  42. @@ -217,6 +217,11 @@ static u32 notrace fsl_a008585_read_cntv
  43. return __fsl_a008585_read_reg(cntv_tval_el0);
  44. }
  45. +static u64 notrace fsl_a008585_read_cntpct_el0(void)
  46. +{
  47. + return __fsl_a008585_read_reg(cntpct_el0);
  48. +}
  49. +
  50. static u64 notrace fsl_a008585_read_cntvct_el0(void)
  51. {
  52. return __fsl_a008585_read_reg(cntvct_el0);
  53. @@ -258,6 +263,11 @@ static u32 notrace hisi_161010101_read_c
  54. return __hisi_161010101_read_reg(cntv_tval_el0);
  55. }
  56. +static u64 notrace hisi_161010101_read_cntpct_el0(void)
  57. +{
  58. + return __hisi_161010101_read_reg(cntpct_el0);
  59. +}
  60. +
  61. static u64 notrace hisi_161010101_read_cntvct_el0(void)
  62. {
  63. return __hisi_161010101_read_reg(cntvct_el0);
  64. @@ -288,6 +298,15 @@ static struct ate_acpi_oem_info hisi_161
  65. #endif
  66. #ifdef CONFIG_ARM64_ERRATUM_858921
  67. +static u64 notrace arm64_858921_read_cntpct_el0(void)
  68. +{
  69. + u64 old, new;
  70. +
  71. + old = read_sysreg(cntpct_el0);
  72. + new = read_sysreg(cntpct_el0);
  73. + return (((old ^ new) >> 32) & 1) ? old : new;
  74. +}
  75. +
  76. static u64 notrace arm64_858921_read_cntvct_el0(void)
  77. {
  78. u64 old, new;
  79. @@ -353,6 +372,7 @@ static const struct arch_timer_erratum_w
  80. .desc = "Freescale erratum a005858",
  81. .read_cntp_tval_el0 = fsl_a008585_read_cntp_tval_el0,
  82. .read_cntv_tval_el0 = fsl_a008585_read_cntv_tval_el0,
  83. + .read_cntpct_el0 = fsl_a008585_read_cntpct_el0,
  84. .read_cntvct_el0 = fsl_a008585_read_cntvct_el0,
  85. .set_next_event_phys = erratum_set_next_event_tval_phys,
  86. .set_next_event_virt = erratum_set_next_event_tval_virt,
  87. @@ -365,6 +385,7 @@ static const struct arch_timer_erratum_w
  88. .desc = "HiSilicon erratum 161010101",
  89. .read_cntp_tval_el0 = hisi_161010101_read_cntp_tval_el0,
  90. .read_cntv_tval_el0 = hisi_161010101_read_cntv_tval_el0,
  91. + .read_cntpct_el0 = hisi_161010101_read_cntpct_el0,
  92. .read_cntvct_el0 = hisi_161010101_read_cntvct_el0,
  93. .set_next_event_phys = erratum_set_next_event_tval_phys,
  94. .set_next_event_virt = erratum_set_next_event_tval_virt,
  95. @@ -375,6 +396,7 @@ static const struct arch_timer_erratum_w
  96. .desc = "HiSilicon erratum 161010101",
  97. .read_cntp_tval_el0 = hisi_161010101_read_cntp_tval_el0,
  98. .read_cntv_tval_el0 = hisi_161010101_read_cntv_tval_el0,
  99. + .read_cntpct_el0 = hisi_161010101_read_cntpct_el0,
  100. .read_cntvct_el0 = hisi_161010101_read_cntvct_el0,
  101. .set_next_event_phys = erratum_set_next_event_tval_phys,
  102. .set_next_event_virt = erratum_set_next_event_tval_virt,
  103. @@ -385,6 +407,7 @@ static const struct arch_timer_erratum_w
  104. .match_type = ate_match_local_cap_id,
  105. .id = (void *)ARM64_WORKAROUND_858921,
  106. .desc = "ARM erratum 858921",
  107. + .read_cntpct_el0 = arm64_858921_read_cntpct_el0,
  108. .read_cntvct_el0 = arm64_858921_read_cntvct_el0,
  109. },
  110. #endif