110-Fix-MIPS-PR-84790.patch 686 B

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  1. Fix https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84790.
  2. MIPS16 functions have a static assembler prologue which clobbers
  3. registers v0 and v1. Add these register clobbers to function call
  4. instructions.
  5. --- a/gcc/config/mips/mips.cc
  6. +++ b/gcc/config/mips/mips.cc
  7. @@ -3134,6 +3134,12 @@ mips_emit_call_insn (rtx pattern, rtx or
  8. emit_insn (gen_update_got_version ());
  9. }
  10. + if (TARGET_MIPS16 && TARGET_USE_GOT)
  11. + {
  12. + clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS16_PIC_TEMP);
  13. + clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS_PROLOGUE_TEMP (word_mode));
  14. + }
  15. +
  16. if (TARGET_MIPS16
  17. && TARGET_EXPLICIT_RELOCS
  18. && TARGET_CALL_CLOBBERED_GP)