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0021-wifi-ath11k-remap-ce-register-space-for-IPQ5018.patch 13 KB

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  1. From b42b3678c91f3ca6e0888bf5a15c1e8678fd5f2d Mon Sep 17 00:00:00 2001
  2. From: Sriram R <quic_srirrama@quicinc.com>
  3. Date: Fri, 2 Dec 2022 23:37:14 +0200
  4. Subject: [PATCH] wifi: ath11k: remap ce register space for IPQ5018
  5. In IPQ5018 ce register space is moved out of wcss unlike
  6. ipq8074 or ipq6018 and the space is not contiguous,
  7. hence remap the CE registers to a new space to access them.
  8. Register read/write is modified to check if the register to be written
  9. falls in the CE register space and corresponding register is written.
  10. Also adjust the interrupt register address to ce irq enable/disable.
  11. Tested-on: IPQ5018 hw1.0 AHB WLAN.HK.2.6.0.1-00861-QCAHKSWPL_SILICONZ-1
  12. Signed-off-by: Sriram R <quic_srirrama@quicinc.com>
  13. Co-developed-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
  14. Signed-off-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
  15. Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
  16. Link: https://lore.kernel.org/r/20221122132152.17771-5-quic_kathirve@quicinc.com
  17. ---
  18. drivers/net/wireless/ath/ath11k/ahb.c | 44 ++++++++++++++++++++++----
  19. drivers/net/wireless/ath/ath11k/ce.h | 16 ++++++++++
  20. drivers/net/wireless/ath/ath11k/core.c | 8 +++++
  21. drivers/net/wireless/ath/ath11k/core.h | 1 +
  22. drivers/net/wireless/ath/ath11k/hal.c | 17 ++++++----
  23. drivers/net/wireless/ath/ath11k/hal.h | 5 +++
  24. drivers/net/wireless/ath/ath11k/hw.c | 17 ++++++++++
  25. drivers/net/wireless/ath/ath11k/hw.h | 9 ++++++
  26. drivers/net/wireless/ath/ath11k/pci.c | 2 ++
  27. 9 files changed, 107 insertions(+), 12 deletions(-)
  28. --- a/drivers/net/wireless/ath/ath11k/ahb.c
  29. +++ b/drivers/net/wireless/ath/ath11k/ahb.c
  30. @@ -267,30 +267,42 @@ static void ath11k_ahb_clearbit32(struct
  31. static void ath11k_ahb_ce_irq_enable(struct ath11k_base *ab, u16 ce_id)
  32. {
  33. const struct ce_attr *ce_attr;
  34. + const struct ce_ie_addr *ce_ie_addr = ab->hw_params.ce_ie_addr;
  35. + u32 ie1_reg_addr, ie2_reg_addr, ie3_reg_addr;
  36. +
  37. + ie1_reg_addr = ce_ie_addr->ie1_reg_addr + ATH11K_CE_OFFSET(ab);
  38. + ie2_reg_addr = ce_ie_addr->ie2_reg_addr + ATH11K_CE_OFFSET(ab);
  39. + ie3_reg_addr = ce_ie_addr->ie3_reg_addr + ATH11K_CE_OFFSET(ab);
  40. ce_attr = &ab->hw_params.host_ce_config[ce_id];
  41. if (ce_attr->src_nentries)
  42. - ath11k_ahb_setbit32(ab, ce_id, CE_HOST_IE_ADDRESS);
  43. + ath11k_ahb_setbit32(ab, ce_id, ie1_reg_addr);
  44. if (ce_attr->dest_nentries) {
  45. - ath11k_ahb_setbit32(ab, ce_id, CE_HOST_IE_2_ADDRESS);
  46. + ath11k_ahb_setbit32(ab, ce_id, ie2_reg_addr);
  47. ath11k_ahb_setbit32(ab, ce_id + CE_HOST_IE_3_SHIFT,
  48. - CE_HOST_IE_3_ADDRESS);
  49. + ie3_reg_addr);
  50. }
  51. }
  52. static void ath11k_ahb_ce_irq_disable(struct ath11k_base *ab, u16 ce_id)
  53. {
  54. const struct ce_attr *ce_attr;
  55. + const struct ce_ie_addr *ce_ie_addr = ab->hw_params.ce_ie_addr;
  56. + u32 ie1_reg_addr, ie2_reg_addr, ie3_reg_addr;
  57. +
  58. + ie1_reg_addr = ce_ie_addr->ie1_reg_addr + ATH11K_CE_OFFSET(ab);
  59. + ie2_reg_addr = ce_ie_addr->ie2_reg_addr + ATH11K_CE_OFFSET(ab);
  60. + ie3_reg_addr = ce_ie_addr->ie3_reg_addr + ATH11K_CE_OFFSET(ab);
  61. ce_attr = &ab->hw_params.host_ce_config[ce_id];
  62. if (ce_attr->src_nentries)
  63. - ath11k_ahb_clearbit32(ab, ce_id, CE_HOST_IE_ADDRESS);
  64. + ath11k_ahb_clearbit32(ab, ce_id, ie1_reg_addr);
  65. if (ce_attr->dest_nentries) {
  66. - ath11k_ahb_clearbit32(ab, ce_id, CE_HOST_IE_2_ADDRESS);
  67. + ath11k_ahb_clearbit32(ab, ce_id, ie2_reg_addr);
  68. ath11k_ahb_clearbit32(ab, ce_id + CE_HOST_IE_3_SHIFT,
  69. - CE_HOST_IE_3_ADDRESS);
  70. + ie3_reg_addr);
  71. }
  72. }
  73. @@ -1142,10 +1154,26 @@ static int ath11k_ahb_probe(struct platf
  74. goto err_core_free;
  75. }
  76. + ab->mem_ce = ab->mem;
  77. +
  78. ret = ath11k_core_pre_init(ab);
  79. if (ret)
  80. goto err_core_free;
  81. + if (ab->hw_params.ce_remap) {
  82. + const struct ce_remap *ce_remap = ab->hw_params.ce_remap;
  83. + /* ce register space is moved out of wcss unlike ipq8074 or ipq6018
  84. + * and the space is not contiguous, hence remapping the CE registers
  85. + * to a new space for accessing them.
  86. + */
  87. + ab->mem_ce = ioremap(ce_remap->base, ce_remap->size);
  88. + if (IS_ERR(ab->mem_ce)) {
  89. + dev_err(&pdev->dev, "ce ioremap error\n");
  90. + ret = -ENOMEM;
  91. + goto err_core_free;
  92. + }
  93. + }
  94. +
  95. ret = ath11k_ahb_setup_resources(ab);
  96. if (ret)
  97. goto err_core_free;
  98. @@ -1236,6 +1264,10 @@ static void ath11k_ahb_free_resources(st
  99. ath11k_ahb_release_smp2p_handle(ab);
  100. ath11k_ahb_fw_resource_deinit(ab);
  101. ath11k_ce_free_pipes(ab);
  102. +
  103. + if (ab->hw_params.ce_remap)
  104. + iounmap(ab->mem_ce);
  105. +
  106. ath11k_core_free(ab);
  107. platform_set_drvdata(pdev, NULL);
  108. }
  109. --- a/drivers/net/wireless/ath/ath11k/ce.h
  110. +++ b/drivers/net/wireless/ath/ath11k/ce.h
  111. @@ -49,6 +49,11 @@ void ath11k_ce_byte_swap(void *mem, u32
  112. #define CE_HOST_IE_2_ADDRESS 0x00A18040
  113. #define CE_HOST_IE_3_ADDRESS CE_HOST_IE_ADDRESS
  114. +/* CE IE registers are different for IPQ5018 */
  115. +#define CE_HOST_IPQ5018_IE_ADDRESS 0x0841804C
  116. +#define CE_HOST_IPQ5018_IE_2_ADDRESS 0x08418050
  117. +#define CE_HOST_IPQ5018_IE_3_ADDRESS CE_HOST_IPQ5018_IE_ADDRESS
  118. +
  119. #define CE_HOST_IE_3_SHIFT 0xC
  120. #define CE_RING_IDX_INCR(nentries_mask, idx) (((idx) + 1) & (nentries_mask))
  121. @@ -84,6 +89,17 @@ struct ce_pipe_config {
  122. __le32 reserved;
  123. };
  124. +struct ce_ie_addr {
  125. + u32 ie1_reg_addr;
  126. + u32 ie2_reg_addr;
  127. + u32 ie3_reg_addr;
  128. +};
  129. +
  130. +struct ce_remap {
  131. + u32 base;
  132. + u32 size;
  133. +};
  134. +
  135. struct ce_attr {
  136. /* CE_ATTR_* values */
  137. unsigned int flags;
  138. --- a/drivers/net/wireless/ath/ath11k/core.c
  139. +++ b/drivers/net/wireless/ath/ath11k/core.c
  140. @@ -54,6 +54,7 @@ static const struct ath11k_hw_params ath
  141. .target_ce_count = 11,
  142. .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_ipq8074,
  143. .svc_to_ce_map_len = 21,
  144. + .ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
  145. .single_pdev_only = false,
  146. .rxdma1_enable = true,
  147. .num_rxmda_per_pdev = 1,
  148. @@ -137,6 +138,7 @@ static const struct ath11k_hw_params ath
  149. .target_ce_count = 11,
  150. .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_ipq6018,
  151. .svc_to_ce_map_len = 19,
  152. + .ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
  153. .single_pdev_only = false,
  154. .rxdma1_enable = true,
  155. .num_rxmda_per_pdev = 1,
  156. @@ -218,6 +220,7 @@ static const struct ath11k_hw_params ath
  157. .target_ce_count = 9,
  158. .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
  159. .svc_to_ce_map_len = 14,
  160. + .ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
  161. .single_pdev_only = true,
  162. .rxdma1_enable = false,
  163. .num_rxmda_per_pdev = 2,
  164. @@ -301,6 +304,7 @@ static const struct ath11k_hw_params ath
  165. .target_ce_count = 9,
  166. .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qcn9074,
  167. .svc_to_ce_map_len = 18,
  168. + .ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
  169. .rxdma1_enable = true,
  170. .num_rxmda_per_pdev = 1,
  171. .rx_mac_buf_ring = false,
  172. @@ -381,6 +385,7 @@ static const struct ath11k_hw_params ath
  173. .target_ce_count = 9,
  174. .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
  175. .svc_to_ce_map_len = 14,
  176. + .ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
  177. .single_pdev_only = true,
  178. .rxdma1_enable = false,
  179. .num_rxmda_per_pdev = 2,
  180. @@ -546,6 +551,7 @@ static const struct ath11k_hw_params ath
  181. .target_ce_count = 9,
  182. .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
  183. .svc_to_ce_map_len = 14,
  184. + .ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
  185. .single_pdev_only = true,
  186. .rxdma1_enable = false,
  187. .num_rxmda_per_pdev = 1,
  188. @@ -634,6 +640,8 @@ static const struct ath11k_hw_params ath
  189. .target_ce_count = TARGET_CE_CNT_5018,
  190. .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_ipq5018,
  191. .svc_to_ce_map_len = SVC_CE_MAP_LEN_5018,
  192. + .ce_ie_addr = &ath11k_ce_ie_addr_ipq5018,
  193. + .ce_remap = &ath11k_ce_remap_ipq5018,
  194. .rxdma1_enable = true,
  195. .num_rxmda_per_pdev = RXDMA_PER_PDEV_5018,
  196. .rx_mac_buf_ring = false,
  197. --- a/drivers/net/wireless/ath/ath11k/core.h
  198. +++ b/drivers/net/wireless/ath/ath11k/core.h
  199. @@ -851,6 +851,7 @@ struct ath11k_base {
  200. struct ath11k_dp dp;
  201. void __iomem *mem;
  202. + void __iomem *mem_ce;
  203. unsigned long mem_len;
  204. struct {
  205. --- a/drivers/net/wireless/ath/ath11k/hal.c
  206. +++ b/drivers/net/wireless/ath/ath11k/hal.c
  207. @@ -1220,16 +1220,20 @@ static int ath11k_hal_srng_create_config
  208. s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_STATUS_RING_HP;
  209. s = &hal->srng_config[HAL_CE_SRC];
  210. - s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_BASE_LSB;
  211. - s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_HP;
  212. + s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_BASE_LSB +
  213. + ATH11K_CE_OFFSET(ab);
  214. + s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_HP +
  215. + ATH11K_CE_OFFSET(ab);
  216. s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) -
  217. HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab);
  218. s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) -
  219. HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab);
  220. s = &hal->srng_config[HAL_CE_DST];
  221. - s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_BASE_LSB;
  222. - s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_HP;
  223. + s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_BASE_LSB +
  224. + ATH11K_CE_OFFSET(ab);
  225. + s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_HP +
  226. + ATH11K_CE_OFFSET(ab);
  227. s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
  228. HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
  229. s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
  230. @@ -1237,8 +1241,9 @@ static int ath11k_hal_srng_create_config
  231. s = &hal->srng_config[HAL_CE_DST_STATUS];
  232. s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) +
  233. - HAL_CE_DST_STATUS_RING_BASE_LSB;
  234. - s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_STATUS_RING_HP;
  235. + HAL_CE_DST_STATUS_RING_BASE_LSB + ATH11K_CE_OFFSET(ab);
  236. + s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_STATUS_RING_HP +
  237. + ATH11K_CE_OFFSET(ab);
  238. s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
  239. HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
  240. s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
  241. --- a/drivers/net/wireless/ath/ath11k/hal.h
  242. +++ b/drivers/net/wireless/ath/ath11k/hal.h
  243. @@ -321,6 +321,10 @@ struct ath11k_base;
  244. #define HAL_WBM2SW_RELEASE_RING_BASE_MSB_RING_SIZE 0x000fffff
  245. #define HAL_RXDMA_RING_MAX_SIZE 0x0000ffff
  246. +/* IPQ5018 ce registers */
  247. +#define HAL_IPQ5018_CE_WFSS_REG_BASE 0x08400000
  248. +#define HAL_IPQ5018_CE_SIZE 0x200000
  249. +
  250. /* Add any other errors here and return them in
  251. * ath11k_hal_rx_desc_get_err().
  252. */
  253. @@ -519,6 +523,7 @@ enum hal_srng_dir {
  254. #define HAL_SRNG_FLAGS_MSI_INTR 0x00020000
  255. #define HAL_SRNG_FLAGS_CACHED 0x20000000
  256. #define HAL_SRNG_FLAGS_LMAC_RING 0x80000000
  257. +#define HAL_SRNG_FLAGS_REMAP_CE_RING 0x10000000
  258. #define HAL_SRNG_TLV_HDR_TAG GENMASK(9, 1)
  259. #define HAL_SRNG_TLV_HDR_LEN GENMASK(25, 10)
  260. --- a/drivers/net/wireless/ath/ath11k/hw.c
  261. +++ b/drivers/net/wireless/ath/ath11k/hw.c
  262. @@ -2163,6 +2163,23 @@ const struct service_to_pipe ath11k_targ
  263. { /* terminator entry */ }
  264. };
  265. +const struct ce_ie_addr ath11k_ce_ie_addr_ipq8074 = {
  266. + .ie1_reg_addr = CE_HOST_IE_ADDRESS,
  267. + .ie2_reg_addr = CE_HOST_IE_2_ADDRESS,
  268. + .ie3_reg_addr = CE_HOST_IE_3_ADDRESS,
  269. +};
  270. +
  271. +const struct ce_ie_addr ath11k_ce_ie_addr_ipq5018 = {
  272. + .ie1_reg_addr = CE_HOST_IPQ5018_IE_ADDRESS - HAL_IPQ5018_CE_WFSS_REG_BASE,
  273. + .ie2_reg_addr = CE_HOST_IPQ5018_IE_2_ADDRESS - HAL_IPQ5018_CE_WFSS_REG_BASE,
  274. + .ie3_reg_addr = CE_HOST_IPQ5018_IE_3_ADDRESS - HAL_IPQ5018_CE_WFSS_REG_BASE,
  275. +};
  276. +
  277. +const struct ce_remap ath11k_ce_remap_ipq5018 = {
  278. + .base = HAL_IPQ5018_CE_WFSS_REG_BASE,
  279. + .size = HAL_IPQ5018_CE_SIZE,
  280. +};
  281. +
  282. const struct ath11k_hw_regs ipq8074_regs = {
  283. /* SW2TCL(x) R0 ring configuration address */
  284. .hal_tcl1_ring_base_lsb = 0x00000510,
  285. --- a/drivers/net/wireless/ath/ath11k/hw.h
  286. +++ b/drivers/net/wireless/ath/ath11k/hw.h
  287. @@ -80,6 +80,8 @@
  288. #define ATH11K_M3_FILE "m3.bin"
  289. #define ATH11K_REGDB_FILE_NAME "regdb.bin"
  290. +#define ATH11K_CE_OFFSET(ab) (ab->mem_ce - ab->mem)
  291. +
  292. enum ath11k_hw_rate_cck {
  293. ATH11K_HW_RATE_CCK_LP_11M = 0,
  294. ATH11K_HW_RATE_CCK_LP_5_5M,
  295. @@ -158,6 +160,8 @@ struct ath11k_hw_params {
  296. u32 target_ce_count;
  297. const struct service_to_pipe *svc_to_ce_map;
  298. u32 svc_to_ce_map_len;
  299. + const struct ce_ie_addr *ce_ie_addr;
  300. + const struct ce_remap *ce_remap;
  301. bool single_pdev_only;
  302. @@ -277,6 +281,11 @@ extern const struct ath11k_hw_ring_mask
  303. extern const struct ath11k_hw_ring_mask ath11k_hw_ring_mask_qcn9074;
  304. extern const struct ath11k_hw_ring_mask ath11k_hw_ring_mask_wcn6750;
  305. +extern const struct ce_ie_addr ath11k_ce_ie_addr_ipq8074;
  306. +extern const struct ce_ie_addr ath11k_ce_ie_addr_ipq5018;
  307. +
  308. +extern const struct ce_remap ath11k_ce_remap_ipq5018;
  309. +
  310. extern const struct ath11k_hw_hal_params ath11k_hw_hal_params_ipq8074;
  311. extern const struct ath11k_hw_hal_params ath11k_hw_hal_params_qca6390;
  312. extern const struct ath11k_hw_hal_params ath11k_hw_hal_params_wcn6750;
  313. --- a/drivers/net/wireless/ath/ath11k/pci.c
  314. +++ b/drivers/net/wireless/ath/ath11k/pci.c
  315. @@ -543,6 +543,8 @@ static int ath11k_pci_claim(struct ath11
  316. goto clear_master;
  317. }
  318. + ab->mem_ce = ab->mem;
  319. +
  320. ath11k_dbg(ab, ATH11K_DBG_BOOT, "boot pci_mem 0x%pK\n", ab->mem);
  321. return 0;