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723-net-phy-aquantia-fix-system-side-protocol-mi.patch 1.2 KB

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  1. From 5f008cb22f60da4e10375f22266c1a4e20b1252e Mon Sep 17 00:00:00 2001
  2. From: Alex Marginean <alexandru.marginean@nxp.com>
  3. Date: Fri, 20 Sep 2019 18:22:52 +0300
  4. Subject: [PATCH] drivers: net: phy: aquantia: fix system side protocol
  5. misconfiguration
  6. Do not set up protocols for speeds that are not supported by FW. Enabling
  7. these protocols leads to link issues on system side.
  8. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
  9. ---
  10. drivers/net/phy/aquantia_main.c | 8 +++++++-
  11. 1 file changed, 7 insertions(+), 1 deletion(-)
  12. --- a/drivers/net/phy/aquantia_main.c
  13. +++ b/drivers/net/phy/aquantia_main.c
  14. @@ -324,10 +324,16 @@ static int aqr_config_aneg_set_prot(stru
  15. phy_write_mmd(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GSTART_RATE,
  16. aquantia_syscfg[if_type].start_rate);
  17. - for (i = 0; i <= aquantia_syscfg[if_type].cnt; i++)
  18. + for (i = 0; i <= aquantia_syscfg[if_type].cnt; i++) {
  19. + u16 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1,
  20. + AQUANTIA_VND1_GSYSCFG_BASE + i);
  21. + if (!reg)
  22. + continue;
  23. +
  24. phy_write_mmd(phydev, MDIO_MMD_VEND1,
  25. AQUANTIA_VND1_GSYSCFG_BASE + i,
  26. aquantia_syscfg[if_type].syscfg);
  27. + }
  28. /* wake PHY back up */
  29. phy_write_mmd(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GLOBAL_SC, 0);