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DWR-512-B.dts 2.3 KB

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  1. /dts-v1/;
  2. #include "rt5350.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. / {
  6. compatible = "ralink,rt5350-soc";
  7. model = "D-Link DWR-512 B";
  8. gpio-keys-polled {
  9. compatible = "gpio-keys-polled";
  10. #address-cells = <1>;
  11. #size-cells = <0>;
  12. poll-interval = <20>;
  13. wps {
  14. label = "wps";
  15. gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
  16. linux,code = <KEY_WPS_BUTTON>;
  17. };
  18. reset {
  19. label = "reset";
  20. gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  21. linux,code = <KEY_RESTART>;
  22. };
  23. };
  24. gpio-leds {
  25. compatible = "gpio-leds";
  26. sms {
  27. label = "dwr-512-b:green:sms";
  28. gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
  29. };
  30. status {
  31. label = "dwr-512-b:green:status";
  32. gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
  33. };
  34. 2g {
  35. label = "dwr-512-b:green:2g";
  36. gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
  37. };
  38. 3g {
  39. label = "dwr-512-b:green:3g";
  40. gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
  41. };
  42. sstrengthr {
  43. label = "dwr-512-b:red:sigstrength";
  44. gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
  45. };
  46. sstrengthg {
  47. label = "dwr-512-b:green:sigstrength";
  48. gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
  49. };
  50. };
  51. gpio-export {
  52. compatible = "gpio-export";
  53. #size-cells = <0>;
  54. modem3g_enable {
  55. gpio-export,name = "modem3g_enable";
  56. gpio-export,output = <1>;
  57. gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
  58. };
  59. };
  60. };
  61. &spi0 {
  62. status = "okay";
  63. mx25l6405d@0 {
  64. #address-cells = <1>;
  65. #size-cells = <1>;
  66. compatible = "jedec,spi-nor";
  67. reg = <0>;
  68. spi-max-frequency = <30000000>;
  69. m25p,fast-read;
  70. partition@0 {
  71. label = "u-boot";
  72. reg = <0x0 0x30000>;
  73. read-only;
  74. };
  75. partition@30000 {
  76. label = "u-boot-env";
  77. reg = <0x30000 0x20000>;
  78. read-only;
  79. };
  80. partition@50000 {
  81. label = "firmware";
  82. reg = <0x50000 0x7a0000>;
  83. };
  84. config: partition@7f0000 {
  85. label = "config";
  86. reg = <0x7f0000 0x10000>;
  87. };
  88. };
  89. };
  90. &spi1 {
  91. status = "okay";
  92. spidev@1 {
  93. #address-cells = <1>;
  94. #size-cells = <1>;
  95. compatible = "siliconlabs,si3210";
  96. reg = <0>;
  97. spi-max-frequency = <1000000>;
  98. };
  99. };
  100. &pinctrl {
  101. state_default: pinctrl0 {
  102. gpio {
  103. ralink,group = "i2c", "jtag", "uartf";
  104. ralink,function = "gpio";
  105. };
  106. };
  107. };
  108. &esw {
  109. mediatek,portmap = <0x2f>;
  110. };
  111. &ethernet {
  112. mtd-mac-address = <&config 0xe07e>;
  113. };
  114. &wmac {
  115. ralink,mtd-eeprom = <&config 0xe08a>;
  116. ralink,led-polarity = <1>;
  117. mtd-mac-address = <&config 0xe07e>;
  118. };