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MT7620a_MT7610e.dts 1.3 KB

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  1. /dts-v1/;
  2. #include "mt7620a.dtsi"
  3. #include <dt-bindings/input/input.h>
  4. / {
  5. compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
  6. model = "Ralink MT7620A evaluation board";
  7. gpio-keys-polled {
  8. compatible = "gpio-keys";
  9. #address-cells = <1>;
  10. #size-cells = <0>;
  11. poll-interval = <20>;
  12. wps {
  13. label = "wps";
  14. gpios = <&gpio0 12 1>;
  15. linux,code = <BTN_0>;
  16. };
  17. reset {
  18. label = "reset";
  19. gpios = <&gpio0 13 1>;
  20. linux,code = <BTN_1>;
  21. };
  22. };
  23. };
  24. &gpio0 {
  25. status = "okay";
  26. };
  27. &spi0 {
  28. status = "okay";
  29. m25p80@0 {
  30. #address-cells = <1>;
  31. #size-cells = <1>;
  32. compatible = "jedec,spi-nor";
  33. reg = <0>;
  34. linux,modalias = "m25p80", "en25q64";
  35. spi-max-frequency = <1000000>;
  36. partition@0 {
  37. label = "u-boot";
  38. reg = <0x0 0x30000>;
  39. read-only;
  40. };
  41. partition@30000 {
  42. label = "u-boot-env";
  43. reg = <0x30000 0x10000>;
  44. read-only;
  45. };
  46. factory: partition@40000 {
  47. label = "factory";
  48. reg = <0x40000 0x10000>;
  49. read-only;
  50. };
  51. partition@50000 {
  52. label = "firmware";
  53. reg = <0x50000 0x7b0000>;
  54. };
  55. };
  56. };
  57. &ethernet {
  58. status = "okay";
  59. pinctrl-names = "default";
  60. pinctrl-0 = <&ephy_pins>;
  61. mediatek,portmap = "llllw";
  62. };
  63. &gsw {
  64. mediatek,port4 = "ephy";
  65. };
  66. &sdhci {
  67. status = "okay";
  68. };
  69. &pcie {
  70. status = "okay";
  71. };