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810-pci_disable_common_quirks.patch 1.9 KB

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  1. --- a/drivers/pci/Kconfig
  2. +++ b/drivers/pci/Kconfig
  3. @@ -58,6 +58,12 @@ config XEN_PCIDEV_FRONTEND
  4. The PCI device frontend driver allows the kernel to import arbitrary
  5. PCI devices from a PCI backend to support PCI driver domains.
  6. +config PCI_DISABLE_COMMON_QUIRKS
  7. + bool "PCI disable common quirks"
  8. + depends on PCI
  9. + help
  10. + If you don't know what to do here, say N.
  11. +
  12. config HT_IRQ
  13. bool "Interrupts on hypertransport devices"
  14. default y
  15. --- a/drivers/pci/quirks.c
  16. +++ b/drivers/pci/quirks.c
  17. @@ -41,6 +41,7 @@ static void quirk_mmio_always_on(struct
  18. DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID,
  19. PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on);
  20. +#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
  21. /* The Mellanox Tavor device gives false positive parity errors
  22. * Mark this device with a broken_parity_status, to allow
  23. * PCI scanning code to "skip" this now blacklisted device.
  24. @@ -2929,6 +2930,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
  25. DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata);
  26. DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata);
  27. +#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
  28. /*
  29. * Ivytown NTB BAR sizes are misreported by the hardware due to an erratum. To
  30. @@ -2985,6 +2987,8 @@ static void fixup_debug_report(struct pc
  31. }
  32. }
  33. +#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
  34. +
  35. /*
  36. * Some BIOS implementations leave the Intel GPU interrupts enabled,
  37. * even though no one is handling them (f.e. i915 driver is never loaded).
  38. @@ -3019,6 +3023,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
  39. DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
  40. DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq);
  41. +#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
  42. +
  43. /*
  44. * PCI devices which are on Intel chips can skip the 10ms delay
  45. * before entering D3 mode.